JPH0378720B2 - - Google Patents

Info

Publication number
JPH0378720B2
JPH0378720B2 JP59267460A JP26746084A JPH0378720B2 JP H0378720 B2 JPH0378720 B2 JP H0378720B2 JP 59267460 A JP59267460 A JP 59267460A JP 26746084 A JP26746084 A JP 26746084A JP H0378720 B2 JPH0378720 B2 JP H0378720B2
Authority
JP
Japan
Prior art keywords
test pattern
memory cell
cell array
generating circuit
pattern generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP59267460A
Other languages
English (en)
Other versions
JPS61145799A (en
Inventor
Mitsugi Naito
Yoshuki Suehiro
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59267460A priority Critical patent/JPH0378720B2/ja
Publication of JPS61145799A publication Critical patent/JPS61145799A/ja
Publication of JPH0378720B2 publication Critical patent/JPH0378720B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/46Test trigger logic
JP59267460A 1984-12-20 1984-12-20 Expired - Fee Related JPH0378720B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59267460A JPH0378720B2 (ja) 1984-12-20 1984-12-20

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP59267460A JPH0378720B2 (ja) 1984-12-20 1984-12-20
KR8509485A KR900008660B1 (ko) 1984-12-20 1985-12-17 메모리 테스트 패턴 발생회로를 포함한 반도체 장치
US06/810,143 US4701919A (en) 1984-12-20 1985-12-18 Semiconductor device incorporating memory test pattern generating circuit
DE8585309305A DE3586397D1 (de) 1984-12-20 1985-12-20 Halbleiterspeicher mit testmustergenerator.
EP85309305A EP0186459B1 (en) 1984-12-20 1985-12-20 Semiconductor memory incorporating a test pattern generator
DE8585309305T DE3586397T2 (de) 1984-12-20 1985-12-20 Halbleiterspeicher mit testmustergenerator.

Publications (2)

Publication Number Publication Date
JPS61145799A JPS61145799A (en) 1986-07-03
JPH0378720B2 true JPH0378720B2 (ja) 1991-12-16

Family

ID=17445145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59267460A Expired - Fee Related JPH0378720B2 (ja) 1984-12-20 1984-12-20

Country Status (5)

Country Link
US (1) US4701919A (ja)
EP (1) EP0186459B1 (ja)
JP (1) JPH0378720B2 (ja)
KR (1) KR900008660B1 (ja)
DE (2) DE3586397T2 (ja)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61292755A (en) * 1985-06-20 1986-12-23 Fujitsu Ltd Semiconductor integrated circuit
JPS6221357A (en) * 1985-07-22 1987-01-29 Toshiba Corp Memory system
JPH0318280B2 (ja) * 1985-12-13 1991-03-12 Advantest Corp
JPS62195572A (en) * 1986-02-21 1987-08-28 Mitsubishi Electric Corp Semiconductor testing device
EP0253161B1 (en) * 1986-06-25 1991-10-16 Nec Corporation Testing circuit for random access memory device
US4872168A (en) * 1986-10-02 1989-10-03 American Telephone And Telegraph Company, At&T Bell Laboratories Integrated circuit with memory self-test
DE3634352A1 (de) * 1986-10-08 1988-04-21 Siemens Ag Verfahren und anordnung zum testen von mega-bit-speicherbausteinen mit beliebigen testmustern im multi-bit-testmodus
JPH0812226B2 (ja) * 1987-01-14 1996-02-07 三菱電機株式会社 半導体装置
US4801869A (en) * 1987-04-27 1989-01-31 International Business Machines Corporation Semiconductor defect monitor for diagnosing processing-induced defects
DE3728521A1 (de) * 1987-08-26 1989-03-09 Siemens Ag Anordnung und verfahren zur feststellung und lokalisierung von fehlerhaften schaltkreisen eines speicherbausteins
JPH02166700A (en) * 1988-12-15 1990-06-27 Samsung Electron Co Ltd Nonvolatile semiconductor memory device with built-in error inspecting and correcting device
JP2779538B2 (ja) * 1989-04-13 1998-07-23 三菱電機株式会社 半導体集積回路メモリのためのテスト信号発生器およびテスト方法
US5101409A (en) * 1989-10-06 1992-03-31 International Business Machines Corporation Checkboard memory self-test
US5073891A (en) * 1990-02-14 1991-12-17 Intel Corporation Method and apparatus for testing memory
JP2882426B2 (ja) * 1991-03-29 1999-04-12 株式会社アドバンテスト アドレス発生装置
BE1004959A3 (nl) * 1991-06-28 1993-03-02 Bell Telephone Mfg Werkwijze en inrichtingen voor het testen van atm-verbindingen.
JPH05274895A (ja) * 1992-03-26 1993-10-22 Nec Ic Microcomput Syst Ltd 半導体記憶装置
US5490115A (en) * 1994-07-29 1996-02-06 Cypress Semiconductor Corp. Method and apparatus for writing to memory cells in a minimum number of cycles during a memory test operation
TW338106B (en) * 1996-03-29 1998-08-11 Adoban Test Kk Semiconductor memory testing apparatus
US6078637A (en) 1998-06-29 2000-06-20 Cypress Semiconductor Corp. Address counter test mode for memory device
JP2000182398A (ja) * 1998-12-15 2000-06-30 Nec Corp 半導体装置及び半導体装置の試験方法
US6728910B1 (en) * 2000-09-20 2004-04-27 Lsi Logic Corporation Memory testing for built-in self-repair system
TW559970B (en) * 2001-04-05 2003-11-01 Kawasaki Microelectronics Inc Test circuit, semiconductor product wafer having the test circuit, and method of monitoring manufacturing process using the test circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS573299A (en) * 1980-06-06 1982-01-08 Nec Corp Memory integrated circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3924181A (en) * 1973-10-16 1975-12-02 Hughes Aircraft Co Test circuitry employing a cyclic code generator
US4541090A (en) * 1981-06-09 1985-09-10 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device
US4519078A (en) * 1982-09-29 1985-05-21 Storage Technology Corporation LSI self-test method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS573299A (en) * 1980-06-06 1982-01-08 Nec Corp Memory integrated circuit

Also Published As

Publication number Publication date
EP0186459A3 (en) 1988-06-08
DE3586397T2 (de) 1993-03-18
KR900008660B1 (ko) 1990-11-26
KR860005446A (ko) 1986-07-23
DE3586397D1 (de) 1992-08-27
EP0186459A2 (en) 1986-07-02
JPS61145799A (en) 1986-07-03
EP0186459B1 (en) 1992-07-22
US4701919A (en) 1987-10-20

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees