JPH0376021B2 - - Google Patents

Info

Publication number
JPH0376021B2
JPH0376021B2 JP57134159A JP13415982A JPH0376021B2 JP H0376021 B2 JPH0376021 B2 JP H0376021B2 JP 57134159 A JP57134159 A JP 57134159A JP 13415982 A JP13415982 A JP 13415982A JP H0376021 B2 JPH0376021 B2 JP H0376021B2
Authority
JP
Japan
Prior art keywords
heat treatment
semiconductor substrate
treatment chamber
semiconductor
metal heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57134159A
Other languages
Japanese (ja)
Other versions
JPS5925229A (en
Inventor
Minoru Inoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13415982A priority Critical patent/JPS5925229A/en
Publication of JPS5925229A publication Critical patent/JPS5925229A/en
Publication of JPH0376021B2 publication Critical patent/JPH0376021B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

Description

【発明の詳細な説明】 〔概要〕 半導体熱処理装置に関し、半導体基板の大口径
化およびウエハープロセスの自動化に適切に対処
することを目的とし、 金属製熱処理室にゲートバルブを介して排気系
を有するロードロツク室を複数個具備せしめ、一
方の該ロードロツク室を通じて前記金属製熱処理
室へ半導体基板を送入し、他方のロードロツク室
へ前記金属製熱処理室から送出すると共に、前記
金属製熱処理室の内部を10-2Torr以下の圧力に
保持し、該金属製熱処理室内において前記半導体
基板をマイクロ波透過窓を透過させたマイクロ波
によつて照射して熱処理するように構成する。
[Detailed Description of the Invention] [Summary] With regard to semiconductor heat treatment equipment, the purpose of the present invention is to appropriately cope with the increase in the diameter of semiconductor substrates and the automation of wafer processes, and the metal heat treatment chamber has an exhaust system via a gate valve. A plurality of load lock chambers are provided, and a semiconductor substrate is fed into the metal heat treatment chamber through one of the load lock chambers, and sent from the metal heat treatment chamber to the other load lock chamber, and the inside of the metal heat treatment chamber is The pressure is maintained at 10 -2 Torr or less, and the semiconductor substrate is heat-treated in the metal heat treatment chamber by irradiation with microwaves transmitted through a microwave transmission window.

〔産業上の利用分野〕[Industrial application field]

本発明は、半導体装置のウエハープロセスにお
いて、繰り返えし行われる半導体基板(ウエハ
ー)の加熱により用いられる半導体熱処理装置に
関する。
The present invention relates to a semiconductor heat treatment apparatus used for repeatedly heating a semiconductor substrate (wafer) in a wafer process for semiconductor devices.

〔従来の技術〕[Conventional technology]

半導体装置は半導体基板(例えばシリコンウエ
ハー)の面上に多数の素子を形成する、いわゆる
ウエハープロセス(ウエハー処理工程)を経て作
成されているが、このウエハープロセスでは加熱
処理が繰り返し行われており、加熱処理は非常に
大切な処理である。即ち、シリコンウエハーの面
上に酸化シリコン(SiO2)膜を生成する酸化処
理、不純物イオンを注入した後の活性化処理、あ
るいは、不純物拡散処理などは約1000℃の高温に
半導体基板を加熱し、また、表面に導電膜や絶縁
膜を形成する薄膜形成技術では半導体基板面を約
数百℃に加熱する必要があり、更に、パターニン
グ工程のレジスト膜塗布にも100〜200℃に半導体
基板を加熱してベーキングを行つている。
Semiconductor devices are created through a so-called wafer process (wafer processing step) in which a large number of elements are formed on the surface of a semiconductor substrate (for example, a silicon wafer), but this wafer process involves repeated heat treatment. Heat treatment is a very important treatment. In other words, oxidation treatment to generate a silicon oxide (SiO 2 ) film on the surface of a silicon wafer, activation treatment after implanting impurity ions, or impurity diffusion treatment involves heating the semiconductor substrate to a high temperature of approximately 1000°C. In addition, thin film formation technology that forms conductive or insulating films on the surface requires heating the semiconductor substrate surface to approximately several hundred degrees Celsius, and furthermore, the semiconductor substrate must be heated to 100 to 200 degrees Celsius for resist film application in the patterning process. It is heated and baked.

従来、通常、これらの加熱には電気抵抗に電力
を加えて発熱させる抵抗加熱方法が採られてお
り、稀に低温度加熱の際に赤外ランプが用いられ
ているのみで、半導体基板はくりかえし電気炉中
あるいはヒーター上に載置されて加熱され、これ
らは殆んどバツチ式処理である。
Conventionally, resistance heating methods have been used to generate heat by applying electric power to electrical resistance, and in rare cases, infrared lamps have been used only for low-temperature heating, and semiconductor substrates have been repeatedly heated. It is heated by being placed in an electric furnace or on a heater, and most of these processes are batch-type processes.

しかしながら、半導体の発展に伴う量産化のた
め、半導体基板も直径5インチと大口径化され、
それに伴つて製造装置も大型化されており、その
ような大口径ウエハーを処理する自動処理装置は
駆動系を含めて益々大きくなつて生産コストが高
くなるばかりでなく、その自動化大型化にも充分
対処できない条件となりつつある。
However, due to mass production accompanying the development of semiconductors, semiconductor substrates have also increased in diameter to 5 inches.
Along with this, manufacturing equipment has also become larger, and the automatic processing equipment that processes such large-diameter wafers has become larger and larger, including the drive system, which not only increases production costs but also requires large-scale automation. This is becoming an unmanageable condition.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従つて、比較的に小型の製造装置によつて大口
径ウエハーを処理できる製造工程が要望されてお
り、それは枚葉式の自動化処理工程と考えられて
いる。そのため、加熱処理も枚葉式の自動化処理
方式が望まれている。
Therefore, there is a need for a manufacturing process that can process large diameter wafers using relatively small manufacturing equipment, and this is considered to be an automated single-wafer processing process. Therefore, an automated single-wafer heating treatment method is desired.

本発明はそのような半導体基板の大口径化およ
びウエハープロセスの枚葉式の自動化に適切に対
処することのできる半導体熱処理装置を安定する
ものである。
The present invention provides a stable semiconductor heat treatment apparatus that can appropriately cope with the increase in the diameter of semiconductor substrates and the single-wafer automation of wafer processes.

〔課題を解決するための手段〕[Means to solve the problem]

その課題は、金属製熱処理室にゲートバルブを
介して排気系を有するロードロツク室を複数個具
備せしめ、一方の該ロードロツク室を通じて前記
金属製熱処理室へ半導体基板を送入し、他方の該
ロードロツク室へ前記金属製熱処理字から半導体
基板を送出すると共に、前記金属製熱処理室の内
部を10-2Torr以下の圧力に保持し、該金属製熱
処理室内において前記半導体基板をマイクロ波透
過窓を透過させたマイクロ波によつて照射して熱
処理するように構成した半導体熱処理装置によつ
て解決される。
The problem is to equip a metal heat treatment chamber with a plurality of loadlock chambers each having an exhaust system via a gate valve, to feed a semiconductor substrate into the metal heat treatment chamber through one of the loadlock chambers, and to transfer the semiconductor substrate to the metal heat treatment chamber through one of the loadlock chambers. At the same time, the semiconductor substrate is sent out from the metal heat treatment chamber, and the inside of the metal heat treatment chamber is maintained at a pressure of 10 -2 Torr or less, and the semiconductor substrate is transmitted through a microwave transmission window in the metal heat treatment chamber. The problem is solved by a semiconductor heat treatment apparatus configured to perform heat treatment by irradiation with microwaves.

〔作用〕[Effect]

即ち、本発明はマイクロ波加熱を利用して1枚
ずつの半導体基板自体を加熱し、熱処理室の側部
にロードロツク室を設けて、自動的に送入・送出
させて熱処理するもので、このような熱処理装置
は自動化処理工程へ適用が容易で、且つ、その熱
処理の効率化が図れるものである。
That is, the present invention heats the semiconductor substrates one by one using microwave heating, and a load lock chamber is provided on the side of the heat treatment chamber, and the heat treatment is performed by automatically feeding and discharging the semiconductor substrates. Such a heat treatment apparatus can be easily applied to an automated treatment process and can improve the efficiency of the heat treatment.

〔実施例〕〔Example〕

以下、実施例によつて本発明を詳細に説明す
る。第1図は本発明に係る半導体熱処理装置の要
部断面図を示しており、本例はウエハーに不純物
イオンを注入した後、その不純物イオンを活性化
する自動処理装置の例である。熱処理室1の両側
にロードロツク室2に収容されて排気系V2によ
つて真空排気され、既に排気系V1によつて真空
排気された熱処理室1との境界ゲートバルブG2
を開いて、処理室1に1枚の半導体基板4を移送
ベルト5によつて送り込む。移送ベルト5は金属
製が望ましいが、また、金属製のエヤベヤリング
を用いてもよく、更に、他の移送方法も考えられ
ている。次いで、ゲートバルブG2を閉じた後、
熱処理室1が10-2Torr以下の高真空になると、
透過窓6を通してマイクロ波導波管7よりマイク
ロ波(例えば波長2.45GHz)を印加する。そうす
ると誘電体である半導体基板4はマイクロ波を吸
収して基板自体が加熱され、熱処理(アニール)
される。マイクロ波の透過窓6は石英(主材料
siO2)又はセラミツク(主材料Al2O3)又はパイ
レツクスガラスなどからなり、これはマイクロ波
をほぼ完全に透過させて、熱処理室1にマイクロ
波が導入される。また、熱処理室全体は不銹鋼な
どを用いた金属容器で作成され、導電体は加熱さ
れることがない。今、マイクロ波電力500Wを印
加すると1000℃程度に加熱されるものは約4分
で、第2図にその印加時間と半導体基板の加熱温
度との関係図を示している。
Hereinafter, the present invention will be explained in detail with reference to Examples. FIG. 1 shows a sectional view of a main part of a semiconductor heat treatment apparatus according to the present invention, and this example is an example of an automatic processing apparatus that activates impurity ions after implanting them into a wafer. Gate valves G2 are housed in load lock chambers 2 on both sides of the heat treatment chamber 1, are evacuated by the exhaust system V2, and are connected to the heat treatment chamber 1 which has already been evacuated by the exhaust system V1.
is opened, and one semiconductor substrate 4 is sent into the processing chamber 1 by the transfer belt 5. The transfer belt 5 is preferably made of metal, but a metal air bearing may also be used, and other transfer methods are also being considered. Next, after closing the gate valve G2,
When heat treatment chamber 1 becomes a high vacuum of 10 -2 Torr or less,
Microwaves (eg, wavelength 2.45 GHz) are applied from a microwave waveguide 7 through the transmission window 6 . Then, the semiconductor substrate 4, which is a dielectric material, absorbs the microwaves and the substrate itself is heated, resulting in heat treatment (annealing).
be done. The microwave transmission window 6 is made of quartz (main material
siO 2 ), ceramic (main material Al 2 O 3 ), or Pyrex glass, which allows microwaves to pass through almost completely, and the microwaves are introduced into the heat treatment chamber 1 . Furthermore, the entire heat treatment chamber is made of a metal container made of stainless steel or the like, and the conductor is not heated. Now, when microwave power of 500 W is applied, it takes about 4 minutes to heat something to about 1000°C, and Figure 2 shows the relationship between the application time and the heating temperature of the semiconductor substrate.

このようにして、熱処理室1において所要温度
で所要時間加熱処理して活性化が終わると、ゲー
トバルブG3を開いて真空系V3によつて既に真
空排気されているロードロツク室3に移送ベルト
5によつて移送される。
In this way, when the activation is completed by heat treatment in the heat treatment chamber 1 at the required temperature for the required time, the gate valve G3 is opened and the transfer belt 5 is transferred to the load lock chamber 3 which has already been evacuated by the vacuum system V3. It is then transferred.

このように、マイクロ波によつて半導体基板を
加熱すると、昇温又は降温が通常の電気加熱炉を
用いた場合より短時間に行われるために、枚葉式
自動化処理に好適な熱処理装置になる。且つ、こ
のマイクロ波加熱方式は半導体基板のみ加熱され
るから加熱効率が良く、加熱温度の制御も容易で
あり、加熱温度勾配も少なくなつて、更に電気加
熱炉に比較して熱処理装置が簡易化される。ま
た、操作者が熱気にさらされることもない。
In this way, when a semiconductor substrate is heated with microwaves, the temperature can be raised or lowered in a shorter time than when using a normal electric heating furnace, making it a suitable heat treatment device for single-wafer automated processing. . In addition, this microwave heating method heats only the semiconductor substrate, so it has good heating efficiency, the heating temperature is easy to control, the heating temperature gradient is small, and the heat treatment equipment is simpler than an electric heating furnace. be done. Furthermore, the operator is not exposed to hot air.

この本発明にかかる熱処理装置によれば熱処理
室内を10-2Torr以下の高真空に排気しなければ
ならないが、その理由は10-2Torrより高圧下で
は、マイクロ波が被照射物である半導体基板に吸
収されるだけでなく、金属製処理容器内の残留ガ
スにもマイクロ波が吸収されて、その結果、残留
ガスが電離されてプラズマ化され、このプラズマ
の中の電子が半導体基板の表面に頻繁に衝突し
て、半導体基板に電子損傷を与えることが起こる
からでありまた熱処理室を常圧(大気中)にすれ
ば、加熱体(半導体基板)よりの熱伝導によつて
熱処理室全体が加熱されて熱交換率が低下するか
らで、それらを回避するための圧力条件である。
しかも、真空中の熱処理は表面酸化などの変質を
防ぐことができて、高品質化に極めて好ましい方
法である。
According to the heat treatment apparatus according to the present invention, the heat treatment chamber must be evacuated to a high vacuum of 10 -2 Torr or less. Microwaves are not only absorbed by the substrate, but also by the residual gas in the metal processing container, and as a result, the residual gas is ionized and becomes plasma, and the electrons in this plasma are transferred to the surface of the semiconductor substrate. If the heat treatment chamber is kept at normal pressure (in the atmosphere), the heat conduction from the heating element (semiconductor substrate) will cause damage to the semiconductor substrate. This is because the heat exchange rate decreases due to heating, and the pressure conditions are designed to avoid this.
Furthermore, heat treatment in vacuum can prevent surface oxidation and other deterioration, and is an extremely preferable method for improving quality.

本発明にかかる熱処理装置は上記熱処理例の他
に、化学気相成長(CVD)法などの被膜形成処
理にも適用でき、例えば、減圧CVD法は真空度
10-2Torr程度であるから、本発明を適用して問
題がない。また、表面酸化処理も酸素を流入させ
て真空度にしてSiO2膜を生成させることができ
る。その他の低温加熱処理への利用も容易に考え
られる。
In addition to the heat treatment examples described above, the heat treatment apparatus according to the present invention can also be applied to film forming processes such as chemical vapor deposition (CVD).
Since it is about 10 -2 Torr, there is no problem in applying the present invention. In addition, surface oxidation treatment can also generate a SiO 2 film by introducing oxygen and creating a vacuum level. Applications for other low-temperature heat treatments are also easily conceivable.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように、本発明にかか
る熱処理装置は枚葉式の自動化処理に適用できる
効果が大きく、しかも、加熱効率の向上のために
電力節約、装置の簡易化などの長所があり、更
に、半導体装置の品質向上にも寄与するものであ
る。
As is clear from the above description, the heat treatment apparatus according to the present invention has great effects in being applicable to single-wafer automated processing, and has advantages such as power saving and simplification of the apparatus due to improved heating efficiency. Furthermore, it also contributes to improving the quality of semiconductor devices.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明にかかる半導体熱処理装置の要
部断面、第2図はマイクロ波印加時間と半導体基
板の加熱温度との関係図である。 図中、1は熱処理室、2,3はロードロツク
室、4は半導体基板、5は移送ベルト、6は透過
窓、7はマイクロ波導波管、V1,V2,V3は
排気系、G2,G3はゲートバルブを示してい
る。
FIG. 1 is a sectional view of a main part of a semiconductor heat treatment apparatus according to the present invention, and FIG. 2 is a diagram showing the relationship between microwave application time and heating temperature of a semiconductor substrate. In the figure, 1 is a heat treatment chamber, 2 and 3 are load lock chambers, 4 is a semiconductor substrate, 5 is a transfer belt, 6 is a transmission window, 7 is a microwave waveguide, V1, V2, and V3 are exhaust systems, and G2 and G3 are Showing gate valve.

Claims (1)

【特許請求の範囲】[Claims] 1 金属製熱処理室にゲートバルブを介して排気
系を有するロードロツク室を複数個具備せしめ、
一方の該ロードロツク室を通じて前記金属製熱処
理室へ半導体基板を送入し、他方の該ロードロツ
ク質へ前記金属製熱処理から半導体基板を送出す
ると共に、前記金属製熱処理室の内部を
10-2Torr以下の圧力に保持し、該金属製熱処理
室内において前記半導体基板をマイクロ波透過窓
を透過させたマイクロ波によつて照射して熱処理
するように構成したことを特徴とする半導体熱処
理装置。
1 A metal heat treatment chamber is equipped with a plurality of load lock chambers each having an exhaust system via a gate valve,
A semiconductor substrate is fed into the metal heat treatment chamber through one of the load lock chambers, and the semiconductor substrate is sent from the metal heat treatment to the other load lock, and the inside of the metal heat treatment chamber is
A semiconductor heat treatment characterized in that the semiconductor substrate is maintained at a pressure of 10 -2 Torr or less and heat treated in the metal heat treatment chamber by irradiating the semiconductor substrate with microwaves transmitted through a microwave transmission window. Device.
JP13415982A 1982-07-30 1982-07-30 Method for heating semiconductor substrate Granted JPS5925229A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13415982A JPS5925229A (en) 1982-07-30 1982-07-30 Method for heating semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13415982A JPS5925229A (en) 1982-07-30 1982-07-30 Method for heating semiconductor substrate

Publications (2)

Publication Number Publication Date
JPS5925229A JPS5925229A (en) 1984-02-09
JPH0376021B2 true JPH0376021B2 (en) 1991-12-04

Family

ID=15121836

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13415982A Granted JPS5925229A (en) 1982-07-30 1982-07-30 Method for heating semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS5925229A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04127532A (en) * 1990-09-19 1992-04-28 Nec Yamagata Ltd Heat treatment of semiconductor wafer
JP2011134836A (en) * 2009-12-24 2011-07-07 Toshiba Corp Method of manufacturing backside illumination type imaging device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57178316A (en) * 1981-04-27 1982-11-02 Hitachi Ltd Manufacture of semiconductor element and device therefor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57178316A (en) * 1981-04-27 1982-11-02 Hitachi Ltd Manufacture of semiconductor element and device therefor

Also Published As

Publication number Publication date
JPS5925229A (en) 1984-02-09

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