JPH0374879B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a testing and diagnosing method for a unified electronic exchange system, and more particularly to a testing and diagnosing method that can accurately detect failures within a memory device.

(b) Conventional technology and problems Traditionally, electronic exchanges have duplexed each device to increase reliability, but in the case of small electronic exchanges, there is a single system that is not duplexed. In particular, when the main memory is duplexed, if a failure occurs in the random access memory, which is the main memory, and a parity check error occurs, it will be reported to the central control unit as an unrecoverable error because it is not duplexed. An interrupt that cannot be masked (NMi: non-maskable interrupt) occurs.

This interrupt activates interrupt processing in the central control unit, resets the program being processed from the main memory, and reloads the program from a floppy disk or the like into the main memory to handle the failure.

FIG. 1 is a schematic diagram for explaining the operation of a conventional system when a parity check error occurs in a random access memory.

In the figure, CC is a central control unit, RAM is a random access memory, PC is a parity checker, FD is a floppy disk, and FDC is a floppy disk controller.

Note that the same symbols represent the same objects throughout the figures below.

Random access memory RAM according to the diagram below
The corrective action will be explained.

When a failure occurs in the random access memory RAM, the parity checker PC generates a parity error signal and a non-maskable interrupt (NMi).
occurs and interrupts the central controller CC.

As a result, a program stored in a read-only memory (not shown) is started, reads the correct data from the floppy disk FD, writes this data to the location where the parity error occurred in the random access memory RAM, and automatically The data was corrected.

Therefore, even if the parity error occurs from the memory while testing a unified electronic exchange system with such a function, an interrupt NMi that cannot be masked will occur, and the above fault handling will be automatically performed. The drawback was that testers were unable to accurately grasp the state of memory failures because the test was conducted at a later date.

Further, when testing a system, when a parity error occurs from the random access memory RAM, a test program for detecting a faulty address may be executed without automatically correcting it.

This test program is also stored in a part of the unified random access memory RAM, so if there is a faulty part other than the above somewhere in this storage part, a parity error will occur again during the execution of the test program. will appear.

Due to this parity error, an interrupt NMi that cannot be masked occurs again, and the test program must be restarted.

Therefore, there was a drawback that it would fall into an infinite loop as follows: ``Test program start address → Test program execution → Failure point reached → Parity error generated → NMi interrupt generated → Test program start address'' .

(c) Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art, to make it possible to accurately grasp the state of memory failures, and to prevent falling into an infinite loop even when a failure occurs during the execution of a test program. The objective is to provide a test diagnosis method that is not available.

(d) Structure of the Invention According to the present invention, when a parity check error signal is output from the main memory that is unified, an interrupt that cannot be masked is generated from the main memory to the central control unit. and, in an electronic exchange having a function of reloading the main memory by activating an interrupt process in the central control unit, the central control unit performs the reloading of the main memory, or the test program A test diagnosis method characterized by providing a register for determining whether to execute a parity check, and a parity check error signal issued from a unified main memory to a central control unit from the main memory. In an electronic exchange having a function of reloading the main memory by activating the interrupt processing in the central control unit when a non-maskable interrupt occurs, the central control unit executes the reloading of the main memory. A register is provided for determining whether to execute the test program or to execute the test program, and when the non-maskable interrupt processing is activated when the register is in the execution state of the test program,
This is achieved by providing a test diagnostic method characterized in that the central controller, after identifying the state of the register, inverts the register to the state that performs the reloading and executes the test program.

That is, according to the present invention, one register is provided, and the memory test is started after turning on this register in advance, and a parity check error signal is output from the memory, a non-maskable interrupt is activated, and the above-mentioned master is automatically activated. By checking whether the register is on or not before reloading to memory, and not reloading if it is on, it is possible to accurately understand the failure state and also to make it easier to run the test program. This has the effect of not falling into an infinite loop even if there is a failure inside.

(e) Embodiment of the Invention FIG. 2 is a schematic diagram showing an embodiment of the test/diagnosis method according to the present invention.

In the figure, REGn is the NMi restart instruction register.

FIG. 3 is a flowchart explaining the operation of FIG. 2.

When testing the random access memory RAM according to the present invention, the NMi restart instruction register REGn is set in advance.
Turn on and start the test.

Random access memory as before
If a failure occurs in the RAM, the parity
The PC generates a parity error signal and a non-maskable interrupt (NMi) occurs to the central controller.
Interrupt CC.

As a result, a program stored in a read-only memory (not shown) is activated.

As shown in FIG. 3, when this program starts, it first checks the state of the NMi restart instruction register REGn.

If the NMi restart instruction register REGn is off, that is, "no instruction", the central controller CC performs NMi failure reprocessing as before, that is, transfers data from the floppy disk FD to the random access memory RAM via the data bus BUS. Reload and fix automatically.

On the other hand, if the NMi restart instruction register REGn is on, that is, "instruction valid", the central controller CC first
Flip the NMi restart instruction register REGn off,
In other words, ``cancellation of restart instruction'' is performed.

Next, ``Jump to NMi restart address.''
This is the failed random access memory
Jumping to the storage location of a test program for detecting faulty addresses in RAM, etc.
In this case, the central controller CC executes the test program described above.

From then on, if an NMi interrupt occurs until the NMi restart instruction register REGn is turned on again, the NMi fault will be reprocessed as before, that is, reloaded from the floppy disk FD to the random access memory RAM and automatically corrected. .

As described above, by turning on the NMi restart instruction register REGn, when a parity error signal occurs in the random access memory RAM, reloading is not automatically performed, which is effective in detecting a failure.

In addition, if a parity error signal is also generated from within the storage location of this test program while the above test program is being executed, if the NMi restart instruction register REGn remains on, the test program will jump to the start again and continue indefinitely. However, as mentioned above, after the central controller CC identifies the state of the NMi restart instruction register REGn, it inverts the NMi restart instruction register REGn to the state where reloading is performed, so an infinite loop is prevented. can.

(f) Effects of the Invention As explained in detail above, according to the present invention, the test diagnosis can accurately grasp the state of a memory failure and will not fall into an infinite loop even if a failure occurs during the execution of a test program. This has the great effect of making it possible to implement the method.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram for explaining the operation of a conventional system when a parity check error occurs in a random access memory, and FIG. 2 is a schematic diagram showing an embodiment of a test diagnosis method according to the present invention. FIG. 3 is a flowchart explaining the operation of FIG. 2. In the figure, CC is the central control unit, RAM is the random access memory, PC is the parity checker, FD is the floppy disk, FDC is the floppy disk controller, REGn is the NMi restart instruction register,
BUS is a data bus.

Claims (1)

[Claims] 1. When a parity check error signal is output from the main memory which is unified, an interrupt that cannot be masked is generated from the main memory to the central control unit, and the central control unit processes the interrupt. In an electronic exchange having a function of reloading the main memory when activated, the central controller has a register that determines whether to reload the main memory or execute a test program. A test diagnosis method characterized by the following. 2 When a parity check error signal is issued from the main memory that is unified, an interrupt that cannot be masked is generated from the main memory to the central control unit, and the interrupt processing is activated in the central control unit. In an electronic exchange having a function of reloading the main memory, a register is provided for determining whether the central control unit performs the reloading of the main memory or executes a test program, and the register is configured to If the non-maskable interrupt processing starts while the test program is running,
A test diagnosis method characterized in that, after identifying the state of the register, the central control unit inverts the register to a state for performing the reloading and executes the test program.