JPH0364985A - Printed wiring board and manufacture thereof - Google Patents

Printed wiring board and manufacture thereof

Info

Publication number
JPH0364985A
JPH0364985A JP20175889A JP20175889A JPH0364985A JP H0364985 A JPH0364985 A JP H0364985A JP 20175889 A JP20175889 A JP 20175889A JP 20175889 A JP20175889 A JP 20175889A JP H0364985 A JPH0364985 A JP H0364985A
Authority
JP
Japan
Prior art keywords
layer
formed
ni
au
composed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20175889A
Other versions
JP2795475B2 (en
Inventor
Hiroshige Hibi
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP1201758A priority Critical patent/JP2795475B2/en
Publication of JPH0364985A publication Critical patent/JPH0364985A/en
Application granted granted Critical
Publication of JP2795475B2 publication Critical patent/JP2795475B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE: To obtain a conductor circuit section which is thick, fine, and high in density and has no bridge by a method wherein an Ni-Au plating layer is composed of a first Ni layer formed on the conductor circuit section, a second Ni layer formed thereon, and an Au layer formed on the second Ni layer.
CONSTITUTION: A printed wiring board is composed of a pattern 1 which is formed on a board 9. The pattern 1 is composed of a copper foil 11, a copper plating layer 12 formed thereon, a first Ni layer 13 formed on the layer 12, a second Ni layer 14 formed thereon, and an Au layer 15 formed on the layer 14. An Ni-Au plating layer is composed of the first Ni layer 13 formed on conductor circuit sections 11 and 12, the second Ni layer 14 formed thereon, and the Au layer 15 formed on the Ni layer 14.
COPYRIGHT: (C)1991,JPO&Japio
JP1201758A 1989-08-03 1989-08-03 Printed wiring board and manufacturing method thereof Expired - Lifetime JP2795475B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1201758A JP2795475B2 (en) 1989-08-03 1989-08-03 Printed wiring board and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1201758A JP2795475B2 (en) 1989-08-03 1989-08-03 Printed wiring board and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH0364985A true JPH0364985A (en) 1991-03-20
JP2795475B2 JP2795475B2 (en) 1998-09-10

Family

ID=16446453

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1201758A Expired - Lifetime JP2795475B2 (en) 1989-08-03 1989-08-03 Printed wiring board and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP2795475B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6074567A (en) * 1997-02-12 2000-06-13 Shinko Electric Industries Co., Ltd. Method for producing a semiconductor package

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5992598A (en) * 1982-11-18 1984-05-28 Narumi China Corp Ceramic substrate for carrying electronic part
JPH01216594A (en) * 1988-02-25 1989-08-30 Ngk Spark Plug Co Ltd Manufacture of ceramic circuit board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5992598A (en) * 1982-11-18 1984-05-28 Narumi China Corp Ceramic substrate for carrying electronic part
JPH01216594A (en) * 1988-02-25 1989-08-30 Ngk Spark Plug Co Ltd Manufacture of ceramic circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6074567A (en) * 1997-02-12 2000-06-13 Shinko Electric Industries Co., Ltd. Method for producing a semiconductor package

Also Published As

Publication number Publication date
JP2795475B2 (en) 1998-09-10

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