JPH0364182A - Pseudo noninterlace receiver - Google Patents

Abstract

PURPOSE:To obtain a picture with high quality while eliminating jerkiness and flicker or the like of a moving picture in the vertical direction by generating a line signal displayed with a deviation with an interpolation processing suitable for the picture movement. CONSTITUTION:A picture quality improving circuit 5 is inserted between a video signal processing circuit 1 and a display device 4 and an interpolation processing circuit 2 is provided to the circuit 5 to compensate deviation of a phase in the vertical direction. That is, a value estimated to be at a scanning sampling pint is predicted and generated by the interpolation processing between scanning lines of the input signal as to either odd or even field. The interpolation processing is implemented such that no modification is given when a picture is at a standstill and upper and lower scanning line signals are averaged when the picture is moving and they are mixed with a proper ratio in response to the degree of the movement. The input signal is displayed as it is as to the other field. Thus, jerkiness or flicker or the like of an object moving in the vertical direction is eliminated to improve the quality of the displayed picture.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improving the display quality of a pseudo-non-interlaced scanning receiver used in liquid crystal displays and the like.

Due to its structure, it is difficult to increase the size and number of pixels of a vertical clamped liquid crystal display, etc., so it is often difficult to increase the size and number of pixels. In this case, the current television system, 525 lines 2:1 (NTSC-M) 'P6252:
1 (PAL-B, etc.), one way to reduce the display area is to display even and odd field images on the same scanning line, which effectively reduces the number of scanning lines. A pseudo-non-interlaced scanning method is used in which the current value is 172. For example, if the number of effective scanning lines in the NTSC system is 480, half of that number, 240, is used to display the entire scanning line.

■However, in the conventional pseudo-non-interlace method described above, the vertical phase is shifted between the even and odd fields, so objects moving vertically may exhibit jerkiness or flicker. ), or the dot crawl that occurs in the interlaced scanning method becomes line flicker of vertical lines, increasing the disturbance.

An object of the present invention is to provide a pseudo-non-interlaced receiver that solves these problems.

In order to achieve the above object, the pseudo non-interlaced receiver of the present invention includes a field determining means for determining whether the fields of an input video signal are odd or even, and a field determining means for determining the motion of an image from the input video signal and calculating a motion coefficient. The motion coefficient generating means and the image signal at each point of either odd or even field,
It is characterized by comprising an interpolation signal generating means for interpolating and generating image signals above and below the point using motion coefficients, and a switch for switching the display signal between an input signal and an interpolation signal for each odd-even field.

For standing knee - When the field determining means determines that the field is, for example, an odd-numbered field, the input signal is displayed as is by a switch. When it is determined that the field is an even-numbered field, signals interpolated from the upper and lower points in consideration of the motion coefficients are displayed.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the overall configuration of a pseudo-non-interlaced television receiver to which the present invention is applied. The video signal processing circuit 1 and display 4 are equivalent to those of the conventional receiver system shown in FIG. In this embodiment, an image quality improvement circuit 5 for a pseudo non-interlaced receiver is inserted between the two. The image quality improvement circuit 5 includes an interpolation processing circuit 2 according to the present invention and a vertical band limiting circuit 3.

Here, before giving a specific explanation of these circuits, the reason for adopting this configuration will be explained.

As shown in FIG. 6(b), the pseudo non-interlaced scanning method uses the normal interlaced scanning method (
As in Figure 6(a)), sampling is performed at 80Hz (i/60 seconds), and the position is set at 1 per field in the vertical direction of the screen.
The display is shifted up and down by 72 lines. In other words, originally, the lines of the previous and subsequent fields (A s 'A
+, BlBt, C, -C,) should be displayed on the same line (A', Bo, Co, etc.).

If we look at this in a two-dimensional space where the time axis is one vertical axis V, we can see that the 7th
It is to sample the points on the grid as shown in the figure, and when this sampling point is expressed by a δ function, ΣΣδ(t-m-1/(2-f,), V-n-1 /
ν+). Here, fll is the frame frequency (NT
30 Hz for SC), ν1 is the line frequency (262,
51ph), and 1/(2·f, ) and 1/ν are the sample point intervals in the time axis direction and the field vertical direction, respectively. At this two-dimensional sample point, a two-dimensional image g (t, V)
When , the sampled signal is expressed by the following equation.

g (t, V)-ΣΣδ(-m-1/(2・f a
), V-n・1/νt) When this is Fourier transformed, G(f, ν)ne2・f,・ν1 =2・f,・ν.

becomes.

That is, by two-dimensional sampling of the t-V space by pseudo non-interlaced scanning, the spectrum G(f, ν) of the original signal shown in FIG. 8(a) is changed to each sample as shown in FIG. 8(b). The spectrum contains harmonic components that are integral multiples of the frequency.

However, in general, the video signal g(t, V) is not band-limited by ν to ν1/2 in the vertical frequency domain, so as shown in FIG.

G(f, C+), (f, C2·ν,), etc. overlap each other, and aliasing noise is generated.

In order to prevent the occurrence of repetitive noise due to such unnecessary bands, the frequency of the original signal g (t, V) in the f direction and the ν direction must be set such that f<f, ν<ν+/2 (j ) must be bandwidth limited.

Therefore, in this embodiment, a vertical band limiting circuit 3 is provided.

Next, in the pseudo non-interlace method, since the vertical phase of the even field and the odd field is shifted by π/2 with respect to the Problems have arisen, such as the occurrence of - or an increase in line flicker due to dot crawl. Therefore, in this embodiment, an interpolation processing circuit 2 is provided to compensate for this vertical phase shift.

The configuration and operation of each circuit will be explained below.

First, the interpolation processing circuit 2 according to the present invention solves the vertical phase difference (1/2 line).

That is, if the odd field 6 and even field 7 are simply displayed alternately on the screen as shown in FIG. 3(a), the above-mentioned problem will occur.

Therefore, in this embodiment, for either odd or even field (for example, even field 7), the value that should be at the scanning sample point (display point) is predicted by interpolation processing between the scanning lines of the input signal. and create it. This interpolation process is
If the image is still, it will remain as it is, as shown in Figure 3 (b), and if it is moving, it will remain as it is, as shown in Figure 3 (C).
), the upper and lower scanning line signals are averaged and mixed in appropriate ratios depending on the degree of movement. For the other field (odd field 6), the input signal is displayed as is.

A specific example of the configuration of this interpolation processing circuit 2 is shown in FIG. 4. The input signal C is divided into two parts, one of which is directly connected to one terminal (odd) of the changeover switch 16. The other terminal is connected to the other terminal (even) of the changeover switch 16 via the three-dimensional inter-tank processing circuit 20. This three-dimensional intertank processing circuit 20
However, the input signal is divided into two parts, one is IH (1 line) delay circuit 10 and 1F (1 field) delay circuit 11.
and enters the mixing circuit 14 (A). The other is adder 12
After being added to the signal B after 1H delay with 1=1, it is input to the mixing circuit 14 (E). In the mixing circuit 14, the motion coefficient K (0≦to≦1; When at rest = 01 When the movement exceeds a predetermined value = 1), the signals A and E are mixed at a ratio of (1-K): and sent to the changeover switch 16 (D), the changeover switch 16 outputs the field discrimination circuit 15. It operates based on the field (odd-even) judgment output of
When the field is an odd field, the input signal C is directly used as the output F, and when the field is an even field, the output of the three-dimensional inter-vessel processing circuit 20 is used as the output F.

Referring to FIG. 4(b), to explain the even field interpolation processing by this circuit, in the case of a still image (K=O), the signal A delayed by 1H and IF is output to the same location on the screen. . In this case, since the image is still,
Even if IH and IF are delayed, the same data will be obtained. In the case of a screen with rapid movement (K=1), the average signal of the input signal C and the IH-delayed signal B is displayed on the screen. If the motion of the image is somewhere between these, the mixing circuit 14 divides the motion coefficients according to the value of the motion coefficient output from the motion coefficient generation circuit. This motion-adaptive interpolation process, which smooths the changes in the image signal between odd fields at one point and the next, ensures that even when the image is moving vertically, its motion appears smooth. As a result, line flicker interference on vertical lines due to dot crawling is reduced.

Next, the vertical band M@circuit 3 is a low-pass filter for removing in advance the vertical high-frequency components that are folded in the display sampling at 262.51:1 (the shaded area in FIG. 9). A specific example of the configuration is shown in Figure 5 (
As shown in a), two types of transversal filters f
An example is one in which tri and f5,2 are connected in a subordinate manner.

The first filter f trl has two LH3! ! It is composed of a delay circuit and an adder, and outputs an output signal 5louv for an input signal 511H to 81ouv= (1/4)311N+ (1/2) D
IN(SIIN)+ (1/4) D aH(S1+
N) (Here, DIM (SLIM), D2H (SIIN
) represent the IH delay and 2H delay of the 811H signal, respectively. ), then its attenuation characteristic is shown in Figure 5 (b
), (1/2)ν+(131,251ph
) has a valley. Second filter f tr2
has the same configuration as the first filter f tri, but IH
262H delay (IF delay +〇, 5H delay) instead of delay circuit
using advanced) circuits.

The attenuation characteristics in this case are ν, as shown in FIG. 5(C).
Let be the valley. Therefore, as shown in FIG. 5(d), the output of the vertical band limiting circuit 3 in which these are connected in series is (
1/2) ν1 or more are cut. Therefore, vertical repetitive noise is removed, and moiré and the like on the screen are prevented.

Note that the delay circuit used here can be configured using, for example, a semiconductor memory or the like.

As explained above, according to the present invention, in a pseudo non-interlaced receiver in which images of odd or even fields are displayed with a shift of 172 lines, the signal of the line displayed with the shift is Since the image is generated by interpolation processing adapted to the movement of the image, jerkiness, flicker, etc. of an image with vertical movement are removed, and a high-quality image can be obtained.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a pseudo non-interlaced receiver which is an embodiment of the present invention, Fig. 2 is a block diagram of a conventional receiver of the same scheme, and Figs. 3(a), (b), (C ) is an explanatory diagram showing the display contents of odd and even fields in the embodiment, FIG. 4(a) is a block diagram showing a specific configuration example of the interpolation processing circuit of the embodiment, and FIG. 4(b) is the interpolation processing. FIG. 5(a) is a block diagram showing a specific configuration example of the vertical band limiting circuit of the embodiment, and FIG. 5(b) is an explanatory diagram for explaining the contents.
, (c) and (d) are attenuation characteristic diagrams of each transversal filter and the entire circuit constituting the vertical band limiting circuit,
6(a) and 6(b) are explanatory diagrams showing the display method of each field in interlaced scanning and pseudo-non-interlaced scanning, respectively, and FIG. 7 is a time t-frame vertical axis V
FIG. 8(a) is a graph showing the distribution of sampling points in a two-dimensional space. FIG. 8(a) is a graph showing the temporal frequency f-vertical frequency band of the original image signal. FIG.
FIG. 9, which is a graph showing the spread of the ν band, is also a graph showing how the image signal spectra overlap in the f-ν space. 14...Mixing circuit 20...Three-dimensional interpolation processing circuit Application Sharp Corporation

Claims (1)

[Scope of Claims] Field discrimination means for discriminating whether fields of an input video signal are odd or even; motion coefficient generation means for determining motion of an image from the input video signal and generating a motion coefficient; and each of the fields, either odd or even. The present invention includes interpolation signal generation means for generating an image signal of a point by interpolation from image signals above and below the point using a motion coefficient, and a switch for switching a display signal between an input signal and an interpolation signal for each odd-even field. This is a pseudo-non-interlaced receiver.