JPH0355832A - Semiconductor production device - Google Patents

Semiconductor production device

Info

Publication number
JPH0355832A
JPH0355832A JP19052889A JP19052889A JPH0355832A JP H0355832 A JPH0355832 A JP H0355832A JP 19052889 A JP19052889 A JP 19052889A JP 19052889 A JP19052889 A JP 19052889A JP H0355832 A JPH0355832 A JP H0355832A
Authority
JP
Japan
Prior art keywords
electrode plates
reaction tube
reaction
pair
cathode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19052889A
Other languages
Japanese (ja)
Inventor
Rintarou Okamoto
倫太郎 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP19052889A priority Critical patent/JPH0355832A/en
Publication of JPH0355832A publication Critical patent/JPH0355832A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To gasify a reaction product generated through sputtering, to prevent the adhesion of the reaction product onto a wall surface in a reaction tube and to obviate the generation of a defective semiconductor device by installing a pair of second electrode plates so as to surround the peripheries of a pair of first electrode plates in the same reaction tube and generating plasma by the second electrode plates. CONSTITUTION:A reaction tube 103 housing a semiconductor substrate 108, a pair of first electrode plates 104 being mounted into the reaction tube 103 and having an anode 104a and a cathode 104b, a pair of second electrode plates 105 being set up so as to surround the peripheries of the first electrode plates 104 and having anodes 105a and cathodes 105b, a plurality of reaction gases injected into the reaction tube 103 to which the first electrode plates 104 and the second electrode plates 105 are fitted, and high-frequency power supplies 107a, 107b applying an electric field to the first electrode plates 104 and the second electrode plates 105 and generating plasma in said reaction gases are provided. Oxygen gas is introduced from a second etching-gas introducing port 101b, and a second plasma region 109b in which oxygen gas is changed into plasma, is generated between the second anode plate 105a and the second cathode plate 105b.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はエッチングに係る半導体製造装置に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a semiconductor manufacturing apparatus for etching.

(従来の技術) 従来のエッチング装置にはスパッタリングを利用してエ
ッチングを行なうものがあり、半導体基板がエッチング
されることにより反応生成物が発生し反応管内の壁面に
付着するということがあった。
(Prior Art) Some conventional etching apparatuses perform etching using sputtering, and when a semiconductor substrate is etched, reaction products are generated and adhere to the walls of the reaction tube.

以下、従来例のスバッタエッチング装置を第2図を用い
て説明する。まずエッチングガス導入口(201)と排
気口(202>を有した反応管(203)内に例えば平
行平板形の電極として陽極板(206a)と陰極板(2
06b)が対になり設けられている。陽極板(206a
)は反応管(203)外で接地されており、陰極板(2
06b)ハ反応管(203)外で高周波電g(207)
 ニ接続されている。陰極板(208b)上には半導体
基板(208)が設けられている。
A conventional sputter etching apparatus will be described below with reference to FIG. First, in a reaction tube (203) having an etching gas inlet (201) and an exhaust port (202>), for example, an anode plate (206a) and a cathode plate (202) are placed as parallel plate electrodes.
06b) are provided in pairs. Anode plate (206a
) is grounded outside the reaction tube (203), and the cathode plate (2
06b) High frequency electricity (207) outside the reaction tube (203)
2 are connected. A semiconductor substrate (208) is provided on the cathode plate (208b).

上記構成によればエッチングの方法として、まず反応管
(203)の排気口(202)から真空ポンプを使用し
反応管(203)内が真空状態になる。次にエッチング
ガス導入口(201)から反応ガスとしてArガスが導
入される。このあと、陽極板(208a)と陰極板(2
06b)との間に高周波電源(207)により高周波電
界が印加されArガスがプラズマ化してプラズマ領域(
209)が発生する。プラズマ領域(209)によりA
r+イオンが半導体基板(2H)上に形成されているポ
リイミド膜(図示せず)に衝突することでエッチングが
行なわれる。このとき、半導体基板(208)より放出
される反応生成物が反応管(203)内の壁面に付着す
る。エッチング後は例えば同様にArガスが注入されて
いる他の反応管に半導体基板(208)が移し変えられ
、その反応管内のArガスが排気され半導体基板(20
8)が取り出される。
According to the above configuration, as an etching method, first, a vacuum pump is used from the exhaust port (202) of the reaction tube (203) to bring the inside of the reaction tube (203) into a vacuum state. Next, Ar gas is introduced as a reaction gas from the etching gas inlet (201). After this, the anode plate (208a) and the cathode plate (208a)
A high frequency electric field is applied by the high frequency power source (207) between the
209) occurs. A by plasma region (209)
Etching is performed by the r+ ions colliding with a polyimide film (not shown) formed on the semiconductor substrate (2H). At this time, reaction products released from the semiconductor substrate (208) adhere to the wall inside the reaction tube (203). After etching, the semiconductor substrate (208) is transferred to another reaction tube into which Ar gas is similarly injected, for example, and the Ar gas in the reaction tube is exhausted and the semiconductor substrate (208)
8) is taken out.

このようにしてエッチングを行なうことができるがAr
  イオンの衝突により半導体基板(208)から炭化
された有機物である反応生成物が発生してしまいこれが
反応管(203)内の壁面に付着するということがある
。反応管(203)内の壁面に付着した反応生成イ駿剥
離することがあり、ダストの発生の原因となっている。
Etching can be performed in this way, but Ar
A reaction product, which is a carbonized organic substance, is generated from the semiconductor substrate (208) due to the collision of ions, and this may adhere to the wall surface inside the reaction tube (203). Reaction products adhering to the wall inside the reaction tube (203) may peel off, causing dust generation.

このため、このダストが半導体基板(208)上に付着
するとコンタクト不良、及び導通不良といった半導体装
置の不良という問題が起こってしまう。
Therefore, if this dust adheres to the semiconductor substrate (208), problems such as poor contact and poor conduction will occur in the semiconductor device.

(発明が解決しようとする課題) 以上詳述したように従来においては、スパッタリングに
より反応管内の壁面に付着した反応生成物が剥離され、
これが半導体基板に付着することがあり、半導体装置の
不良が起こっていた。
(Problems to be Solved by the Invention) As detailed above, in the past, the reaction products adhering to the wall inside the reaction tube were peeled off by sputtering.
This sometimes adheres to the semiconductor substrate, causing defects in the semiconductor device.

本発明においてはスパッタリングにより発生する反応生
成物をガス化させることにより、反応管内の壁面に反応
生成物が付着することを防ぎ半導体装置の不良が発生す
ることを防ぐことを目的とする。
An object of the present invention is to gasify the reaction products generated by sputtering, thereby preventing the reaction products from adhering to the wall surface of the reaction tube and thereby preventing the occurrence of defects in semiconductor devices.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明によれば半導体基板を収容する反応管と、前記反
応管内に設けられ陽極と陰極とを有する1対の第1電極
板と、前記第1電極板の周囲を囲むように設けられ陽極
と陰極とを有する1対の第2電極板と、前記第1電極板
、及び前記第2電極板の設けられた前記反応管内に注入
される複数の反応ガスと、前記第1電極板、及び前記第
2電極板に電界を印加し前記反応ガスにプラズマを発生
させる高周波電源とを具備したことを特徴とする半導体
装置を提供する。
(Means for Solving the Problems) According to the present invention, a reaction tube that accommodates a semiconductor substrate, a pair of first electrode plates provided in the reaction tube and having an anode and a cathode, and a pair of second electrode plates surrounding the periphery and having an anode and a cathode; a plurality of reaction gases injected into the reaction tube in which the first electrode plate and the second electrode plate are provided; , the first electrode plate, and a high frequency power source that applies an electric field to the second electrode plate to generate plasma in the reaction gas.

(作 用) 上記構成によれば同一反応管内に1対の第1電極板の周
囲を囲むように1対の第2電極板を設けて第2電極板に
よりプラズマを発生させ、イオン化した物質とスパッタ
リングにより発生した反応生戒物とを反応させてガス化
させることにより反応管内の壁面に反応生成物が付着す
ることを防ぐことができる。
(Function) According to the above configuration, a pair of second electrode plates are provided in the same reaction tube so as to surround a pair of first electrode plates, and plasma is generated by the second electrode plate, and ionized substances and By reacting with the reaction products generated by sputtering and gasifying them, it is possible to prevent the reaction products from adhering to the wall surface inside the reaction tube.

(実施例) 以下、本発明における実施例を第1図を用いて説明する
(Example) Hereinafter, an example of the present invention will be described using FIG. 1.

まず、第1のエッチングガス導入口(101a)、第2
のエッチングガス導入口(10lb)、及び排気口(1
02)を有した反応管(103)内の中心部に、例えば
平行平板形の電極として第1陽極板(104a)と第1
陰極板(104b)が対になり設けられている。第1陽
極板(104a)は反応管(103)外で接地されてお
り、第1陰極板(104b)は反応管(103)外で第
1高周波電源(iota)に接続されている。さらに、
反応管(103)内には第2陽極板(105a)と第2
陰極板(105b)が対になり、第1陽極板(104a
)と第1陰極板(104b)の周辺を囲むように設けら
れている。第2陽極板(105a)は反応管(103)
外で接地されており、第2陰極板(105b)は反応管
(103)外で第2高周波電源(107b)に接続され
ている。第1陰極板(104b)上には半導体基板(i
oa)が設けられている。
First, the first etching gas inlet (101a), the second etching gas inlet
Etching gas inlet (10lb) and exhaust port (1
02), a first anode plate (104a) and a first
Cathode plates (104b) are provided in pairs. The first anode plate (104a) is grounded outside the reaction tube (103), and the first cathode plate (104b) is connected to a first high frequency power source (IOTA) outside the reaction tube (103). moreover,
Inside the reaction tube (103) are a second anode plate (105a) and a second anode plate (105a).
The cathode plate (105b) is paired with the first anode plate (104a).
) and the first cathode plate (104b). The second anode plate (105a) is the reaction tube (103)
It is grounded outside, and the second cathode plate (105b) is connected to a second high frequency power source (107b) outside the reaction tube (103). On the first cathode plate (104b) is a semiconductor substrate (i
oa) is provided.

上記構成によれば、このエッチング方法は、まず反応管
(103)の排気口(102)から真空ボンブを使用し
反応管(103)内が真空状態になる。次に第1のエッ
チングガス導入口(101a)から反応ガスとしてAr
ガスが導入される。このとき、第2のエッチングガス導
入口(10lb)から酸素ガスが導入される。次に、第
1陽極板(104a)と第1陰極板(104b)との間
に第1高周波電源(107a)により高周波電界が印加
されArガスがプラズマ化して第1プラズマ領域(10
9a)が発生する。同時に、第1陽極板(104a)と
第1陰極板(104b)の周辺を囲むように設けられた
第2陽極板(105a)と第2陰極板(105b)との
間に、第2高周波電源(107b)により高周波電界が
印加され酸素ガスがプラズマ化して第2プラズマ領域(
109b)が発生する。このとき、第1陽極板(104
a)と第1陰極板(104b)上に設けられた半導体基
板(10g)表面のポリイミド膜にAr”イオンが衝突
してエッチングが行なわれる。半導体基板(10g)か
らはエッチングにより炭化した有機物である反応生成物
が発生するが、第2陽極板(105a)と第2陰極板(
105b)との間に発生した酸素イオンとこの反応生成
物が反応しガス化され主にCO ガスが発生する。この
あと、CO2ガス等2 は排気口(102)より排気される。
According to the above configuration, this etching method first uses a vacuum bomb from the exhaust port (102) of the reaction tube (103) to bring the inside of the reaction tube (103) into a vacuum state. Next, Ar is introduced as a reaction gas from the first etching gas inlet (101a).
Gas is introduced. At this time, oxygen gas is introduced from the second etching gas inlet (10 lb). Next, a high frequency electric field is applied between the first anode plate (104a) and the first cathode plate (104b) by the first high frequency power source (107a), and the Ar gas is turned into plasma and the first plasma region (104b) is
9a) occurs. At the same time, a second high-frequency power source is connected between the second anode plate (105a) and the second cathode plate (105b), which are provided so as to surround the first anode plate (104a) and the first cathode plate (104b). A high frequency electric field is applied by (107b), oxygen gas is turned into plasma, and the second plasma region (
109b) occurs. At this time, the first anode plate (104
Ar" ions collide with the polyimide film on the surface of the semiconductor substrate (10g) provided on a) and the first cathode plate (104b) to perform etching. Organic matter carbonized by etching is etched from the semiconductor substrate (10g). A certain reaction product is generated, but the second anode plate (105a) and the second cathode plate (
105b) and this reaction product reacts and is gasified to mainly generate CO 2 gas. After this, CO2 gas etc. 2 is exhausted from the exhaust port (102).

このため反応生成物と酸素が反応しガス化されるため反
応管(103)内の壁面に反応生成物が付着することを
防ぐことができる。従って、反応管(103)内の壁面
に付着した反応生成物が剥離することがなくなり、半導
体基板(108)上にダストとして付着することがなく
なるため、コンタクト不良、及び導通不良といった半導
体装置の不良を防ぐことができる。
Therefore, the reaction product and oxygen react and are gasified, so that it is possible to prevent the reaction product from adhering to the wall surface inside the reaction tube (103). Therefore, the reaction products attached to the wall surface inside the reaction tube (103) will not peel off and will not adhere as dust on the semiconductor substrate (108), resulting in defects in the semiconductor device such as poor contact and poor conduction. can be prevented.

[発明の効果] 本発明によれば反応管内の壁面に付着していた反応生成
物を壁面に付着させることなくガス化させることができ
るため、半導体装置に不良が発生することを防ぐことが
できる。
[Effects of the Invention] According to the present invention, reaction products adhering to the wall surface of the reaction tube can be gasified without adhering to the wall surface, so it is possible to prevent defects from occurring in semiconductor devices. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例におけるスパッタリング装置を
示す構成図、第2図は従来例におけるスパッタリング装
置を示す構成図である。 第1のエッチング・ガス導入口・・・101a,第2の
エッチング・ガス導入口・・・10lb,エッチング●
ガス導入口・・・・・・・・・・・・201、排気口・
・・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・102 、202、反応管・・・
・・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・103 、203、第1陽極板・・・・
・・・・・・・・・・・・・・・・・・・・・・・・・
・104a,第1陰極板・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・104b,第2陽極
板・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・105a,第2陰極板・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・l05b
,陽極板・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・206a,陰極板・・
・・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・208b,第1高周波電源・・・・
・・・・・・・・・・・・・・・・・・・・107a、
第2高周波電源・・・・・・・・・・・・・・・・・・
・・・・・・107b,高周波電源・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・207、
半導体基板・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・108、第1プラズマ領域・・・
・・・・・・・・・・・・・・・・・・109a,第2
プラズマ領域・・・・・・・・・・・・・・・・・・・
・・l09b,プラズマ領域・・・・・・・・・・・・
・・・・・・・・・・・・・・・209。 208
FIG. 1 is a block diagram showing a sputtering apparatus in an embodiment of the present invention, and FIG. 2 is a block diagram showing a sputtering apparatus in a conventional example. First etching gas inlet...101a, second etching gas inlet...10lb, etching●
Gas inlet・・・・・・・・・・・・201、Exhaust port・
・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・102, 202, Reaction tube...
・・・・・・・・・・・・・・・・・・・・・・・・
......103, 203, first anode plate...
・・・・・・・・・・・・・・・・・・・・・・・・
・104a, first cathode plate・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・104b, 2nd anode plate・・・・・・・・・・・・・・・・・・・・・
・・・・・・105a, second cathode plate・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・ l05b
, Anode plate・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・206a, Cathode plate...
・・・・・・・・・・・・・・・・・・・・・・・・
......208b, first high frequency power supply...
・・・・・・・・・・・・・・・・・・107a,
Second high frequency power supply・・・・・・・・・・・・・・・・・・
・・・・・・107b, High frequency power supply・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・207,
Semiconductor substrate・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・108, First plasma region...
・・・・・・・・・・・・・・・・・・109a, 2nd
Plasma area・・・・・・・・・・・・・・・・・・
・・・l09b, Plasma area・・・・・・・・・・・・
・・・・・・・・・・・・・・・209. 208

Claims (1)

【特許請求の範囲】[Claims]  半導体基板を収容する反応管と、前記反応管内に設け
られ陽極と陰極とを有する1対の第1電極板と、前記第
1電極板の周囲を囲むように設けられ陽極と陰極とを有
する1対の第2電極板と、前記第1電極板、及び前記第
2電極板の設けられた前記反応管内に注入される複数の
反応ガスと、前記第1電極板、及び前記第2電極板に電
界を印加し前記反応ガスにプラズマを発生させる高周波
電源とを具備したことを特徴とする半導体装置。
a reaction tube accommodating a semiconductor substrate; a pair of first electrode plates provided in the reaction tube and having an anode and a cathode; and a first electrode plate provided surrounding the first electrode plate and having an anode and a cathode. A plurality of reaction gases injected into the reaction tube provided with a pair of second electrode plates, the first electrode plate, and the second electrode plate, the first electrode plate, and the second electrode plate. A semiconductor device comprising: a high frequency power source that applies an electric field to generate plasma in the reaction gas.
JP19052889A 1989-07-25 1989-07-25 Semiconductor production device Pending JPH0355832A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19052889A JPH0355832A (en) 1989-07-25 1989-07-25 Semiconductor production device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19052889A JPH0355832A (en) 1989-07-25 1989-07-25 Semiconductor production device

Publications (1)

Publication Number Publication Date
JPH0355832A true JPH0355832A (en) 1991-03-11

Family

ID=16259592

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19052889A Pending JPH0355832A (en) 1989-07-25 1989-07-25 Semiconductor production device

Country Status (1)

Country Link
JP (1) JPH0355832A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998033362A1 (en) * 1997-01-29 1998-07-30 Tadahiro Ohmi Plasma device
JP2008526026A (en) * 2004-12-22 2008-07-17 ラム リサーチ コーポレーション Method and structure for reducing byproduct deposition in plasma processing systems
JP2014523144A (en) * 2011-07-29 2014-09-08 クォルコム・メムズ・テクノロジーズ・インコーポレーテッド Sputter etching tool and liner

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998033362A1 (en) * 1997-01-29 1998-07-30 Tadahiro Ohmi Plasma device
US6357385B1 (en) 1997-01-29 2002-03-19 Tadahiro Ohmi Plasma device
US7312415B2 (en) 1997-01-29 2007-12-25 Foundation For Advancement Of International Science Plasma method with high input power
JP2008277306A (en) * 1997-01-29 2008-11-13 Foundation For Advancement Of International Science Plasma device
JP4356117B2 (en) * 1997-01-29 2009-11-04 財団法人国際科学振興財団 Plasma device
JP2008526026A (en) * 2004-12-22 2008-07-17 ラム リサーチ コーポレーション Method and structure for reducing byproduct deposition in plasma processing systems
JP2014523144A (en) * 2011-07-29 2014-09-08 クォルコム・メムズ・テクノロジーズ・インコーポレーテッド Sputter etching tool and liner

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