JPH0353318A - Two-port memory - Google Patents

Abstract

PURPOSE:To simplify the constitution of a computer system together with reduction of the cost by providing a timing control data store area (timing control area) to a 2-port memory in addition to a transfer data store area. CONSTITUTION:A 2-port memory 11 includes a transfer data store area 14 where the 1st and 2nd computers 12 and 13 write and read the transfer data independently of each other and a timing control area 15 where the write/read timing of both computers 12 and 13 are controlled. These two areas 14 and 15 are working independently of each other. Therefore the timing control data can be written into the independent area 15 of the memory 11. As a result, a timing control circuit can be omitted and the constitution of a computer system is simplified together with reduction of the cost.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a two-port memory that allows two computers to write and read data independently of each other.

[Conventional technology]

With 2-board memory that can be shared by two computers,
It is necessary to control the timing of reading and writing on both sides, and a dedicated timing control circuit has conventionally been provided for this purpose.

[Problem to be solved by the invention]

As described above, the two-port memory requires a timing control circuit consisting of hardware to operate, which is one of the causes of complicating the structure of the computer system.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a two-boat memory that can eliminate the need for such a timing control circuit.

[Means to solve the problem]

The present invention provides (i) a transfer data storage area provided for two computers to write and read transfer data independently of each other, and (11) control the timing of write and read by these computers. The two-port memory is provided with a timing control data storage area for storing timing control data.

That is, the present invention achieves the above-mentioned purpose by writing timing control data into independent areas within the two-port memory.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to Examples.

FIG. 1 shows the structure of a computer system using two-board memory in one embodiment of the present invention. The two-port memory 11 used in this embodiment includes a first
and a transfer data storage area 14 provided for the second computers 12 and 13 to write and read transfer data independently of each other, and the write and read timings of these computers 12 and 13. A timing control area l5 storing timing control data to be controlled is provided as an independent area.

FIG. 2 shows the procedure for writing data into this two-port memory.

When the first computer 12 writes data to the 2-port memory 11, this computer 12 reads the timing control area 15 in the 2-port memory 11, and the second computer 13 determines what processing to do with this memory. (step in Figure 2).

The timing control area 15 stores timing control data indicating one of the following five states.

(i) The two-board memory 11 is connected to either computer l2.
, 13 has not been accessed.

(ii) The first computer l2 is writing to the two-board memory l1.

(iii) The second computer 13 is writing to the 2-port memory l1.

(iv) Writing to the two-board memory 11 by the first computer 12 is completed.

(V) 2-port memory 1 by second computer 13
Writing to 1 is complete.

Now, the l-th computer 12 is the second computer 13
Data will be transferred to. When the first computer 12 determines the state (i) described above in step (2) (Y), it can write data to the transfer data storage area 14 of the 2-port memory l1. In this case , the first computer l2 writes data indicating the state (ii) described above into the timing control area 15 before writing data to the two-port memory 1.1 (step ■). Immediately after that, the timing control is performed again. Read area 15 (step ■), and if it is the data you just wrote (Y), the lth computer 1
2 has acquired the right to use the 2-board memory 11. Then, writing of data to the two-port memory 11 is actually started (step ■). first computer 1
2 writes data indicating the state of (iv) described above to the timing control area 15 at the time when this writing is completed (step ■), and ends the process (end).

Note that the 2-port memory 11 in step (i
), the first computer 12 waits to write data until the state (i) is reached (step 2; N). Similarly, step ■
If the right to use could not be acquired due to writing conflict with the second computer 13 (N), return to step 1 and write to the first computer 1 until the state of (i) is reached.
2 will wait for data to be written.

FIG. 3 shows the operation when the second computer reads data after the first computer writes data to the two-port memory.

The second computer 13 reads the timing control area 15 in the two-board memory 11 and performs the above (iv)
>, it is determined that there is a data to be read (step 3; Y in FIG. 3). and,
The second computer 13 has this transfer data storage area 1.
Read the data written in step 4 (step ■
). When the second computer l3 completes this reading, the second computer l3 displays the above (l) in the timing control area 15.
Writes data representing the state of (step ■
). If it is determined in step 2 that there is no data to be read (N), no read processing is performed.

The above has described the transfer of data from the first computer 12 to the second computer 13, but it is also possible to transfer data from the second computer 13 to the first computer 12 using similar processing operations. can.

〔Effect of the invention〕

As explained above, according to the present invention, a timing control data storage area (timing control area) is provided in the two-boat memory in addition to the transfer data storage area. By storing , timing control can be performed without providing an extra circuit. Therefore, it is possible to simplify the structure of a computer system using a two-port memory and to reduce costs.

[Brief explanation of drawings]

The drawings are for explaining one embodiment of the present invention, of which Figure 1 is a system configuration diagram of a computer system using a 2-port memory, and Figure 2 is a diagram showing the system configuration of a computer system using a 2-port memory. A flowchart showing the control, Figure 3 is 2
3 is a flowchart showing control when reading data from a boat memory. 11...2 boat memory, 12...1st computer, l3...
・Second computer, l4...Transfer data storage area, 15...timing control i-distribution area.

Claims (1)

[Claims] A transfer data storage area provided for two computers to write and read transfer data independently of each other, and a timing control area for controlling the write and read timings of these computers. A two-port memory comprising a timing control data storage area for storing data as an independent area.