JPH03504522A - vacuum container - Google Patents

vacuum container

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Publication number
JPH03504522A
JPH03504522A JP2515235A JP51523590A JPH03504522A JP H03504522 A JPH03504522 A JP H03504522A JP 2515235 A JP2515235 A JP 2515235A JP 51523590 A JP51523590 A JP 51523590A JP H03504522 A JPH03504522 A JP H03504522A
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JP
Japan
Prior art keywords
wafer
chamber
clamshell
gas
pins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2515235A
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Japanese (ja)
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JPH0774447B2 (en
Inventor
ウェインバーグ,リチャード・エス
Original Assignee
ノベラス・システムズ・インコーポレイテッド
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Publication of JPH03504522A publication Critical patent/JPH03504522A/en
Publication of JPH0774447B2 publication Critical patent/JPH0774447B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67748Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber horizontal transfer of a single workpiece
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/56Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
    • C23C14/564Means for minimising impurities in the coating chamber such as dust, moisture, residual gases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/6719Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the processing chambers, e.g. modular processing chambers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67751Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber vertical transfer of a single workpiece

Abstract

(57)【要約】本公報は電子出願前の出願データであるため要約のデータは記録されません。 (57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 真空容器 技術分野 本発明は1一般的に半導体ウェーハ処理設備に関し。[Detailed description of the invention] vacuum container Technical field The present invention relates generally to semiconductor wafer processing equipment.

特に主要な真空環境を汚染することなくウェーハの処理を可能にする主真空チェ ンバー内に配置された真空容器に関する。In particular, the main vacuum chamber allows processing of wafers without contaminating the main vacuum environment. It relates to a vacuum container placed within a chamber.

背景技術 半導体ウェーハの製造において、1つの装置で複数の処理工程をなし得ることが 非常に望ましい、最近、ウェーハ上の前および後処理操作が真空環境からウェー ハを取り出すことによりしばしば行われる。このことは、このような前および後 処理工程が、ウェーハを加熱し、ウェーハの表面に捕らえられたガスを取り除く ことを要求するので必要なことである。Background technology In the manufacturing of semiconductor wafers, it is possible to perform multiple processing steps with one device. Highly desirable, recently, pre- and post-processing operations on wafers have been moved from vacuum environments to wafers. This is often done by taking out the Ha. This is before and after like this A processing step heats the wafer and removes gases trapped on the wafer's surface. It is necessary because it demands that.

前および後処理操作が主要チェンバー内で行われていた。しかし、このような従 来技術の欠点、限界は半導体処理の真空の質に主要な真空チェンバー内で生じる 汚染により妥協せざるを得ないことである。前および後操作をなし得るため、そ の装置はさらに付加的チェンバーを有する。このような装置の欠点、限界は、こ のタイプの隔離を使用するときに、スルーブツトを限定しコストを上昇させるこ とである。Pre- and post-processing operations were performed within the main chamber. However, such obedience The drawbacks and limitations of the current technology are the quality of the vacuum in semiconductor processing, which occurs within the main vacuum chamber. We are forced to compromise due to pollution. Because it can perform pre- and post-operations, The device also has an additional chamber. The drawbacks and limitations of such devices are: can limit throughput and increase costs when using this type of isolation. That is.

発明の概要 したがって1本発明の目的は、汚染されことなく真空チェンバー内で並行操作を なし得る装置を提供することである。さらに1本発明の目的はスループットを減 することなく処理のコストを節約できる装置を提供することである。Summary of the invention It is therefore an object of the present invention to carry out parallel operations in a vacuum chamber without contamination. The objective is to provide a device that can achieve this goal. Furthermore, an objective of the present invention is to reduce throughput. It is an object of the present invention to provide an apparatus that can save processing costs without having to do so.

本発明に従い、内部にウェーハホルダーを有する主真空チェンバー内で半導体ウ ェーハを処理し得る装置は。In accordance with the present invention, a semiconductor wafer is placed in a main vacuum chamber having a wafer holder therein. What equipment can process wafers?

クラムシェル(claw 5hell)のような装置を有する。そのクラムシェ ル装置はウェーハホルダーの上に配置される第1の部材、および第1の部材に面 するようにウェーハホルダーの下に配置される第2の部材を有する。第1の部材 および第2の部材はそれぞれ相(mating)表面を有する。第1の部材およ び第2の部材は、その第1の部材および第2の部材のそれぞれの相表面が互いに 密封係合する閉位置と開位置との間で移動できる。閉位置にあるときクラムシェ ル装置は内部チェンバーを形成する。It has a clamshell-like device. That clamshell A first member disposed on the wafer holder and a first member facing the first member. and a second member disposed below the wafer holder to do so. first member and the second member each have a mating surface. The first member and and the second member such that the respective phase surfaces of the first member and the second member are mutually It is movable between a closed position in sealing engagement and an open position. Clamsche when in closed position The device forms an internal chamber.

クラムシェル装置が閉位置にあるとき、主チェンバーの外に内部チェンバーから ガスを排気する手段がさらに含まれる。When the clamshell device is in the closed position, there is no flow from the inner chamber to the outside of the main chamber. A means for venting the gas is further included.

本発明の利点は複数の処理が1つの真空チェンバー内でなし得ることである。半 導体チップに対し広範囲に小さな形状寸法を利用するには、汚染の制御の全形式 を最大限活用することが要求された。クラムシェル装置は。An advantage of the present invention is that multiple treatments can be performed within one vacuum chamber. half Utilizing a wide range of small geometries for conductor chips requires all forms of contamination control. required to make the most of it. Clamshell device.

クラムシェルの内部と主真空チェンバーの残部との間のガス汚染の隔離を維持す る。クラムシェル装置は、非常に単純で、信頼できる低粒子iniでこのような 隔離をなるという重要な利点を有する。また、その機構は伝導性のある僅かな空 間を必要とし、他の真空チェンバー内に取り付けられる。クラムシェル装置によ り主真空チェンバー内で高いスループットを維持できる。このことは分離し、隣 接したチェンバーがスループットを減する従来技術を越えた重要な利点を有する 。スループットを考慮することは、非常に高値な半導体処理設備の成果がその中 で処理し得るウェーハの数で評債されることから主要なポイントである。Maintain isolation of gas contamination between the interior of the clamshell and the rest of the main vacuum chamber. Ru. The clamshell device is a very simple and reliable low-particle ini. It has the important advantage of providing isolation. In addition, the mechanism uses a small amount of conductive air. space required and can be installed inside other vacuum chambers. by clamshell device High throughput can be maintained within the main vacuum chamber. This can be separated and next to Closed chambers have significant advantages over prior art techniques that reduce throughput. . Consideration of throughput means that the performance of very expensive semiconductor processing equipment is one of them. This is the main point because it is evaluated by the number of wafers that can be processed.

本発明のこれらおよび他の目的、利点および特徴は。These and other objects, advantages and features of the invention.

当業者であれば、以下の好適実施例を添付図面および請求の範囲とともに読むこ とにより容易に明らかに成る。Those skilled in the art will appreciate that the following preferred embodiments are read in conjunction with the accompanying drawings and claims. This becomes easily clear.

図面の簡単な説明 第1図は本発明の新規なりラムシェル装置を組み込んだ主真空チェンバーの概略 図である。Brief description of the drawing Figure 1 is a schematic diagram of the main vacuum chamber incorporating the new ram shell device of the present invention. It is a diagram.

第2図は、第1図のクラムシェル装置の拡大図である。FIG. 2 is an enlarged view of the clamshell device of FIG. 1.

第3図は、クラムシェル装置の他の実施例を示す。FIG. 3 shows another embodiment of the clamshell device.

実施例 主真空チェンバー12を有する半導体処理設置1i1110が図示されている。Example A semiconductor processing installation 1i 1110 having a main vacuum chamber 12 is illustrated.

処理設備10は本発明の思想に基づいて主真空チェンバー12内で半導体ウェー ハ16の処理を可能にする装置14を含む。Processing equipment 10 is configured to process semiconductor wafers within a main vacuum chamber 12 based on the concept of the present invention. (c) 16;

本発明の新規な装置14は半導体ホルダー18およびクラムシェル(clas  5hell)のような装置20を含む、クラムシェル装置20は第1の部材22 および第2の部材24を含む、第1の部材22および第2の部材24は互いに向 かい合っている。第1の部材22は相(mating)表面26を、第2の部材 24は対応する相表面28を有する。以下で詳説するように、第1の部材および 第2の部材は、第2図に示す開位置と、開位置(矢印の方向に示す)との閏で互 いに移動可能である。ここでは、第1の部材22の相表面26は第2の部材24 の相表面28と密封的に係合する。クラムシェル装置20が閉位置にあるとき、 内部チェンバー30がそこに形成される。The novel device 14 of the present invention includes a semiconductor holder 18 and a clamshell. The clamshell device 20 includes a device 20 such as a first member 22 (5hell). and a second member 24, the first member 22 and the second member 24 are oriented toward each other. They are in conflict. The first member 22 has a mating surface 26 on the second member. 24 has a corresponding phase surface 28. a first member and a The second member is interchangeable between the open position shown in Figure 2 and the open position (shown in the direction of the arrow). It can be moved easily. Here, the phase surface 26 of the first member 22 is connected to the second member 24. sealingly engages the phase surface 28 of. When the clamshell device 20 is in the closed position, An internal chamber 30 is formed therein.

第2図に良く示しであるように、第2の部材24の相表面28はチャネル32を 有する。0リング34がチャネル32内に配置されている。各相表面26.28 が互いに係合するとき、0リングにより密封シールが達成される。シールはここ で示すようにエラストマーであるr13要はなく、金属あるいは低コンダクタン スシールであってもよい。As best shown in FIG. 2, phase surface 28 of second member 24 defines channel 32. have An O-ring 34 is disposed within the channel 32. Each phase surface 26.28 A hermetic seal is achieved by the O-ring when the O-rings engage each other. Here is the sticker As shown in the figure, there is no need for R13, which is an elastomer, but a metal or low conductance material. It may be Susheer.

本発明の一実施例おいて、クラムシェル装置20の第1の部材は半導体処理設備 10の土壁38の内部表面36に取り付は得る。このとき、第2の部材24はピ ストン40上の第1の部材に関して相対移動可能に取り付けられる。ピストン4 0は半導体処理設備10の底壁42を貫通して伸びている。ピストンは、在来の 空気的、水圧的、あるいは電気的な外部アクチュエイターに連結され得る。ベロ ー44は主要チェンバー12に汚染物が進入するのを防止する。In one embodiment of the invention, the first member of clamshell apparatus 20 is a semiconductor processing facility. Attachment is obtained to the interior surface 36 of the earthen wall 38 of 10. At this time, the second member 24 It is mounted for relative movement with respect to the first member on the stone 40. piston 4 0 extends through the bottom wall 42 of the semiconductor processing facility 10. The piston is a conventional It may be coupled to an external pneumatic, hydraulic, or electrical actuator. Vero -44 prevents contaminants from entering the main chamber 12.

本発明の一実施例でのウェーハホルダー18は複数のビン46である。3つのビ ン46は三脚台のように使用される。ビン46はピストン40の穴48内に収納 されている。ピストン46はまた。在来の外部アクチュエイターに連結され得る 。また、ベロー50がピストン40の底面52と底壁42との間で密封的に係合 される。底面52もまた。ビン46が収納される穴を有する。Wafer holder 18 in one embodiment of the invention is a plurality of bins 46. three bis The tube 46 is used like a tripod stand. The bottle 46 is stored in the hole 48 of the piston 40. has been done. Piston 46 also. Can be coupled to conventional external actuators . Additionally, the bellows 50 is sealingly engaged between the bottom surface 52 of the piston 40 and the bottom wall 42. be done. Also the bottom surface 52. It has a hole in which the bottle 46 is housed.

クラムシェル装置20が主真空チェンバー12内にあるので、ロードアーム54 がクラムシェル装置20内にウェーハをロードおよびアンロードするために備え られている。クラムシェル装置20はロード動作が為される前は常に開放されて いる。ロード動作は、ロードアーム54の上にウェーハ16を持ち上げてなされ る。ウェーハ16がロードアーム54から離れると、ロードアーム54は、ビン 46が持ち上げ位置にある間、引き込む。Since the clamshell device 20 is within the main vacuum chamber 12, the load arm 54 is provided for loading and unloading wafers into the clamshell apparatus 20. It is being The clamshell device 20 is always open before a loading operation is performed. There is. The loading operation is performed by lifting the wafer 16 onto the load arm 54. Ru. When the wafer 16 leaves the load arm 54, the load arm 54 Retract while 46 is in the raised position.

ロードアーム54の形状は、ビン46を妨げることなく引き込むことができるも のでなければならない、ロードアーム54は、クラムシェル装置20からウェー ハを回収するために、逆の動作をなして戻ってくる。The shape of the load arm 54 is such that it can be retracted without obstructing the bin 46. The load arm 54 must be free of weight from the clamshell device 20. In order to collect Ha, he makes a reverse movement and returns.

クラムシェル装置20に入る前に、ビン46はウェーハ16を持ち上げる。ロー ドアーム54がビン46またはウェーハ16と接触することなくクラムシェル装 置20内に伸張し得る。ロードアーム54の伸張が完了したとき、ビンは下降し 、ロードアーム54を通過し、ウェーハ16をロードアーム54上に残す、ロー ドアーム54は、主真空チェンバー12内の真空環境下で為される動作とともに ウェーハ16を次の目的地へと連続して移動させる。Bin 46 lifts wafer 16 before entering clamshell apparatus 20 . Low Clamshell mounting is possible without the door arm 54 coming into contact with the bin 46 or the wafers 16. 20. When the load arm 54 is fully extended, the bin is lowered. , passes through the load arm 54 and leaves the wafer 16 on the load arm 54. The door arm 54 operates in a vacuum environment within the main vacuum chamber 12. The wafer 16 is continuously moved to the next destination.

クラムシェル装置f20は特に、2つの半導体処FJ操作に供される。第1の操 作は、ウェーハ16の表面上に形成される不純物からガスを取り除くなめに、ウ ェーハ16を加熱することを含む前処理である。第3図に示すように、光学的に 透明な窓56が第1の部材22に密封的にシールされ、ウェーハ16を加熱する ために光学的輻射を$56を通して向けることができる。閉鎖してクラムシェル 装置からガスを排気するため、継ぎ半管58が第1の部材22内で、上l!38 を通過するように取り付けられている。継ぎ半管58は内部チェンバー30と連 通する開口60を有する。継ぎ半管58は主真空チェンバー12の外部にある真 空ポンプ(図示せず)に連結されている。Clamshell device f20 is specifically provided for two semiconductor processing FJ operations. First operation The process uses a wafer 16 to remove gas from impurities that form on the surface of the wafer 16. This pretreatment includes heating the wafer 16. As shown in Figure 3, optically A transparent window 56 is hermetically sealed to the first member 22 to heat the wafer 16. Optical radiation can be directed through $56 for this purpose. Closed and clamshell To evacuate gas from the device, a connecting half-tube 58 is provided within the first member 22, above the l! 38 It is installed so that it passes through. The joint half tube 58 communicates with the inner chamber 30. It has an opening 60 therethrough. The joint half-tube 58 is located outside the main vacuum chamber 12. It is connected to an air pump (not shown).

後処理操作が、閉鎖されたクラムシェル装置20内のウェーハを冷却するために 必要である。ウェーハ16を冷却するため、ビン46はクラムシェル装置20が 閉鎖されたままで下降し、ウェーハ16が第2の部材24の表面62に位置する 。継ぎ半管64が、アルゴンのような不活性ガスを内部チェンバー30内に導入 するために土壁38を貫通して第1の部材22に設けられている。A post-processing operation is performed to cool the wafer within the closed clamshell apparatus 20. is necessary. To cool the wafers 16, the bin 46 is connected to a clamshell apparatus 20. remains closed and is lowered so that the wafer 16 is located on the surface 62 of the second member 24 . A joint half tube 64 introduces an inert gas, such as argon, into the inner chamber 30. It is provided in the first member 22 by penetrating the earthen wall 38 in order to do so.

ガスは冷媒として使用される。もちろん、過度のガスは継ぎ半管58を通して排 気され得る。継ぎ半管64はまた。内部チェンバー30と連通ずる開口66を有 する。Gas is used as a refrigerant. Of course, excess gas can be exhausted through the connecting half-pipe 58. It can be noticed. The joint half pipe 64 is also. It has an opening 66 that communicates with the internal chamber 30. do.

継ぎ半管は、主要チェンバー12の外部にあるガス源(図示せず)に連結されて いる。ガスを分散させるために。The connecting half-tube is connected to a gas source (not shown) external to the main chamber 12. There is. To disperse gas.

バッファ68が、内部チェンバー30内で、そこに導入されたガスを分散させる ため開口66に近接して設けられている。A buffer 68 disperses gas introduced into the internal chamber 30. Therefore, it is provided close to the opening 66.

ウェーハをさらに冷却するために、第2の部材24はまた水ジャケット70を含 んでもよく、水ジャケットを通して冷媒が吸い上げることができる。水ジャケッ ト70は主真空チェンバー12の外にある冷媒源(図示せず)に至る導管72に 連結されている。ガス伝導冷却操作の結果、ガスがクラムシェル装置の外へ吸い 出される。りラムシェル外20の内部が適切な圧力であるとき、主真空チェンバ ー12の内側で開き、ウェーハ16が取り出される。Second member 24 also includes a water jacket 70 to further cool the wafer. The refrigerant can be drawn up through the water jacket. water jacket The port 70 connects to a conduit 72 to a refrigerant source (not shown) outside the main vacuum chamber 12. connected. As a result of the gas conduction cooling operation, gas is drawn out of the clamshell device. Served. When there is proper pressure inside the outside ram shell 20, the main vacuum chamber - 12 is opened and the wafer 16 is taken out.

これまで、主真空チェンバーを汚染することなく、半導体ウェーハ上に処理作用 をなしうる装置を説明してきた。当業者であれば、上述してきた実施例から本発 明の思想から逸脱することなくいろいろな目的、および使用をなし得るであろう 、したがって9本発明は請求の範囲に限定される。Until now, processing operations have been performed on semiconductor wafers without contaminating the main vacuum chamber. I have described a device that can do this. Those skilled in the art will be able to understand the present invention from the embodiments described above. It could be used for various purposes and uses without departing from Ming thought. , therefore 9 the invention is limited to the scope of the claims.

国際調査報告 I″′″″″″″IA″8″−Kゴ/3頭105994international search report I″’″″″″″IA″8″-K Go/3 head 105994

Claims (10)

【特許請求の範囲】[Claims] 1.主真空チェンバー内で半導体ウェーハの処理を行う装置であって, ウェーハホルダーと, 該ウェーハホルダーの上に位置する第1の部材,および,該第1の部材に向かい 合うように前記ウェーハホルダーの下に位置する第2の部材を含むクラムシェル 装置であって,前記第1および第2のウェーハホルダーがそれぞれ相表面を有し ,前記第1および第2のウェーハホルダーが開位置と,前記第1の部材の前記相 表面が前記第2の相表面と密封的に係合する閉位置との間で移動可能で,当該ク ラムシェル装置が閉位置にあるとき内部チェンバーを形成するところのクラムシ ェル装置と, 該クラムシェル装置が閉位置にあるとき,前記主チェンバーの外へガスを前記内 部チェンバーから排気する手段と, から成る装置。1. An apparatus for processing semiconductor wafers in a main vacuum chamber, wafer holder and a first member located above the wafer holder; and a first member facing the first member. a clamshell including a second member matingly positioned below the wafer holder; The apparatus, wherein the first and second wafer holders each have a phase surface. , the first and second wafer holders are in the open position and the first member is in the phase position. said clamp is movable between a closed position in which said surface sealingly engages said second phase surface; The ramshell device forms the internal chamber when the ramshell device is in the closed position. well device, When the clamshell device is in the closed position, gas is directed out of the main chamber into the interior. means for evacuating the chamber; A device consisting of 2.請求の範囲第1項に記載の装置であって,前記第1および第2の部材の1つ の前記相表面はチャネルおよび該チャネル内に配置されるOリングを含む,とこ ろの装置。2. An apparatus according to claim 1, wherein one of the first and second members the phase surface of includes a channel and an O-ring disposed within the channel; Rono device. 3.請求の範囲第1項に記載の装置あって,さらに,前記クラムシェル装置が閉 位置にあるとき前記ウェーハを冷却する手段を有する,ところの装置。3. The device according to claim 1, further comprising: the clamshell device being closed. 3. An apparatus comprising means for cooling said wafer when in position. 4.請求の範囲第3に記載の装置あって,前記冷却手段は, 前記ウェーハが前記第2の部材の内表面と接触するように前記内部チェンバー内 に前記ウェーハホルダーを配置する手段,および 前記第2の部材内に冷媒を導入する手段,を含む,ところの装置。4. The apparatus according to claim 3, wherein the cooling means comprises: within the inner chamber such that the wafer is in contact with an inner surface of the second member. means for positioning said wafer holder in a means for introducing a refrigerant into the second member. 5.請求の範囲第3項に記載の装置であって,前記冷却手段は,前記クラムシェ ル装置が閉位置にあるとき,前記内部チェンバー内にガスを導入する手段を含み ,前記ガスは前記排気手段により排気されるところの装置。5. 3. The apparatus according to claim 3, wherein the cooling means means for introducing gas into said internal chamber when said device is in a closed position; , wherein the gas is exhausted by the exhaust means. 6.請求の範囲第5項に記載の装置であって,前記導入手段は,前記第1の部材 に設けられ,前記内部チェンバーに連通する開口を有する継ぎ手管を含み,該継 ぎ手管が前記真空チェンバーの外にあるガス源に連結される,ところの装置。6. 6. The device according to claim 5, wherein the introducing means a joint pipe provided in the interior chamber and having an opening communicating with the internal chamber; Apparatus in which a grate tube is connected to a gas source external to the vacuum chamber. 7.請求の範囲第6項に記載の装置であって,前記導入手段は,前記内部チェン バー内に導入される前記ガスを分散させるため,前記内部チェンバー内で前記開 口に近接して配置されるバッフルをさらに含む,ところの装置。7. 7. The device according to claim 6, wherein the introduction means said opening in said inner chamber to disperse said gas introduced into said bar; The device further includes a baffle located proximate the mouth. 8.請求の範囲第1項に記載の装置であって,前記第1の部材が密封的に取り付 けられた光学的に透明な窓を有し,光学的輻射を前記窓を通して前記ウェーハに 向けられる,ところの装置。8. 2. The apparatus of claim 1, wherein the first member is hermetically mounted. an optically transparent window that directs optical radiation through the window and onto the wafer; A device that is directed towards. 9.請求の範囲第1項に記載の装置であって,前記排気装置が,前記第1の部材 に設けられ,前記内部チェンバーに連通する開口を有する継ぎ手管を含み,前記 継ぎ手管が前記真空チェンバーの外にある真空ポンプに連結される,ところの装 置。9. The device according to claim 1, wherein the exhaust device is connected to the first member. a joint pipe provided in the interior chamber and having an opening communicating with the interior chamber; A device in which the joint pipe is connected to a vacuum pump outside the vacuum chamber. Place. 10.請求の範囲第1項に記載の装置であって,前記ウェーハホルダーが 複数の垂直なピン,および前記第2の部材を貫通する複数の開口を有し, 前記ピンのそれぞれが前記開口のそれぞれに配置され,前記ピンが上昇位置と下 降位置との間で移動可能で,前記ウェーハが,前記ピンが前記下降位置にあると きに前記第2の部材と接触する,ところの装置。10. The apparatus according to claim 1, wherein the wafer holder is a plurality of vertical pins and a plurality of openings passing through the second member; Each of the pins is disposed in each of the openings, and the pins are in a raised position and a lower position. the wafer is movable between the pins and the lowered position, and the wafer is movable between the pins and the lowered position; the second member;
JP2515235A 1989-10-18 1990-10-18 Vacuum container Expired - Lifetime JPH0774447B2 (en)

Applications Claiming Priority (3)

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US423,802 1989-10-18
US07/423,802 US5002010A (en) 1989-10-18 1989-10-18 Vacuum vessel
PCT/US1990/005994 WO1991005887A1 (en) 1989-10-18 1990-10-18 Vacuum vessel

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JPH03504522A true JPH03504522A (en) 1991-10-03
JPH0774447B2 JPH0774447B2 (en) 1995-08-09

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JP (1) JPH0774447B2 (en)
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WO (1) WO1991005887A1 (en)

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EP0448700A1 (en) 1991-10-02
US5002010A (en) 1991-03-26
JPH0774447B2 (en) 1995-08-09
KR920701512A (en) 1992-08-11
EP0448700A4 (en) 1993-03-24
KR930007150B1 (en) 1993-07-30
WO1991005887A1 (en) 1991-05-02

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