JPH0349268A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To control finely a diode area and to restrain a current amount low by mesa-etching two layers of continuous upper and lower layers of a plurality of semiconductor layers formed by epitaxial growth and by carrying out ion- implantation to a part of the remaining semiconductor layer. CONSTITUTION:An n<-> GaAs layer 2, a p<-> GaAs layer 3 and an n<+> GaAs layer 4 are formed on a GaAs substrate 1 successively by liquid phase epitaxial growth. Then, mesa-etching is carried out for the n<+> GaAs layer 4 and the p<-> GaAs layer 3 to form an upper section of a diode. Ion implantation is carried output to the GaAs substrate 1 to form an element region 10. At this time, a mesa etching section and an external section of an ion implantation region are overlapped to deactivate upper and lower active layer regions. Thereafter, upper and lower electrodes 5, 6 are formed. A diode whose current amount is restrained low can be formed in this way.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method of manufacturing a semiconductor device, particularly a method of manufacturing a vertical diode formed on an epitaxially grown semiconductor wafer, to reduce the power consumption (current) of a semiconductor device such as a diode. Therefore, we aimed at a method to obtain a sufficiently small diode area without depending on the size of the upper electrode, etc., and when forming a semiconductor device in which the current value is determined by the area, we formed multiple semiconductor layers by epitaxial growth on a semiconductor substrate. , comprising the step of performing mesa etching on at least two consecutive upper and lower layers of the plurality of semiconductor layers, and performing ion implantation into at least a portion of the remaining semiconductor layer so as to reach the semiconductor substrate to form an element formation region. The composition is as follows.

[Industrial application field]

The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a vertical diode formed on an epitaxially grown semiconductor wafer.

In recent years, there has been a demand for lower power consumption as well as greater integration of semiconductor circuits. Therefore, it is necessary to control the power consumption of each semiconductor element constituting the circuit to a sufficiently low level.

[Conventional technology]

The current flowing through a vertical diode is determined by the structure between the electrodes, carrier density, carrier velocity, diode area, voltage between the electrodes, etc.

A vertical diode formed using a conventional epitaxial growth technique is first formed by forming an n'' GaAs layer 2, a P-GaAs layer 3, and an n'' GaAs layer 2 on a GaAs substrate 1, for example, as shown in FIG. 4A.
GaAsGaAs layer 4 is epitaxially grown, and then P-GaAs layer 3 and GaAs substrate 1 are grown as shown in FIG. 4B.
Mesa etching was performed on each of these to determine the device formation area. In FIG. 4B, A is a diode forming portion.

Next, as shown in FIG. 4C, after forming a lower layer 6 on the n'' GaAs layer 2 and an upper electrode 5 on the I'' GaAs layer 4, the entire surface is covered with PSG (phosphosilicate glass) as shown in FIG. 4D. ), a lower layer wiring 9 is formed on the lower electrode 6 through a contact hole, and an upper layer wiring 8 is formed on the upper electrode 5 through a contact hole, thereby manufacturing a diode.

[Problem to be solved by the invention]

In the diodes obtained in FIGS. 48 to 4D above, the element formation area is limited by the size of the contact hole for connecting the upper layer wiring, the size of the upper electrode 6, etc. as described above, and Size was necessary. For this reason, there was a problem that the diode area (element formation area A) could not be made sufficiently small.

The present invention focuses on power consumption (current) of semiconductor devices such as diodes.
The purpose of this invention is to provide a method for obtaining a sufficiently small diode area without depending on the size of the upper electrode, etc., in order to reduce the diode area.

[Means to solve the problem]

According to the present invention, when forming a semiconductor device in which a current value is determined by area, a plurality of semiconductor layers are formed by epitaxial growth on a semiconductor substrate, and at least two consecutive upper and lower layers of the plurality of semiconductor layers are formed. The problem is solved by a method for manufacturing a semiconductor device, which includes the steps of mesa-etching a layer and implanting ions into at least a portion of the remaining semiconductor layer to reach the semiconductor substrate to form an element formation region.

[For production]

In the present invention, the area of the diode etc. is determined by the overlapping area of the mesa etch portion and the outside of the ion implantation region, so that the diode area can be made down to a minute area independently of the size of the upper electrode and the like.

Mesa etching of the semiconductor layer in the present invention is preferably wet etching using HF, dry etching using CC1'2F2, etc., and O+ ions, H+ ions, etc. are preferable as ions for ion implantation. It is only necessary that an element isolation region be formed by at least this ion implantation.

In the present invention, the same effect can be obtained regardless of which of the mesa etching process and the ion implantation process is performed first.

〔Example〕

Embodiments of the present invention will be described below based on the drawings.

FIGS. 18 to 1D are process sectional views for explaining one embodiment of the present invention.

As shown in FIG. 1A, on a GaAs substrate 1 is deposited a 1000 n" GaAs layer 2.5000 to 5000" thick.
An aAs layer 3 and a 1000 nm thick n'' GaAs layer 4 are sequentially grown by liquid phase epitaxial growth.

Next, as shown in FIG. 1B, the n"GaAs layer 4 and the P-Ga
The upper part of the diode is formed by mesa etching the As layer 3 using the RrE method.

Next, as shown in Figure 1C, the 0゛ ions were
Ion implantation is performed at a dose of 2×10 I2 cm −2 to determine an element formation region IO. At this time, as shown in FIG. 2, the mesa etch portion and the outside of the ion implantation region are overlapped, and the upper and lower active layer regions are inactivated. After this, AuGe/Au was deposited to a thickness of 3000 as shown in Figure 1D.
Upper and lower electrodes 5.6 are formed.

Thereafter, a diode is obtained by a normal process, for example, forming a lower layer wiring connected to the interlayer insulating film lower electrode 6 and an upper layer wiring connected to the upper electrode 5 on the entire surface.

FIG. 3 shows the data obtained in the above steps. In FIG. 3, the vertical axis shows the current value, and the horizontal axis shows the overlap area (diode area) on the lithography mask.

3---1'' GaAs layer, 5...lower electrode, 7...P2O layer, 4--・n”GaAs layer＼ 6... Upper electrode, 10... Ion implantation region.

〔Effect of the invention〕

As explained above, according to the present invention, the area of the vertical diode can be minutely controlled without depending on the electrode area, and it is possible to form a diode that suppresses the amount of current.

[Brief explanation of drawings]

18 to 1D are process cross-sectional views for explaining one embodiment of the present invention, FIG. 2 is a plan view for explaining the present invention, and FIG. 3 is an effect of the present invention. FIG. 48 to FIG. 4D are process sectional views for explaining the conventional technique.

Claims (1)

[Claims] 1. When forming a semiconductor device in which the current value is determined by area, a plurality of semiconductor layers are formed by epitaxial growth on a semiconductor substrate, and at least two consecutive upper and lower layers of the plurality of semiconductor layers are mesa-etched to remove the remaining A method of manufacturing a semiconductor device, comprising the step of implanting ions into at least a portion of the semiconductor layer so as to reach the semiconductor substrate to form an element formation region.