JPH0336220Y2 - - Google Patents

Description

[Detailed description of the invention] This invention integrates a snubber circuit and a gate circuit into a gate turn-off (GTO) thyristor.
Regarding the unit structure of GTO thyristor.

The waveforms of the cathode current (load current) i and the anode-cathode voltage v when the GTO thyristor is turned off by the gate current are shown in FIG. In this current/voltage, the current that can be cut off when the GTO thyristor is turned off is greatly influenced by the rising slope dv/dt of the voltage v and the spike voltage v _S that occurs at the beginning of the rising voltage. voltage slope
To reduce dv/dt, as shown in Figure 2, GTO
It is known to provide a snubber circuit in which a series circuit of a bypass capacitor 2 and a diode 3 is connected in parallel to the thyristor 1, and a discharge resistor 4 is connected in parallel to the diode 3. Spike voltage v _S
This occurs due to the inductance of the snubber circuit itself and the inductance of the lead wire connecting to the thyristor, and it is desirable to make the structure of the snubber circuit and the connection structure of the thyristor appropriate.

Here, in order to effectively reduce dv/dt by the snubber circuit, it is conceivable to increase the capacitance of the capacitor 2, but increasing the capacitor capacitance increases the loss of the discharge resistor 4, and the snubber circuit This poses problems in equipment implementation, such as increased size and cost. In particular, when a GTO thyristor has an inductive load, it is difficult to suppress dv/dt and spike voltage _VS with conventional snubber circuits, resulting in the problem of element destruction.

To solve these problems, as shown in FIG. 3, a shunt transistor 5 is provided in parallel with the GTO thyristor 1, and the off-gate current of the gate circuit 6 is supplied to the thyristor 1 and is used as the base current of the transistor 5. When transistor 1 is turned off, a part of the thyristor main current is transferred to transistor 5.
By using the fact that the turn-off speed of transistor 5 is delayed compared to thyristor 1,
The present applicant has already proposed a method for suppressing dv/dt and suppressing v _S. In the figure, 7 is a diode that prevents the transistor 5 from being destroyed by reverse bias.

This invention minimizes the generation of spike voltage and further enhances the main current shunting effect when attempting to unitize a GTO thyristor with a snubber circuit and a main current shunting transistor.
The purpose is to provide a unit structure for GTO thyristors.

Figures 4 are side views a and A showing an embodiment of the present invention.
- It is an arrow view b along the A line. Anode conductor 1A and cathode conductor 1 of flat GTO thyristor 1
Cooling fins 8 and 9 are pressed against each surface of B. These cooling fins 8 and 9 face the thyristor 1 at eccentric positions opposite to each other with the thyristor 1 as the center, and clamp the thyristor 1 by tightening with a pair of bolts 10 and nuts 11. The transistor 5 is screwed to the part of the cooling fin 8 in the direction of the bolt 10 that does not face the cooling fin 9, which is secured by eccentric mounting, and the collector is connected to the anode of the thyristor 1 using the cooling fin 8 as a conductor. A diode 7 is planted on the side of the fin on the side of the transistor 5, and its cathode is connected to the cathode of the thyristor 1 using the cooling fin 9 as a conductor.
The anode of the diode 7 and the emitter of the transistor 5 are placed close to each other to form a series connection using a short lead wire 12.

A snubber circuit diode 3 is installed in the cooling fin 9 in the direction of the bolt 10 that is not opposed to the cooling fin 8, which is ensured by its eccentric mounting, and the cathode is connected to the cathode of the thyristor 1 through the cooling fin 9. In this example, the capacitor 2 is arranged in parallel with the insulating plate 13 interposed on the side surface of the fin on the side of the diode 3, and the anode of the diode 3 is connected to the capacitor 2.
A short lead wire 14 is connected to one end, and a short lead wire 15 is connected to the thyristor anode at the other end of the capacitor 2 and one end of the cooling fin 8.

A shield box 16 that houses the on/off gate circuit of the thyristor 1 is fixed to the cooling fin 9 with a gap between the shield box 16 and the cooling fin 9 by insulating side plates 17 and 18, and is connected to the base terminal of the transistor 5 and the thyristor 1. A connection is made by a lead wire 19 between the gate terminal and the cathode terminal.

Therefore, in the unit structure according to the present invention, the anode and cathode of a flat gate turn-off thyristor are sandwiched between a pair of conductive cooling fins eccentrically in opposite directions, and one space in which the pair of cooling fins does not face each other is provided. In order to provide a shunt circuit element located in one space with the cooling fin as a connection conductor, and a snubber circuit element located in the other space with the cooling fin as a connection conductor, the connection between the shunt transistor and the reverse bias prevention diode is The lead conductor for connecting the diode and capacitor of the snubber circuit can be shortened, and the cooling fin can be used as a conductor to connect these transistors and diodes to the gate turn-off thyristor, resulting in a low inductance. This makes it possible to shorten the lead wire, which is one of the causes of the spike voltage that occurs when the thyristor is turned off, thereby preventing element destruction, that is, improving the thermal breakage current. Furthermore, dv/dt can be reliably suppressed by the cooperation of the snubber circuit and the shunt circuit. In addition, as for the assembly structure, diodes, transistors, capacitors, and shield boxes are attached to the cooling fins in advance, and the thyristor is assembled by tightening the bolts while holding the thyristor.
The final step is to connect the lead wires, making it a relatively simple assembly.

[Brief explanation of the drawing]

Figure 1 is the turn-off waveform diagram of the GTO thyristor, Figure 2 is the snubber circuit diagram of the GTO thyristor,
FIG. 3 is a circuit diagram in which a GTO thyristor is provided with a snubber circuit and a shunt circuit, and FIG. 4 is a unit structural diagram showing an embodiment of the present invention. 1... GTO thyristor, 5... Shunt transistor, 6... Gate circuit, 7... Reverse bias prevention diode, 8, 9... Cooling fin, 13...
...Insulation board, 16...Shield box.

Claims (1)

[Scope of utility model registration request] In an assembly structure in which a snubber circuit and a shunt transistor circuit are connected in parallel to a gate turn-off thyristor, the anode and cathode of a flat gate turn-off thyristor 1 are eccentrically arranged in opposite directions, and the thyristor is connected with a pair of conductive cooling fins 8 and 9. The shunt transistor 5 is sandwiched between the shunt transistors 5, which are located in one space where the pair of cooling fins do not face each other, and which is connected and fixed to one of the cooling fins 8 of the pair of cooling fins, and which is connected and fixed to the other cooling fin 9. A shunt circuit is provided in which a reverse bias prevention diode 7 is connected by a lead conductor 12, and the circuit is located in the other space where the pair of cooling fins do not face each other and is insulated from one of the cooling fins 8 of the pair of cooling fins. A snubber circuit is provided in which the capacitor 2 to be fixed and the diode 3 to be connected and fixed to the other cooling fin 9 are connected by a lead conductor 14, and the capacitor and one cooling fin 8 are connected by a lead conductor 15. A unit structure of a gate turn-off thyristor characterized by a structure in which a shield box for housing a gate circuit is arranged side by side with a gap in one side of the cooling fin, and the thyristor and transistor are connected to the gate circuit in the shield box by a lead wire 19. .