JPH0331040B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a remote control device for remotely controlling equipment wirelessly.

First, a conventional wireless remote control system will be explained. FIG. 1 shows a device to be controlled, here a display device 1 which performs display by lighting a lamp, and the example shown in FIG. 1 is wirelessly and remotely controlled as shown in FIGS. 2 and 3, which will be described later.

In FIG. 1, reference numeral 2 indicates a key input circuit, and this key input circuit 2 is composed of a plurality of push button switches and the like. Here, when you press the push button switch, the corresponding line changes to "H" (high level).
becomes. Data based on key operations is transferred to latch 3, and depending on the contents of this latch, lamps 4a to 4a
A specific one among 4b is displayed by lighting. A display section 4 is constituted by these lamps 4a to 4b. Note that 5 indicates a delay circuit, which prevents chattering. That is, when an operation is performed on the key input circuit 2, the operation output is sent to the delay circuit 5 via the OR circuit 6, and after a predetermined delay time, is supplied to the latch 3 as a clock. Therefore, input data is not latched unless the key input circuit 2 is operated reliably.

FIG. 2 shows a case where the example shown in FIG. 1 is wirelessly and remotely controlled, and in this figure, parts corresponding to those in FIG. 1 are given corresponding symbols, and explanations thereof are omitted.

In this figure, 7 is a photodiode that receives infrared rays, and 8 is a resonant circuit. As the transmission signal, for example, a signal sent in the form of a pulse within a predetermined unit time is used, and this pulse signal is received by a photodiode 7, and the received light output obtained at the anode of the photodiode 7 is amplified. 9 to the counter 10. On the other hand, the light receiving output amplified by the amplifier 9 is also sent to the monomulti 11. This monomulti 11 determines the above-mentioned unit time, and performs a counting operation for a unit time from the arrival of the first pulse. The output of the counter 10 is then decoded by a decoder 30 and further transferred to the latch 3 after passing through an OR circuit 12. This latch 3
is supplied with the output of the monomulti 11 via the OR circuit 13, and as a result, the output of the decoder 30 is latched in the latch 3 after the above-mentioned unit time has ended.

3 forms a control signal to be transmitted to the receiving section of FIG. 2. In this figure, 14 indicates a key input circuit, and after the output of this key input circuit is encoded by an encoder 15, it is sent to a shift register 1.
Transferred to 6. On the other hand, 17 indicates a clock generator, and the clock from this clock generator 17 is supplied to a counter 18. The count output Q _C of this counter 18 is supplied to the first input terminal of an AND circuit 19 . The output of the clock generator 17 is inverted by an inverter 20 and supplied to the second input terminal of the AND circuit 19. The output of this AND circuit 19 is then supplied to the clock input terminal of the shift register 16. In this case, after the count output Q _C of the counter 18 becomes “H”, the pulse generator 1
Based on the pulse from 7, the parallel data of the shift register is converted to serial data and sent to the AND circuit 2.
1 to the first input terminal. Here, the output of the key input circuit 14 is supplied to the reset terminal of the counter 18 via an OR circuit 22 and a delay circuit 23, respectively, so that the counter 18 is reset based on key operations.
Further, the output of the delay circuit 23 is output from the flip-flop 24.
It is also supplied to the set terminal of Since the count output Q _D of the counter 24 is supplied to the reset terminal of the flip-flop 24, the flip-flop 24 keeps the Q output at "H" from a timing slightly delayed from the key operation until the counter 18 times out. This Q output becomes a window pulse and transfers the serial data of the shift register 16 to the transistor 25. Furthermore, AND circuit 21
For example, through the carrier signal input terminal 27,
A 40KHz carrier is supplied. The output of this AND circuit 21 is supplied to the base of a transistor 25, and an infrared light emitting diode 26 is turned on based on the drive of this transistor 25.

In the remote control system shown in FIGS. 2 and 3, when the key input circuit 14 on the transmitting side is operated, the light emitting diode 26 and the photodiode 7 emit and receive infrared light, thereby controlling the display section 4. be done. This will be easily understood.

By the way, in such a remote control system, even if a transmission is performed using the key input circuit 14 on the transmitting side, it is not possible to confirm whether or not it has been reliably received on the receiving side and the desired control has been performed. This is especially a problem when the control details cannot be visually observed at the transmitting end. Furthermore, if the contents of the display section 4 are changed by operating the built-in key input circuit 2 on the receiving side, there is also the inconvenience that it cannot be confirmed on the transmitting side.

To solve this problem, the remote control system should be able to transmit and receive signals in both directions. That is, when the receiving side receives the control signal, it transmits a response signal indicating confirmation of the control signal to the transmitting side, thereby solving the above problem.

However, in such a two-way remote control system, there is a risk that the control signal transmitted by the transmitting side may be reflected and the control signal itself may be received. Since the received control signal is determined to be a response signal, even if the control signal is not received by the receiving side, there is a risk that the transmitting side will determine that it has been received.

Furthermore, in a remote control system, instead of having only one receiving side, it is also possible to control a plurality of receiving sides by a single transmitting side. This case also has the above-mentioned problems.

That is, FIG. 4 shows the receiving section of such a multi-control remote control system, and in this figure, 3
1 indicates a matrix circuit forming a key input circuit,
A strobe signal is supplied from an encoder 32 to this matrix circuit 31, and a return signal from the matrix circuit 31 is sent to the encoder 32. Then, the encoder 32 performs key encoding based on this return signal to obtain key data. This key data is transferred to a latch 34 via an OR circuit 33, and the output of this latch 34 is further supplied to a decoder 35 to drive the display section 4. Note that the OR circuit 6 and the delay circuit 5 are
This is to prevent chattering as in the example shown, and the output of this delay circuit 5 is connected to the other OR circuit 3.
6 to latch 34.

On the other hand, the control signal for remote control is from photodiode 7.
The received light output is sequentially transferred to the shift register 37 via the amplifier 9. In this case, the control signal is a serial 6-bit coded signal, where the preceding 5 bits correspond to the display content and the last 1 bit represents the type of equipment to be controlled. For example, "H" is associated with device A, and "L" (low level) is associated with device B (see FIG. 7E). Flip-flop 38, clock generator 17, counters 39, 40, etc. determine the shift timing of shift register 37 and the latch timing of latch 34. That is, the light receiving output (FIG. 5A) amplified by the amplifier 9 is supplied to the set terminal of the flip-flop 38. Based on this, flip-flop 3
8 is set at the timing of the rise of the first light reception pulse, and its Q output becomes "H" as shown in FIG. 5E. Based on the rise of this Q output, a pulse is generated from the pulse generator 41 as shown in FIG. 5F, and this is supplied as a reset signal to the counter 39 and shift register 37. Counter 39 then counts the clocks from clock generator 17 based on this pulse (FIG. 5F). The Q _B output of this counter 39 is supplied as a clock to the shift register 37. The Q _B output of this counter 39 has a frequency twice that of the received light pulse, as shown in FIG. 5D, and the received light pulse is input to the shift register 37 at the rising edge of this clock. Further, the Q _B output of this counter 39 is supplied to a counter 40 at the subsequent stage, and the counting outputs Q _A , Q _B , Q _C of this counter 40 are supplied to an AND circuit 42 .
The output of is supplied to flip-flop 38 as a reset signal. As a result, the flip-flop 8 falls after a predetermined unit time as shown in FIG.
The falling edge of the Q output is supplied to the latch 34 via the AND circuit 43 and the OR circuit 36, and the parallel data in the shift register 37 is transferred to the latch 34 via the OR circuit 33 at the timing of this falling edge. It's summery. And this latch 3
4 is supplied to a decoder 35, and the display section 4 is thereby driven.

The other switch 44 and inverter 45 are switched for each device A and B. In device A, the common contact c of the changeover switch 44 is connected to the changeover contact a, and in device B, the common contact c is connected to the changeover contact a. It is designed to be connected to contact b. The least significant bit of the shift register 37 is directly supplied to the switching contact b, and is supplied via the inverter 5 to the switching contact a. The least significant bit of the shift register 37 is a signal corresponding to the type of device as shown in FIG. 7E, so that only the corresponding device A or B is controlled by the control signal.

For example, as shown in FIG. 7E, when the final bit of the control signal is "H", only device A is controlled. In other words, in device A, the common contact c of the changeover switch 44 is connected to the changeover contact a, as shown by the solid line in FIG.
As a result, at the falling edge of the Q output of the flip-flop 38 shown in FIG. 5E, the shift register 3
The contents of 7 are latched into latch 4. Therefore, the display section 4 can be controlled reliably.

On the other hand, in device B, as shown by the broken line, the common contact c of the changeover switch 44 is connected to the changeover contact b.
, so "L" is supplied to the second input terminal of the AND circuit 43, and as a result, the AND circuit 43
The output of the shift register 37 is always "L" and the contents of the shift register 37 are not latched by the latch circuit 34. As a result, in device B, the display section 4 is not controlled.

FIG. 6 shows the transmitting section of this multi-control. In this figure, a key input circuit 46, an encoder 4
7. The OR circuit 22 and the delay circuit 23 correspond to the circuits 31, 32, 6, and 5 in FIG. 4, respectively, and their explanation will be omitted here. The output of the delay circuit 23 is then supplied to a pulse generator 49 via an inverter 48, which generates a pulse at a timing determined by the delay circuit 23, and this pulse is supplied via an OR circuit 50 to a shift register 51 as a reset signal. be done. A clock generator 52 and a counter 53 are used to generate a shift clock for this shift register 51, and another counter 54, an AND circuit 55, and a flip-flop 56 determine the sending timing of serial data from this shift register 51. This is for generating window pulses.

That is, the clock signal from the clock generator (FIG. 7A) is supplied to the counter 53. The counter 53 is reset by a pulse from the pulse generator 49 and thereafter counts this clock. The Q _B output of this counter 53 (FIG. 7C) is supplied to the shift register 51 as a shift clock.
The Q _B output of the counter 53 is also supplied to a subsequent counter 54, and the counter 54 counts this Q _B output. This counter 54 is also reset by the pulse of the pulse generator 49 like the counter 53 in the previous stage, and each output of Q _A , Q _B , and Q _C is sent to the AND circuit 55.
The signal is supplied as a reset signal to the flip-flop 56 and shift register 51 via. As a result, the output of the flip-flop 56 becomes a signal that becomes "H" for a predetermined unit period as shown in FIG. Supplied on a base of 25. In this case, a carrier of, for example, 40 KHz is supplied to the other input terminal of the AND circuit 21 via the carrier signal input terminal 27. The light emitting diode 26 is driven by this transistor 25.
is driven and sends out a coded pulse signal as shown in FIG. 7E as infrared rays.

In such a multi-control remote control system shown in FIGS. 4 and 6, only the corresponding control signal is received by switching the changeover switch 44 on the receiving side, and desired control can be performed based on this received signal. Can be done.

However, even in such a remote control system, problems similar to those shown in FIGS. 2 and 3 occur. That is, if the control signal transmitted by the transmitter is reflected and received as is by the transmitter, it may be determined that a response has been made even though no control is executed by the receiver.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a remote control device that can eliminate inconveniences due to reflected waves when performing bidirectional remote control.

An embodiment of the remote control device of the present invention will be described below with reference to FIGS. 8 to 11. Note that in FIGS. 8 and 10, parts corresponding to those in FIGS. 2 and 3, respectively, are given corresponding symbols, and detailed explanations are omitted.

FIG. 8 shows the receiving section of this column, in which the display contents of the display section 4, that is, the data latched in the latch 3, are transferred to the encoder 61. The data encoded by this encoder is then transferred to the shift register 62 as parallel data. On the other hand, the clock from the clock generator 63 (FIG. 9D) is supplied to a counter 64, and the Q _C output of this counter 64 is supplied to the first input terminal of an AND circuit 65. The second
The clock of the above-mentioned clock generator 63 is supplied to the input terminal via an inverter 66. The output of the AND circuit 65 is then supplied as a shift clock to the shift register 62. In this case, the data transferred to the shift register 62 as parallel data, that is, the display content of the display section 4, is supplied from the output of the shift register 62 to the AND circuit 69 as serial data. Further, the output of the OR circuit 13 is supplied to a flip-flop 67 as a set signal after passing through an inverter 66. The _QD output of the counter 64 is supplied as a reset signal for the flip-flop 67. The Q output of this flip-flop 67 is also supplied to an AND circuit 69 and used as a window pulse. This AND circuit 6
9 through a carrier signal input terminal 70, for example.
A 40KHz carrier is supplied, and this AND circuit 6
The output of 9 is supplied to the base of transistor 71. By driving this transistor 71, the infrared light emitting diode 72 is turned on.

Further, in this example, the output of the OR circuit 13 is supplied to a monomulti 68 via an inverter 66. As shown in FIG. 9C, this monomulti 68 falls after the latch timing and remains "L" until the light emitting diode 72 finishes lighting. Supplied. Then, while the output of the monomulti 68 is at "L" as shown in FIG. 9C, the counter 10 is prevented from performing counting operation.
This prevents the response signal from the photodiode 72 from being received from itself. In other words,
Even if a new control signal is sent from the transmitting side at the time of sending the response signal, and even if a situation occurs where the reflected wave of the response signal and the control signal interfere with each other, there is no problem. The receiving side does not receive the signal until there is no response signal, that is, until the interference is resolved.

FIG. 10 shows the transmitting section, in which 81
indicates a photodiode that receives infrared light, and 8
2 indicates a resonant circuit. Then, the light receiving output obtained at the anode of this photodiode 81 is sent to an amplifier 8.
3 to the counter 84. The counted contents of counter 84 are decoded via decoder 85 and then transferred to latch 86. Further, the output of the amplifier 83 is supplied to a monomulti 87, and the output of the monomulti 87 is supplied to a latch 86. In this case, the monomulti 87 has a pulse width corresponding to the unit time of the control signal,
As a result, data is transferred to the latch 86 a unit time after the first pulse arrives, and the display section 89 is thereafter driven by the data.

Further, the output of the monomulti 87 is supplied to the AND circuit 21 via an inverter 90 (FIG. 11L). As a result, no transmission is performed from the light emitting diode 26 during the above-mentioned unit time.

In addition, the Q _C output of the counter 18 (Fig. 11E) is supplied to the mono multi 911, and this mono multi 91
The output of the counter 84 is supplied to the enable terminal of the counter 84. As mentioned above, the _QC output of this counter 18 forms a window pulse for transmission, and by supplying this output to the enable terminal of the counter 84, the counter 84 performs a counting operation when transmitting from the light emitting diode 26. stop,
As a result, the control signal for the light emitting diode 26 is not received.

Next, the operation of this embodiment will be explained. First, it is assumed that the key input circuit 14 is operated in the transmitting section, and as a result, encoded data of "1110" is obtained as the output of the encoder 15. Then, a signal as shown in FIG. 11 is obtained from the shift register 16 as serial data.
That is, the first three bits are "H" and the fourth bit is "L". Such a signal modulates the carrier and drives the light emitting diode 26 for transmission.

On the receiving side, the transmitted signal is received by the photodiode 7, and the signal shown in FIG. 9A is obtained as the output of the amplifier 9. This corresponds to FIG. 11. Such a pulse train is supplied to a counter 10, and the output of this counter 10 is further decoded via a decoder 11 to produce, for example, an output of "0010", which is latched into a latch 3. In response to this, for example, a lamp C is turned on on the display section 4.

Furthermore, the data of latch 3 is also supplied to encoder 61, where it is encoded to obtain a signal of "1110". Then, this signal is transferred to the shift register 62.
The signal is converted into serial data and supplied to the AND circuit 69, where the carrier is modulated by this pulse train to drive the transistor 71 and cause the light emitting diode 72 to respond with the signal shown in FIG. 9F.

In this case, since the counter 10 is stopped by the output of the monomulti 68, the contents of the latch 3 remain unchanged. That is, even if the transmission signal from the light emitting diode 72 is received by the photodiode 7 by mistake, there will be no problem.

In the transmitting section, the signal transmitted by the light emitting diode 72 of the receiving section is transmitted to the photodiode 81 as described above.
Receive at. This signal is a pulse train of "1110", which is counted by the counter 84 to obtain a count output of "110", which is decoded by a decoder to obtain data of "0010". When this is latched by a latch circuit, a display corresponding to the lamp C of the display section 4 described above can be made. That is, the receiving section receives the response signal, and the contents can be confirmed on the display section 89.

As described above, according to the remote control device of the present invention, when the transmitter is transmitting a control signal, reception at the transmitter is prohibited, thereby preventing malfunctions. In other words, even if the data transmitted by the transmitter is reflected and transmitted to the transmitter, since the transmitter's receiving operation is prohibited at this timing, this is treated as a response signal for the receiver. There is no possibility of incorrect display.

Furthermore, in this series, when a receiving section is sending out a response signal, the receiving operation at that receiving section is prohibited. Therefore, even if the reflected wave of the response signal and the control signal interfere with each other while the response signal is being sent, and an erroneous control signal is generated, there is no problem.

Next, a second embodiment of the present invention will be described with reference to FIGS. 12 and 13.

This series shows a case where the transmitting section and the receiving section are configured using a microcomputer, and both the transmitting section and the receiving section can be configured depending on the contents of the program. Here, for convenience of explanation, the configuration example shown in FIG. 12 is used as a receiving section. In FIG. 12, portions corresponding to those in FIG. 8 are designated by corresponding reference numerals, and detailed description thereof will be omitted.

In FIG. 12, the microcomputer 10
1 consists of an ALU (arithmetic and logic unit) 102, a RAM (random access memory) 103, a ROM (read-on memory) 104, and the like. ROM
A program is recorded in 104 for performing a receiving operation, and data input/output, calculations of ALU 102, etc. are executed based on this program.

That is, the light reception output of the photodiode 7 is supplied to the computer 101 via the serial input port 105, and the data of this light reception output is processed in the computer 101, and as a result, a signal for controlling the display section 4 is formed. be done. and,
This control data is parallel output port 106
The light is supplied to the display section 4 via the display section 4, and the lighting of the display section 4 is controlled.

On the other hand, this control data is also sent to the AND circuit 69 at a predetermined timing via the serial output port 107, and is emitted from the light emitting diode 72 as a response signal. In this case, the light receiving output of the photodiode 7 is also supplied to the interrupt port 108, and the light emitting diode 72 is not turned on while the photodiode 7 is in the light receiving operation. This is because, as described in the example in Fig. 8, the reflected wave of the response signal may interfere with the transmitted control signal and be received as a different control signal.
This is to prevent such a situation.

Furthermore, when a response signal is sent out, the response signal, specifically the lighting drive signal, is fed back to the interrupt port 108 via the output port 107. Therefore, there is no problem due to interference in this case as well.

Although only the receiving section has been described in FIG. 12, it will be easily understood that this can be used as the transmitting section by changing the program in the ROM 102.

In such a system, the 13th
When a signal consisting of four pulses is transmitted from the transmitter as shown in FIG. 13A, a signal shown in FIG. 13D is received by the photodiode 7 of the receiver. Then, in the receiving section, control is executed based on this control signal, and at the same time, a response signal shown in FIG. 13B is sent out. As shown in the figure, this signal consists of four pulses like the control signal. This response signal is then received by the transmitter as shown in FIG. 13C.

Of course, this example also provides the same effects as the examples shown in FIGS. 8 and 10.

Next, another embodiment in which the present invention is applied to a multi-control system will be described with reference to the drawings from FIG. 14 onwards.

Figure 14 shows an overview of this system.
In this figure, a single transmitting system 111 can remotely control both the A receiving system 112A and the B receiving system 112B. That is, a control signal from the transmission system 111 is transmitted to the A reception system 112A and the B reception system 112B via the infrared projector 113. In the A receiving system 112A, the light receiving section 116A receives this control signal, and thereafter executes desired control. Simultaneously with this execution, a response signal is projected from the light projecting section 115A. This response signal is received by the light receiving section 114 of the transmitting system 111, and as a result, the transmitting system 111 can determine the control state. The B receiving system 112B also has a light receiving section 116B and a light projecting section 115B, and the B receiving system 112B has a similar configuration.

Of course, the A receiving system 112A and the B receiving system 112B cannot be individually controlled as is. Naturally, the control signal received by the A receiving system 112A is also received by the B receiving system 112B, and the same control is executed. Therefore, in this example, signals in the format shown in FIG. 15 are used as the control signal and the response signal.

As shown in FIG. 15, this format consists of a start bit, data bit, receiving system discrimination bit, and master/slave discrimination bit. Specifically, the start bit is 1 bit, the data bit is 4 bits, the reception system discrimination bit is 2 bits, and the master/slave discrimination bit is 1 bit, resulting in a total of 7 bits. The receiving system discrimination bit "H" indicates that it corresponds to the A receiving system 112A, and "L" indicates that it corresponds to the B receiving system 112B. The master/slave discrimination bit is "H" to indicate that the signal is from the transmitting system 111, and "L" to indicate that the signal is from the A receiving system 112A or the B receiving system 112B.

In the A receiving system 112A, the master/slave discrimination bit of the signal received by the light receiving section 116A is "L".
If so, no reception is performed. If it is “L”, it is from the reflected wave of the response signal from the B receiving system 112.
This is because it is a response signal of B. Further, if the reception system discrimination bit is "L", no reception is performed. This is because it is a control signal to the B receiving system 11B. In the A reception system 112A, reception is performed and control is executed only when both the master/slave discrimination bit and the reception system discrimination bit are "H".

In addition, in the B receiving system 112B, due to the same request,
Reception is performed only when the master/slave discrimination bit is "H" and the reception system discrimination bit is "L".

On the other hand, the transmitting system 111 receives the signal received by the light receiving section 114 when the master/slave discrimination bit is "L". This is because the signal is a response signal transmitted from the A receiving system 112A or the B receiving system 112B. Then, this received signal is determined whether it is a response signal of the A reception system 112A or a response signal of the B reception system 112B based on the reception system determination bit. As a result, both receiving systems 1 and 1 in the transmitting system 111
The control states of 12A and 112B can be determined without any confusion.

In this example, the master/slave discrimination bit of the control signal from the transmission system 111 is always "H",
When the signal is "H", the transmitting system 111 does not perform reception. Therefore, the transmission system 111 does not receive the reflected wave of the control signal from itself.
As a result, the control state of the receiving systems 112A and 112B can be correctly determined.

In addition, in FIG. 14, the light receiving units 11A and 116 are individually installed in the A receiving system 112A and the B receiving system 112B.
B. Although the light projecting sections 115A and 115B are provided, a single light receiving section 116 is provided as shown in FIG.
Of course, it is also possible to suffice with the light projecting section 115 and the light projecting section 115, and connect these to the A receiving system 112A and the B receiving system 112B via signal lines. In FIG. 16, parts corresponding to those in FIG. 14 are given corresponding symbols, and their explanations are omitted.

FIG. 17 shows the A receiving system 112A of the example shown in FIG. 14. In this figure, the control signal received by the light receiving section 116A is supplied to a serial/parallel converter 121, where it is converted into parallel data. This control signal is also supplied to the input discrimination circuit 122. This input discrimination circuit 122 forms an input discrimination pulse having a pulse width that sufficiently covers the period from the start bit of the control signal to the master/slave discrimination bit, and this pulse is passed through the gate circuit 123 to the clock terminal of the latch 124 and It is supplied to the transmission control circuit 125. Data is now transferred to latch 124 at the rear end of this pulse. The transmission control circuit 125 prohibits data transmission while this input determination pulse is present.

Of the parallel outputs of the serial/parallel converter 121, the master/slave discrimination bit and the reception system discrimination bit are supplied to a master/slave discrimination circuit 126 and a reception system discrimination circuit 127, respectively. Here, only when the master/slave discrimination bit is "H", the master/slave discrimination circuit 12
6 supplies a gate signal to the gate circuit 123.
Further, the reception discrimination circuit 127 supplies a gate signal to the gate circuit 123 only when the reception system discrimination bit is "H". The input discrimination pulse is sent to the subsequent stage only when both the master/slave discrimination bit and the receiving system discrimination bit are "H".

The data bits of the parallel output of the serial-to-parallel converter 121 are sent to the multiplexer 128.
The signal is transferred to latch 124 via latch 124, and then transferred to decoder 129. Then, desired control is performed. Here, the lamp of the display section 4 is turned on.

On the other hand, the buffered data in latch 124 is also provided to parallel-to-serial converter 130. "H" and "L" signals are sent to the parallel-serial converter 130 from a reception system discrimination bit generation circuit 131 and a master/slave discrimination bit generation circuit 132, respectively. As a result, a reception system discrimination bit and a master/slave discrimination bit are added to the data bits, and a start bit is further added to form a format as a response signal. Among these, the response signal in this format is transmitted to the transmission system via the transmission control circuit 125 and the light projector 115A. In this case, while the light receiving section 116A is receiving light, the input determination pulse prohibits the sending of the response signal.

Although only the A receiving system 112A has been described in FIG. 17, it will be easily understood that this can be applied to the B receiving system 112B with some modifications.

FIG. 18 shows the transmission system 111 of FIG. 14, and in this figure, the key output (output after key encoding) of the key input circuit 14 is sent to the parallel-to-serial converter 141. 142 and 143 are a reception system discrimination bit generation circuit and a master/slave discrimination bit generation circuit, and these circuits 14
The output of 2,143 is also supplied to the parallel/serial conversion circuit 141. As a result, a control signal in the format shown in FIG. 15 is obtained. In this case, the master/slave discrimination bit generation circuit 143
The output of is always "H". The output of the receiving system discrimination bit generation circuit 142 is "H" or "L" depending on which receiving system 112A or 112B is being controlled.
becomes. It is "H" in the A receiving system 112A, and "L" in the B receiving system 112B.

The serial output of the parallel-serial converter 141 is supplied to the light projector 113 via the transmission control circuit 144, and as a result, a control signal is transmitted to the A receiving system 112A or the B receiving system 112B.

On the other hand, the A receiving system 112A or the B receiving system 112
The response signal from B is received by the light receiving section 114.
This received light output is sent to the serial/parallel converter 145.
The data is then supplied to the computer, where it is converted into parallel data.
Data bits of this parallel data are then sent to decoder 146. This decoder 1
The output of 46 is sent to the display section 89 via the latch 147, and as a result, the output of the receiving system 112A, 112B
A display indicating the control status is displayed. On the other hand, the reception system discrimination bit is sent to the reception system display section 149 via another decoder 148, and as a result, it is displayed whether the transmission source of the response signal is the reception system 112A or 112B.

In this case, the master/slave determination bit is supplied to the clock terminal of latch 147 via delay circuit 150. Temporary storage is performed by latch 147 only when this master/slave discrimination bit is "L". As a result, only the response signal is displayed on the display section 89, and on the other hand, even if the reflected wave of the control signal is received by the light receiving section 114, it is not transferred to the latch 147. It is never displayed.

Note that while receiving the response signal, the input discrimination circuit 15
A prohibition signal is supplied from 1 to the transmission control circuit 144, and as a result, the control signal is not transmitted.

FIG. 19 shows a specific example of the receiving system shown in FIG. 17, and in this figure, parts corresponding to those in FIG. 4 are given corresponding symbols, and detailed explanation of each part is omitted.

In FIG. 19, an inverter 161, a pulse generator 162, a flip-flop 163, a shift register 168, an AND circuit 164, a transistor 165, a light emitting diode 166, etc. are added so that a response signal can be transmitted. In this case, the first bit of the shift register 168 is set to "H" as the power supply voltage, and the sixth bit is set to "H" as the power supply voltage.
67, the power supply voltage is set to "H".
Furthermore, the 7th bit is grounded and set to "L".
In this way, the start bit is "H", the receiving system discrimination bit is "H", and the master/slave discrimination bit is "L".
We are trying to form the following.

In the main row, the response signal is also sent to the light emitting diode 16.
It will be easy to understand that the data can be transmitted via 6. I will not repeat the explanation here.

Note that the present invention is not limited to the above-described embodiments, and various changes can be made without departing from the spirit thereof.

For example, even in a multi-control system, a microcomputer may be used to configure the transmitting system and receiving system. Further, control signals and response signals may be transmitted using methods other than infrared rays. moreover,
It is also possible to extend the example shown in FIG. 16.
That is, a single centralized control console is employed as the receiving system, and control signals and response signals are transmitted wirelessly between the transmitting system and this console.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an example of a controlled system, Figs. 2 and 3 are block diagrams showing a conventional example, and Fig. 4 is a block diagram showing an example of a controlled system.
5 and 7 are line diagrams for explaining FIGS. 4 and 6, respectively, and FIGS. 8 and 10 are block diagrams showing other conventional examples, respectively.
Each figure is a block diagram showing one embodiment of the remote control device of the present invention, and FIGS. 9 and 11 are respectively 8
10, FIG. 12 is a system diagram showing another embodiment of the remote control device of the present invention, FIG. 13 is a line diagram for explaining FIG. 12, and FIG. 14 is a further diagram. System diagram showing other embodiments, No. 15
14 is a line diagram for explaining the example shown in FIG. 14, FIG. 16 is a system diagram showing a modification of the example shown in FIG. 14, FIGS. The figure is a configuration diagram showing FIG. 17 more specifically. 7 is a photodiode that receives a control signal; 2;
6 is a light emitting diode that emits a control signal; 72 is a light emitting diode that emits a response signal; 81 is a photodiode that receives the response signal; 91 is a transmitter that prohibits the response signal receiving operation when the control signal is transmitted. It's multi-purpose.

Claims (1)

[Scope of Claims] 1. A remote control device having a transmission means for transmitting a control signal to a controlled device, further comprising a response signal receiving means for receiving a response signal from the controlled device; A remote control device comprising a reception control means for prohibiting operation of the response signal reception means during a transmission period.