JPH0329190A - Clock signal input circuit - Google Patents

Clock signal input circuit

Info

Publication number
JPH0329190A
JPH0329190A JP1163524A JP16352489A JPH0329190A JP H0329190 A JPH0329190 A JP H0329190A JP 1163524 A JP1163524 A JP 1163524A JP 16352489 A JP16352489 A JP 16352489A JP H0329190 A JPH0329190 A JP H0329190A
Authority
JP
Japan
Prior art keywords
clock signal
circuit
potential
accordance
turning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1163524A
Other languages
Japanese (ja)
Other versions
JP2811760B2 (en
Inventor
Akane Aizaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1163524A priority Critical patent/JP2811760B2/en
Publication of JPH0329190A publication Critical patent/JPH0329190A/en
Application granted granted Critical
Publication of JP2811760B2 publication Critical patent/JP2811760B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE: To allow one memory circuit to satisfy requests to two kinds of memory circuits by providing a clock signal input circuit with a circuit for setting up the potential of an output signal in accordance with the potential of an external clock signal at the time of turning on a power supply and switching the control function of a clock signal in accordance with the potential of the external clock signal at the time of turning on the power supply.
CONSTITUTION: The clock signal input circuit is provided with an output signal potential setting circuit 100 inputting an external clock signal I1 and capable of setting up an output signal P to a high level or a low level in accordance with the potential of the external clock signal I1 at the time of turning on the power supply and a clock signal input buffer circuit 200. In accordance with the setting condition, i.e. the potential of the clock signal I1 up to the initial writing operation after turning on the power supply, of an output signal P from the circuit 100, circuit connection is automatically switched to change the control function of the clock signal I1 and the control functions of clock signals I1, I2 are simply switched in accordance with purposes. Consequently, market requests to two kinds of memory circuits can be satisfied only by one memory circuit.
COPYRIGHT: (C)1991,JPO&Japio
JP1163524A 1989-06-26 1989-06-26 Clock signal input circuit Expired - Lifetime JP2811760B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1163524A JP2811760B2 (en) 1989-06-26 1989-06-26 Clock signal input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1163524A JP2811760B2 (en) 1989-06-26 1989-06-26 Clock signal input circuit

Publications (2)

Publication Number Publication Date
JPH0329190A true JPH0329190A (en) 1991-02-07
JP2811760B2 JP2811760B2 (en) 1998-10-15

Family

ID=15775508

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1163524A Expired - Lifetime JP2811760B2 (en) 1989-06-26 1989-06-26 Clock signal input circuit

Country Status (1)

Country Link
JP (1) JP2811760B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008140018A (en) * 2006-11-30 2008-06-19 Denso Corp Electronic control device
US9614195B2 (en) 2014-03-31 2017-04-04 Gs Yuasa International Ltd. Energy storage device and manufacturing method of the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008140018A (en) * 2006-11-30 2008-06-19 Denso Corp Electronic control device
JP4706626B2 (en) * 2006-11-30 2011-06-22 株式会社デンソー Electronic control unit
US9614195B2 (en) 2014-03-31 2017-04-04 Gs Yuasa International Ltd. Energy storage device and manufacturing method of the same

Also Published As

Publication number Publication date
JP2811760B2 (en) 1998-10-15

Similar Documents

Publication Publication Date Title
JPH02141120A (en) Scanning register/latch circuit
JPH0329190A (en) Clock signal input circuit
JPH04196811A (en) Sequential logical circuit
JPS57129537A (en) Programmable array circuit
JPS6075126A (en) Multi-input logical circuit
JPH04352512A (en) Schmitt trigger circuit
JPS6286916A (en) High voltage switching circuit
JPH03237510A (en) Constant current circuit
JPS62179219A (en) Two-way bus buffer
JPH0377406A (en) Oscillation control circuit
JPH0411389A (en) Semiconductor memory device
JPH03206711A (en) Input buffer circuit
JPH0262797A (en) Dynamic type shift register
JPH03201148A (en) Memory card
JPH0482318A (en) Semiconductor integrated circuit
JPH02100413A (en) Integrated logic circuit
JPH0278093A (en) Buffer circuit built-in type memory device
JPS6290028A (en) Logic circuit
JPH01268315A (en) Logic circuit
JPH04175673A (en) Semiconductor integrated circuit
JPH02131618A (en) Output buffer circuit
JPH02239467A (en) Recording density switching circuit
JPH02162271A (en) Logical circuit
JPH046699A (en) Semiconductor memory
JPS63144495A (en) Memory cell circuit