JPH0329185A - Dual port memory device - Google Patents

Dual port memory device

Info

Publication number
JPH0329185A
JPH0329185A JP1163518A JP16351889A JPH0329185A JP H0329185 A JPH0329185 A JP H0329185A JP 1163518 A JP1163518 A JP 1163518A JP 16351889 A JP16351889 A JP 16351889A JP H0329185 A JPH0329185 A JP H0329185A
Authority
JP
Japan
Prior art keywords
data
switch
route
mode
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1163518A
Inventor
Makoto Murase
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP1163518A priority Critical patent/JPH0329185A/en
Publication of JPH0329185A publication Critical patent/JPH0329185A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To speed up data through operation by opening a switch connected in a route directly connecting a data input terminal with a data output terminal at the time of deciding a data through mode.
CONSTITUTION: The route for directly connecting an input side bit sense ampli fier 2 to be the data input terminal to an output side bit sense amplifier 3 to be the data output terminal is formed between these sense amplifiers 2, 3 without passing a memory cell 1 and an inter-bit sense amplifier switch 9 is connected to the route. The switch 9 is constituted of transfer gates 9a, 9b, which decide the data through mode based upon an address signal and are controlled at their opening/closing by the output of a comparator 4. Conse quently, a rapid data through function can be obtained by accessing the switch at the time of data through mode.
COPYRIGHT: (C)1991,JPO&Japio
JP1163518A 1989-06-26 1989-06-26 Dual port memory device Pending JPH0329185A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1163518A JPH0329185A (en) 1989-06-26 1989-06-26 Dual port memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1163518A JPH0329185A (en) 1989-06-26 1989-06-26 Dual port memory device

Publications (1)

Publication Number Publication Date
JPH0329185A true JPH0329185A (en) 1991-02-07

Family

ID=15775392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1163518A Pending JPH0329185A (en) 1989-06-26 1989-06-26 Dual port memory device

Country Status (1)

Country Link
JP (1) JPH0329185A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5761147A (en) * 1997-02-21 1998-06-02 International Business Machines Corporation Virtual two-port memory structure with fast write-thru operation
US6229754B1 (en) 2000-02-09 2001-05-08 International Business Machines Corporation Write through function for a memory
JP2007059026A (en) * 2005-08-26 2007-03-08 Renesas Technology Corp Semiconductor apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5761147A (en) * 1997-02-21 1998-06-02 International Business Machines Corporation Virtual two-port memory structure with fast write-thru operation
US6229754B1 (en) 2000-02-09 2001-05-08 International Business Machines Corporation Write through function for a memory
JP2007059026A (en) * 2005-08-26 2007-03-08 Renesas Technology Corp Semiconductor apparatus

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