JPH03274967A - Picture coder - Google Patents

Abstract

PURPOSE:To attain efficient coding even to an original in which pictures having spatial correlation with different property by coding a noted picture element based on a picture element value predicted through the use of referenced picture elements at plural positions. CONSTITUTION:Picture elements by several lines including plural picture elements of a picture signal is delayed in a line memory 10 and the result is inputted to state prediction circuits A11, B11. The circuits A11, B11 divide the state of a picture to be coded into 2<4> states to input state identification signals SA, SB to index revision circuits 13, 14. The circuits 13, 14 revise index signals IA, IB into a parameter suitable for coding by using the signals SA, SB and the picture data signal D and output prediction coincidence signals YA, YB to a comparison discriminator 15 together with the index signals IA, IB. The discriminator 15 compares the signals and selects larger signals IE, YE, the signal IE is inputted to a parameter decision device 16 to decide a coding parameter Q, it is fed to a coder 17, the signal YE is coded by using the parameter Q to form a code word, which is sent.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image encoding device in a facsimile device or an image filing device, which are image communication devices.

[Conventional technology]

The conventional image encoding method is G3. A run-length encoding method, typified by G4 facsimile, is generally used. This encoding method is a method in which the length (run length) of a binary pixel in which white or black continues is counted, and a code corresponding to the count value is determined from a code table prepared in advance.

The code table used here is characterized by assigning relatively short codes to long white runs, which are common in document images.

Therefore, if the statistical properties of the run length are significantly different from those of the image used as a reference when creating the codebook (for example, a pseudo-halftone image), the problem arises that the amount of code exceeds the original data. ing.

Furthermore, a conventionally known arithmetic code is a method in which a code is formed by arithmetic operations on an example of an input signal so that it becomes a code expressed in binary decimal numbers. For this arithmetic code, see, for example, Langdon and R15sanen.
Reference “Compression of B” by et al.
la-ck/White Images with
Arithmetic Coding IEEE T
Ran, Com, C0M-29, 6 (1981, 6), etc. According to this document, when an input S that has already been encoded, the probability of appearance of an inferior symbol is q, an arithmetic register is A (s), and a code register is C (s),
The following arithmetic operations are performed for each input signal.

A (s 1)=A (s)Xq=A (s)X2-Q
(1) A (s O) =<A (s) −A (s 1)
>.

(2) C(s O) = C(s)
(3) C(s 1)=C(s) 10A (so
) (4) <> indicates abort of operation at valid V bit.

Encoded data is the dominant symbol (MPS: 0 in the above example)
In this case, A(so) and C(so) are used to encode the next data. Furthermore, in the case of a less-likely symbol (LPS: 1 in the above example), A(sl) and C(sl) are used to encode the next data.

The new value of A is multiplied by 20 (h is an integer greater than or equal to 0) so that it falls within the range of 0.5≦A<1.0. In hardware, this processing corresponds to shifting the binary data to the left S times. The code register C is also shifted the same number of times, and the shifted out signal becomes the code word.

The above process is repeated to form a code.

Furthermore, as shown in equation (1), the probability of appearance of LPS q
By approximating by a power of 2 (2-0: Q is a positive integer), the multiplication calculation is replaced with a shift calculation. In order to make this approximation even better, the arithmetic coding method announced at the 1986 Spring Institute of IEICE, titled "A Method for Improving Efficiency in Arithmetic Coding," approximates q by a polynomial sum of powers of 2. ing. This approximation improves the worst point of encoding efficiency.

Furthermore, since the arithmetic code can switch the value of Q for each encoded data, it has the advantage that the probability estimating section and the encoding section can be separated.

By combining the above-described arithmetic codes with predictive coding, it becomes possible to efficiently code binary images.

That is, in prediction, several surrounding pixels of the encoding unit are already referred to, and the states are divided according to the states of those pixels. The dominant symbol MPS and predicted matching probability p in each state are stored, and the MPS is applied to a new input signal.
The match/mismatch is determined. This is called predictive conversion, and when a match occurs, an output signal Y of 1 is output.

Encoding is performed by sending this Y and the encoding parameters for the coincidence probability p (in other words, the probability of appearance of the inferior symbol q=1-p) to the arithmetic encoder.

[Problem that the invention is trying to solve] However,
The conventional technique has only one type of reference pixel set used for prediction.

Therefore, since the spatial correlation between text images centered on documents and systematic dithered images displaying photographs etc. is greatly different, using the optimal reference pixel set for one will reduce the encoding efficiency of the other. There was a problem with it going down.

[Means to solve the problem]

The present invention has been made in view of the above points, and an object of the present invention is to perform efficient encoding even on a manuscript in which images with different spatial correlations of different properties coexist. In an image encoding device that encodes a pixel of interest based on a pixel value predicted by referring to a plurality of pixels surrounding a pixel of interest to be converted, the plurality of reference means refer to pixels at a plurality of mutually different positions; encoding means for encoding a pixel of interest based on a pixel value predicted using a plurality of pixels referenced by any of the reference means, and a match between the pixel value predicted from the plurality of reference means and the pixel of interest; The present invention provides an image encoding device having a selection means for selecting a reference means having a higher rate.

〔Example〕

FIG. 1 shows an embodiment of an image encoding device to which the present invention is applied.

The binarized image signal D100 is input to the line memory 10. In this line memory 10, at least several lines of image data including a plurality of pixels necessary for state prediction are delayed. This data is input to the state prediction circuit All, B12. These state prediction circuits All and B12 have different reference pixel positions.

For example, FIG. 2 shows the reference pixel positions of the state prediction circuit All, and the four pixels (#1, #2, #3, #4 in FIG.
) represents reference pixels suitable for character images. Here * indicates the position of the encoded pixel. Also, FIG. 3 shows the reference pixel positions of the state prediction circuit B12, and the four pixels (#1° #2. #3. #4) shown in FIG. It represents a reference pixel suitable for a dithered image.

The state prediction circuit All, B12 determines the state of the image to be encoded by 2' (
=16) Separate into states. The signal indicating this state is SA,
S, and index update circuits A13.S, respectively.
It is input to B14.

FIG. 4 is a block diagram of the state prediction circuit All.

50 to 55 are data latches. #1 latch 53 holds the data of one pixel before the image signal, and
#2. #3. The #4 latch 52.51.50 holds data corresponding to the pixel positions shown in FIG. 2 one line before from the line buffer 10, inputs this to the address of the ROM 56, and as a result, the state identification signal SA is obtained.

FIG. 5 is a block diagram of the state prediction circuit B12.

20 to 29 are data latches. #1. The latches 27 and 29 of #2 hold the data of two pixels before and four pixels before the image signal, respectively. #3 latch 22
．． 20 holds data corresponding to the pixel positions shown in FIG. 3 two lines before from the line buffer 10, and inputs this to the address of the ROM 30, resulting in a state identification signal SB.

FIG. 6 shows the index update circuit A13. It is a block diagram of B14.

The state identification signal S from the state prediction circuit All, B12 is
The count memory 40 and condition memory 41 are entered. The count memory 40 stores the dominant symbols MP counted so far.
The number (NM) of S is outputted to the index update determination unit 42, and the update signal NM' which is incremented by +1 or reset to O is stored.

The condition memory 41 also outputs the index signal I and M indicating the symbol of the dominant symbol MPS to the index update determiner 42, and outputs the updated signals 1' and M, respectively.
'is something to remember.

The index signal I can also be used as a count table ROM.
43, MC indicating the number of dominant symbols MPS required for index update is determined, and the output signal MC is sent to index update determination circuit 42. Index signal I
is further output to the outside as is.

In addition, the predictive conversion circuit 44 compares the signal M indicating the symbol of the dominant symbol MPS from the condition memory 41 with the image signal, and generates a predictive conversion signal Y which becomes 1 when M and D match, and 1 when they do not match. generate.

On the other hand, from the count table ROM 43, a signal Inc/Dec indicating the index increase/decrease at the time of update determined for each index is sent to the index update determination circuit 43.
Output to 2.

Table 2 shows an example of the count table ROM 43.

Index update circuit A13 with the above configuration. In B14, the state identification signals SA, S and the image data signal
Index IA indicating a table containing encoding parameters, 1. is changed to a parameter suitable for the encoding state. This will move towards improving coding efficiency.

More specifically, the dominant symbol MP in each state
S (in other words, predicted symbol) or inferior symbol LPS is determined in advance, and it is determined whether the image signal is the dominant symbol MPS or the inferior symbol LPS, and when the dominant symbol MPS continues for a set number of symbols, the index is increased and the When an inferior symbol LPS occurs, an update process is performed to reduce the index. As will be described later, in each index, 21 representative points are shown in descending order of the probability of appearance of the inferior symbol LPS (in other words, descending order of predicted match rate). Therefore, by increasing or decreasing this index value, the predicted matching rate of each state can be adjusted to a value close to the actual predicted matching rate.

Index update circuit A13. B14 outputs index signals I^ and IB independently. Also,
Predicted match signal YA, Y, (O when matched, 1 when mismatched)
is also output at the same time.

The comparison/judgment unit 15 compares the index signals IA and I8, and selects the larger index and predicted match signal to become the signals IE and YE, respectively.

The signal enters the IE multiplication signal parameter determiner 16, determines Q, which is an arithmetic code encoding parameter, and sends it to the encoder 17.

Further, the encoder 17 encodes the predicted coincidence signal YE using the encoding parameter Q to form a code word, which is transmitted via the transmission path.

The transmitted code word is decoded by a receiver (not shown).

By providing the same update circuit used for encoding on the receiver side, the encoding and decoding sides can be synchronized.

FIG. 7 shows the index update determination circuit A13. The processing procedure of B13 is shown in a flowchart.

First, the predictive conversion signal Y is determined (60).

At Y20, add +1 to the MPS count number NM and get N
Create M' (61). Next, it is determined whether NM' is equal to the number MC of dominant symbols MPS necessary for updating the index (62), and when they match, the index I is
Increment cn.

It also resets NM'=O (63).

On the other hand, when the prediction conversion signal Y is determined (60), when Y=1, it is next determined whether the index I is 1 or not (64), I=
When it is 1, the MPS symbol is inverted by M'=1-M and reset to NM'=O (66).

When I=1, reduce I by Dec, and NM'=
Reset to 0 (65).

The amounts of Inc and Dec used to increase or decrease the index ■ are:
Current index I from count table ROM43
is determined according to the value of

According to the above procedure, the updated I' and M'NM' are stored in the count memory 40 and the condition memory 41, respectively.

FIG. 8 is a block diagram of the comparison/judgment circuit.

Index update circuit A13. The two index signals IA and Is input from each of B14 are input to the comparator 90.
The size is compared by ■, ≧■.

Then, the SEL signal is 1. Otherwise, set the SEL signal to O.

Selectors 91 and 92 select IA and Y when the SEL signal is 1.
Select A, and when the SEL signal is 0, select 1, Y, and send the results to IE.

Set it as YE. Subsequent encoding processing is performed using IE and YE.

FIG. 9 shows a coding efficiency curve of the arithmetic code used in this embodiment. This curve shows the occurrence rate of LPS as q
, when the approximate probability at the time of encoding is q/1, it is expressed by the following equation.

η=H/ (-q 1 og2q/ (1q)10gz (1q' I)] Here, the molecule H
is the memoryless entropy, H=-qlog=q (I Q)log2 (1, Q) Also, q'1 is binomially approximated as q', =2-q1+K・2-q2 (K is +1. or -1).

For example, q', = 2-r q', ==2□'-2-'q'=2-"+2-", etc., and with this probability, Q'I where the efficiency η becomes 1.0 is , called the effective probability. Furthermore, the probability of the intersection of the efficiency curves is called the boundary probability, and when it is estimated that this probability is exceeded, it is encoded using the parameter of the adjacent effective probability.

Table 1 shows an example of a parameter table in the parameter determiner 16.

In this embodiment, 21 effective probabilities are selected from the probabilities that can be approximated by two polynomials as shown in Table 1. In addition, the parameters Q1Q, , Q in Table 1 are the arithmetic encoder 17
This is the parameter sent to. Q,,Q, are shift amounts given to the shift register, and a power of 2 calculation is performed by this shift operation. Further, Q indicates the number of threads in the second item, and is switched between + and -.

In addition, MC (MPS required for index update) in Table 2
) is determined as follows.

When the number of LPS is NL and the number of MPS is N, PL
The probability of occurrence of S is given by the following formula.

Solving this equation using NM gives the following equation.

By giving q to qb+, the number N Ml of dominant symbols there is calculated.

Furthermore, the difference between each NMI is calculated using the following formula, and the number MC of MPS required to update each index is calculated.

MC,=N, , , -NM.

The MC values in Table 2 were calculated assuming NL=2.

FIG. 10 shows an encoder 17 that performs encoding using arithmetic codes.
FIG. Control signal Qt (Q, ,Q,,Q,) determined by the encoding parameter determination circuit 16
Of these, Ql is input to the shift register A70, Q is input to the shift register B71, and Q8 is input to the selector 72. Q
, ,Q, are the respective shift registers A70 . Instructs B71 how many bits As123 is to be shifted.

The shifted results become outputs 130 and 131.

Signal 131 and signal 13 complemented by inverter 76
3 is switched by the selector 72 using the control signal Q8. In adder 73, signal 130 and signal 1
32 addition is performed and an As+ signal 124 is output. The subtracter 74 extracts the As+signal 1 from the As signal 123.
24 to obtain the As0 signal 125. selector 75
Now, one of the signals As+Aso is selected by the Y signal 101. When Y-0, A'=As.

When Y=1, ・A'=As becomes the A' signal 126.

In the shift circuit 80, the shift is performed to the left until the MSB of the A' signal 126 becomes 1, and the As' signal 127 is shifted to the left.
is obtained. Shift signal 13 corresponding to this number of shifts
2 enters the code register 79, and a number of bits corresponding to the number of shifts are output in order from the MSB to code data 1.
Becomes 30. The code data 130 is transmitted after being subjected to restriction processing using a bit processing method (not shown) so that the number of consecutive 1s is within a finite number.

The CR contents 128 of the code register 79 are added to the Aso signal 125 by the adder 77 and input to the selector 78 . Further, the CR signal 128 itself also enters the selector 78, and the Y
When Y=0 in signal 101, CR'=CR, Y=1
When , CR' signal 129 becomes CR' = CR0Aso.
become. Regarding code register 79, the shift processing described above is performed on CR' signal 129.

As explained above, in an image encoding device that encodes a pixel of interest based on a pixel value predicted by referring to multiple pixels surrounding the pixel of interest to be encoded, multiple types of parameters for pixel value prediction are used. A parameter table is provided, and an index is assigned to each of the plurality of parameters in descending order of matching rate, and a plurality of state prediction circuits each having a set of two or more different types of reference pixels and corresponding thereto. Equipped with multiple index update circuits to
By comparing the index values from multiple update circuits and performing actual encoding using the encoding parameters determined from the one with the larger index value (higher predicted matching rate), various images with different spatial correlations can be generated. On the other hand, since the coding parameters are adaptively switched to those determined by the index value with a high prediction matching rate, efficient coding can be performed even for images in which the above-mentioned images are mixed.

In this embodiment, a configuration is adopted in which multiple pixels at two different reference pixel positions are referenced, but in order to perform efficient encoding for a wide variety of images, three or more reference pixel positions may be used. It may be configured to refer to pixel positions.

Further, the encoding method is not limited to arithmetic codes, but can be similarly applied to other predictive encoding methods.

Table 1 Table 2 [Effects of the Invention] As explained above, according to the present invention, pixels at a plurality of different positions are referred to and encoding is performed using reference pixels with a high prediction matching rate. Efficient encoding can be achieved for images.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an image encoding device to which the present invention is applied; FIG. 2 is an explanatory diagram of reference pixel positions for character images; FIG. 3 is an explanatory diagram of reference pixel positions for dither images; 5 and 5 are block diagrams of the state prediction circuit, FIG. 6 is a block diagram of the index update circuit, FIG. 7 is a flowchart for explaining index update determination, and FIG. 8 is a block diagram of the comparison determination circuit. FIG. 9 is an explanatory diagram of a coding efficiency curve of an arithmetic code, and FIG. 10 is a block diagram of an arithmetic encoder. 11.12...State prediction circuit 13.14...Index update circuit 15...Comparison/determiner 16...Parameter determiner LP, f7hrodabtlitz Ix amount 7

Claims (1)

[Claims] An image encoding device that encodes a pixel of interest based on a pixel value predicted by referring to a plurality of pixels surrounding a pixel of interest to be encoded, comprising: a reference means for encoding a pixel of interest based on a pixel value predicted using a plurality of pixels referenced by any of the plurality of reference means; and a pixel predicted from among the plurality of reference means. An image encoding device comprising a selection means for selecting a reference means having a higher matching rate between a value and a pixel of interest.