JPH03272195A - Manufacture of multilayer printed wiring board - Google Patents

Manufacture of multilayer printed wiring board

Info

Publication number
JPH03272195A
JPH03272195A JP7245990A JP7245990A JPH03272195A JP H03272195 A JPH03272195 A JP H03272195A JP 7245990 A JP7245990 A JP 7245990A JP 7245990 A JP7245990 A JP 7245990A JP H03272195 A JPH03272195 A JP H03272195A
Authority
JP
Japan
Prior art keywords
hole
layer
wiring board
printed wiring
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7245990A
Other languages
Japanese (ja)
Inventor
Masao Ishibashi
石橋 正朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP7245990A priority Critical patent/JPH03272195A/en
Publication of JPH03272195A publication Critical patent/JPH03272195A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To enable holes to be improved in position accuracy and miniaturized so as to make a wiring board high in wiring density by a method wherein a blind viahole is bored in a multilayer printed wiring board with laser rays when the multilayer printed wiring board provided with a blind hole is formed. CONSTITUTION:A through-hole 3 is bored in a base material 1 on which a copper foil 2 is pasted, the copper foil 2 is etched to form a circuit 4a, and an insulator layer 5 of epoxy insulating resin is formed on the whole surface through a screen printing method excluding the through-hole 3. Then, an adhesive layer 6 formed of additive adhesive agent is applied on the layer 5 through a screen printing method and hardened, the layer 6 is treated with a roughening liquid mainly composed of CrO3 100g/l and H2SO4 300ml/l to turn into a roughened face 7, and a blind hole 8 is provided to a part where a blind viahole is formed by the irradiation with laser rays. Then, a resist layer 10 is provided to the whole surface through the intermediary of a catalyst 9, a copper plating layer 11 is formed on a part other than the layer 10 through a thick electroless plating method, and a viahole 12, a through-hole 14, and a prescribed circuit 4b are provided.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は多層印刷配線板の製造方法に関し、特に非貫通
孔を有する多層印刷配線板の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a multilayer printed wiring board, and particularly to a method for manufacturing a multilayer printed wiring board having non-through holes.

〔従来の技術〕[Conventional technology]

以下に、従来のこの種の多層印刷配線板の製造方法を第
3図を参照にして説明する。
A conventional method for manufacturing this type of multilayer printed wiring board will be described below with reference to FIG.

ます、第3図(a)の如く、銅箔2を張り合わせた基材
1に穴あけを施して貫通孔3を形成する。
First, as shown in FIG. 3(a), a through hole 3 is formed by drilling a hole in the base material 1 on which the copper foil 2 is laminated.

次に、第3図(b)の如く、銅箔2を従来工法にてエツ
チングし回路4aを形成する。
Next, as shown in FIG. 3(b), the copper foil 2 is etched using a conventional method to form a circuit 4a.

次に、第3図(c)の如く、スクリーン印刷法にて貫通
孔3及び上層導体との接続部となる非貫通孔を除き絶縁
体層5を印刷、形成する。
Next, as shown in FIG. 3(c), an insulator layer 5 is printed and formed using a screen printing method, excluding the through holes 3 and non-through holes that will be connection parts with the upper layer conductor.

次に、第3図(d)の如く、絶縁体層5上にスクリーン
印刷法にて接着剤層6を塗布する。
Next, as shown in FIG. 3(d), an adhesive layer 6 is applied onto the insulating layer 5 by screen printing.

次に、第3図(e)の如く、その表面を粗化し接着剤層
粗化面7を得る。
Next, as shown in FIG. 3(e), the surface is roughened to obtain a roughened surface 7 of the adhesive layer.

次に、第3図(f)の如く、全面に触媒処理を施し、触
媒9を被着する。
Next, as shown in FIG. 3(f), the entire surface is subjected to catalyst treatment and a catalyst 9 is deposited.

次に、第3図(g)の如く、パネル銅めっきを行い銅め
っき層1−1を形成しこれによりブラインドビアホール
12とスルーホール14を形成する。
Next, as shown in FIG. 3(g), panel copper plating is performed to form a copper plating layer 1-1, thereby forming blind via holes 12 and through holes 14.

次に、第3図(h)の如く、フォトマスク15の位置合
わせを行い通常の回路形成を行う。
Next, as shown in FIG. 3(h), the photomask 15 is aligned and a normal circuit is formed.

次に、第3図(i)の如く、最外層に回路4bを設ける
Next, as shown in FIG. 3(i), a circuit 4b is provided in the outermost layer.

最後に、第3図(j>の如く、ソルダーレジスト13を
形成し、所定の多層印刷配線板を得る。
Finally, as shown in FIG. 3 (j>), a solder resist 13 is formed to obtain a predetermined multilayer printed wiring board.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の多層印刷配線板の製造方法では以下のよ
うな欠点を有していた。
The conventional multilayer printed wiring board manufacturing method described above had the following drawbacks.

(1)ブラインドビアホールとなる非貫通孔をスクリー
ン印刷工法にて形成するため、ブラインドビアホールの
位置精度は、スクリーン合わせ精度によるが、スクリー
ン合わせ精度が良くないため、設計的にブラインドビア
ホールを大きくする必要があり、高密度配線の妨げとな
っている。
(1) Since the non-through holes that will become blind via holes are formed using the screen printing method, the positional accuracy of the blind via holes depends on the screen alignment accuracy, but since the screen alignment accuracy is not good, it is necessary to make the blind via holes larger in design. This is an obstacle to high-density wiring.

(2)絶縁層形成時のスクリーン印刷法自体の特性によ
り、直径が0.5mm以下のような小径のブラインドビ
アホールを形成できず、高密度配線の妨げとなっている
(2) Due to the characteristics of the screen printing method itself when forming the insulating layer, it is not possible to form blind via holes with a small diameter of 0.5 mm or less, which hinders high-density wiring.

本発明の目的は、高密度配線が可能な多層印刷配線板の
製造方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a multilayer printed wiring board that allows high-density wiring.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、銅箔を張った基材に貫通孔を設ける工程と、
通常工法により回路を形成する工程と、前記貫通孔部と
上層導体との接続部となる非貫通孔部を除き絶縁体層を
形成する工程と、該絶縁体層上に接着剤層を形成し該接
着剤層表面を粗化する工程と、前記貫通孔と前記非貫通
孔と前記接着剤層表面にめっきを施し所定の回路とスル
ーホールとブラインドビアホールとを形成する工程とを
有する多層印刷配線板の製造方法において、前記絶縁体
層と前記接着剤層とをレーザー光線を照射することによ
って穴あけし前記非貫通孔を形成する工程を含んで構成
されている。
The present invention includes a step of providing a through hole in a base material covered with copper foil;
a step of forming a circuit by a normal construction method, a step of forming an insulator layer except for the non-through hole portion which becomes a connection portion between the through hole portion and the upper layer conductor, and forming an adhesive layer on the insulator layer. A multilayer printed wiring comprising a step of roughening the surface of the adhesive layer, and a step of plating the through holes, the non-through holes, and the surface of the adhesive layer to form predetermined circuits, through holes, and blind via holes. The method for manufacturing a board includes the step of drilling the insulating layer and the adhesive layer by irradiating the adhesive layer with a laser beam to form the non-through hole.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図(a)〜(j)は本発明の第1の実施例の製造方
法を説明する工程順に示した縦断面図である。
FIGS. 1(a) to 1(j) are vertical cross-sectional views showing the manufacturing method of the first embodiment of the present invention in the order of steps.

第1の実施例は、まず、第1図(a>の如く、銅箔2を
張り合わせた基材1に穴あけを施して貫通孔3を設ける
In the first embodiment, first, as shown in FIG. 1 (a), a through hole 3 is provided by drilling a hole in a base material 1 on which a copper foil 2 is laminated.

次いで、第1図(b)の如く、通常工法にて銅箔2をエ
ツチングし回路4aを得る。
Next, as shown in FIG. 1(b), the copper foil 2 is etched using a normal method to obtain a circuit 4a.

次いで、第1図(c)の如く、スクリーン印刷法によっ
て貫通孔3部を除き絶縁体層5を形成する。この絶縁体
層5には、エポキシ系絶縁樹脂を用い絶縁体層5の厚さ
は約50μmとする。
Next, as shown in FIG. 1(c), an insulator layer 5 is formed by screen printing except for 3 portions of the through holes. This insulator layer 5 is made of epoxy-based insulating resin, and the thickness of the insulator layer 5 is about 50 μm.

次いで、第1図(d)の如く、絶縁体層5の上に接着剤
層6をスクリーン印刷法により塗布し硬化させる。接着
剤層6には、アディティブ用接着剤を用いる。
Next, as shown in FIG. 1(d), an adhesive layer 6 is applied onto the insulating layer 5 by screen printing and cured. For the adhesive layer 6, an additive adhesive is used.

次いで、第1図(e)の如く、(、rogl、o。Then, as shown in FIG. 1(e), (, rogl, o.

g / 11 、 H2S O4300m (1/ 4
を主成分とする粗化液で7〜10分処理し接着剤層粗化
面7を得る。
g/11, H2S O4300m (1/4
The roughened surface 7 of the adhesive layer is obtained by treating with a roughening liquid containing as a main component for 7 to 10 minutes.

次いで、第1図(f)の如く、ブラインドビアホール形
成部位にレーザー光線を照射し非貫通孔8を形成する。
Next, as shown in FIG. 1(f), a blind via hole 8 is formed by irradiating a laser beam onto the blind via hole forming area.

レーザー光線には炭酸ガスレーザーを用いる。A carbon dioxide laser is used for the laser beam.

次いで、第1図(g)の如く、全面に触媒処理を施し、
触媒9を被着する。
Next, as shown in Figure 1 (g), the entire surface is subjected to catalyst treatment,
A catalyst 9 is deposited.

次いで、第1図(h)の如くドライフィルムを用いてめ
っきレジスト10を形成する。
Next, as shown in FIG. 1(h), a plating resist 10 is formed using a dry film.

次に、第1図(i)の如く、厚付は無電解銅めっきによ
りめっきレジスト以外に銅めっき層11を形成し、ブラ
インドビアホール12 スルーホール14及び所定の回
路4bを形成する。
Next, as shown in FIG. 1(i), a copper plating layer 11 is formed in addition to the plating resist by thick electroless copper plating, and blind via holes 12, through holes 14, and predetermined circuits 4b are formed.

最後に、第1図(j)の如く、ソルダーレジスト13を
スクリーン印刷法にて塗布し所定の回路を有する多層印
刷配線板を得る。
Finally, as shown in FIG. 1(j), a solder resist 13 is applied by screen printing to obtain a multilayer printed wiring board having a predetermined circuit.

第2図(a)〜(e)は本発明の第2の実施例の製造方
法を説明する工程順に示した断面図である。
FIGS. 2(a) to 2(e) are cross-sectional views showing the manufacturing method of the second embodiment of the present invention in the order of steps.

第2の実施例は、まず、第2図(a)の如く、第1の実
施例と同様の工法で、レーザー光線により非貫通孔8を
形成した後、全面に触媒処理を施し、触媒9を被着する
。 次いで、第2図(b)の如く、パネルめっきにより
全面に銅めっき層11を形成することにより、ブライン
ドビアホール12及びスルーホール14を形成する。
In the second embodiment, first, as shown in FIG. 2(a), a non-penetrating hole 8 is formed using a laser beam using the same method as in the first embodiment, and then the entire surface is subjected to catalyst treatment, and a catalyst 9 is formed. to adhere to. Next, as shown in FIG. 2(b), a copper plating layer 11 is formed on the entire surface by panel plating, thereby forming blind via holes 12 and through holes 14.

次いで、第2図<c)の如く、通常のフォトマスク15
の位置合せを行う。
Next, as shown in FIG. 2<c), a normal photomask 15 is
Perform alignment.

次いで、第2図(d)の如く、所定の回!、4bを形成
する。
Then, as shown in FIG. 2(d), a predetermined number of times! , 4b.

最後に、スクリーン印刷法にてソルダーレジスト13を
塗布し所定の回路を有する多層印刷配線板を得る。
Finally, a solder resist 13 is applied by screen printing to obtain a multilayer printed wiring board having a predetermined circuit.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ブラインドビアホール用
非貫通孔形成時に、レーザー光線による穴あけを行うこ
とにより、ブラインドビアホールの位置精度向上及び小
径化が可能であり、多層印刷配線板の高密度配線化がで
きる効果がある。
As explained above, the present invention makes it possible to improve the positional accuracy and reduce the diameter of blind via holes by drilling with a laser beam when forming non-through holes for blind via holes, and to increase the density of wiring in multilayer printed wiring boards. There is an effect that can be done.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(j)は本発明の第1の実施例の製造方
法を説明するための工程順に示した縦断面図、第2図(
a)〜(e)は本発明の第2の実施例の製造方法を説明
するための工程順に示した縦断面図、第3図(a)〜(
j)は従来の印刷配線板の製造方法の一例を説明するた
めの工程順に示した縦断面図である。 1・・・基材、2・・・銅箔、3・・・貫通孔、4a、
4b・・・回路、5・・・絶縁体層、6・・・接着剤層
、7・・・接着剤層粗化面、8・・・非貫通孔、9・・
・触媒、1o・・・めっきレジスト、11・・・銅めっ
き層、12・・・ブラインドビアホール、13・・・ソ
ルダーレジスト、14・・・スルーホール、15・・・
フォトマスク。
FIGS. 1(a) to (j) are longitudinal cross-sectional views shown in the order of steps for explaining the manufacturing method of the first embodiment of the present invention, and FIG.
a) to (e) are longitudinal cross-sectional views shown in the order of steps for explaining the manufacturing method of the second embodiment of the present invention, and FIGS.
j) is a longitudinal cross-sectional view shown in the order of steps for explaining an example of a conventional method for manufacturing a printed wiring board. DESCRIPTION OF SYMBOLS 1... Base material, 2... Copper foil, 3... Through hole, 4a,
4b...Circuit, 5...Insulator layer, 6...Adhesive layer, 7...Adhesive layer roughened surface, 8...Non-through hole, 9...
・Catalyst, 1o... Plating resist, 11... Copper plating layer, 12... Blind via hole, 13... Solder resist, 14... Through hole, 15...
Photo mask.

Claims (1)

【特許請求の範囲】[Claims] 銅箔を張った基材に貫通孔を設ける工程と、通常工法に
より回路を形成する工程と、前記貫通孔部と上層導体と
の接続部となる非貫通孔部を除き絶縁体層を形成する工
程と、該絶縁体層上に接着剤層を形成し該接着剤層表面
を粗化する工程と、前記貫通孔と前記非貫通孔と前記接
着剤層表面にめっきを施し所定の回路とスルーホールと
ブラインドビアホールとを形成する工程とを有する多層
印刷配線板の製造方法において、前記絶縁体層と前記接
着剤層とをレーザー光線を照射することによって穴あけ
し前記非貫通孔を形成する工程を含むことを特徴とする
多層印刷配線板の製造方法。
A step of providing a through hole in a base material covered with copper foil, a step of forming a circuit using a normal construction method, and a step of forming an insulator layer excluding the non-through hole portion that will be the connection portion between the through hole portion and the upper layer conductor. a step of forming an adhesive layer on the insulator layer and roughening the surface of the adhesive layer; and plating the through hole, the non-through hole, and the surface of the adhesive layer to form a predetermined circuit and through-hole. A method for manufacturing a multilayer printed wiring board comprising a step of forming a hole and a blind via hole, the method comprising the step of drilling the insulating layer and the adhesive layer by irradiating a laser beam to form the non-through hole. A method for manufacturing a multilayer printed wiring board, characterized by:
JP7245990A 1990-03-20 1990-03-20 Manufacture of multilayer printed wiring board Pending JPH03272195A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7245990A JPH03272195A (en) 1990-03-20 1990-03-20 Manufacture of multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7245990A JPH03272195A (en) 1990-03-20 1990-03-20 Manufacture of multilayer printed wiring board

Publications (1)

Publication Number Publication Date
JPH03272195A true JPH03272195A (en) 1991-12-03

Family

ID=13489909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7245990A Pending JPH03272195A (en) 1990-03-20 1990-03-20 Manufacture of multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPH03272195A (en)

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