JPH03261000A - Defect relieving system for wafer memory - Google Patents

Defect relieving system for wafer memory

Info

Publication number
JPH03261000A
JPH03261000A JP6054690A JP6054690A JPH03261000A JP H03261000 A JPH03261000 A JP H03261000A JP 6054690 A JP6054690 A JP 6054690A JP 6054690 A JP6054690 A JP 6054690A JP H03261000 A JPH03261000 A JP H03261000A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
memory
wafer
chip
performed
wafer memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6054690A
Inventor
Shohei Ikehara
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Abstract

PURPOSE: To easily form wafer memory of multiple bits by efficiently using wafer memory by efficiently evading a defective chip located at an arbitrary position on the wafer memory on which plural chips are loaded.
CONSTITUTION: A register 20 to store an identifier, a comparator 22 to detect coincidence between a chop number and the identifier, and a register 21 to store information to show to which out of data lines D0 connection is performed are provided at the chip 2 loaded on the wafer memory. Then, a number wiring ID independent at every column and the input/output wiring of plural data lines D0 are performed, and the information to decide the working constitution of a good chip is stored in the ROM. An arbitrary chip is selected based on data read out from the ROM, and the connection is performed so as to be connected to an input/output line at a bit position decided in advance. In such a way, it is possible to efficiently use the memory in which a defect occurs at the arbitrary position on the wafer memory.
COPYRIGHT: (C)1991,JPO&Japio
JP6054690A 1990-03-12 1990-03-12 Defect relieving system for wafer memory Pending JPH03261000A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6054690A JPH03261000A (en) 1990-03-12 1990-03-12 Defect relieving system for wafer memory

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP6054690A JPH03261000A (en) 1990-03-12 1990-03-12 Defect relieving system for wafer memory
DE1991627113 DE69127113D1 (en) 1990-03-05 1991-03-04 On a wafer of integrated memory and Multibitzugang system with the same memory
EP19910301781 EP0446002B1 (en) 1990-03-05 1991-03-04 Wafer scale memory having improved multi-bit accessing and system having the wafer scale memory
DE1991627113 DE69127113T2 (en) 1990-03-05 1991-03-04 On a wafer of integrated memory and Multibitzugang system with the same memory

Publications (1)

Publication Number Publication Date
JPH03261000A true true JPH03261000A (en) 1991-11-20

Family

ID=13145397

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6054690A Pending JPH03261000A (en) 1990-03-12 1990-03-12 Defect relieving system for wafer memory

Country Status (1)

Country Link
JP (1) JPH03261000A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000133000A (en) * 1998-10-28 2000-05-12 Toshiba Corp Memory hybrid logic lsi

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000133000A (en) * 1998-10-28 2000-05-12 Toshiba Corp Memory hybrid logic lsi
JP4601737B2 (en) * 1998-10-28 2010-12-22 株式会社東芝 Memory embedded logic lsi

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