JPH03259616A - Output buffer circuit - Google Patents

Abstract

PURPOSE:To suppress ringing caused in an output signal outputted from a driving transistor(TR) by providing a control TR to suppress a voltage applied to the control electrode of the driving TR lower at a change in the input signal. CONSTITUTION:For example, when an input signal is changed from an H level and an L level, a TR 4 is conductive to bring the gate voltage of a drive TR 1 to the level of a power supply, thereby making the driving TR 1 nonconductive. Since the output of an inverter 3 goes to an H level, control TRs 6-8 are nonconductive. However, TRs 9-11 are conductive and the gate voltage of a driving TR 2 goes to an H level. Since the H potential is lower than the power supply potential by 3VTH, a drain current LDS is decreased and the control TR 2 is conductive. However, the continuity resistance is increased to suppress the ringing caused in an output signal.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an output buffer circuit, and particularly to an output buffer circuit that prevents ringing that occurs in an output signal when its input signal changes [Prior Art] FIG. 3 is a circuit diagram showing a conventional output buffer circuit.
In the figure, (z) and (2) are driving transistors that drive the load, such as P-channel MOSFETs, respectively.
(hereinafter referred to as PMOSFET), N-channel MOSFET
ET (hereinafter referred to as NMO8FET), these driving transistors (1) and (2) are connected in series with each other between the power supply and ground, and one of the main electrodes, such as the drain electrode, is both connected to the load. . (3) is a signal transmission inverter whose output is a driving transistor (1
) and (2) are connected to the control electrode, for example, the gate electrode. Further, the input end of the inverter (3) is connected to an input signal source, for example, an internal circuit.

Next, the operation of the conventional output buffer circuit shown in Fig. 3 is as follows.
The waveform diagram in FIG. 4 will be explained. The input signal applied from the input signal to the input terminal of the inverter (3) is shown in Figure 4 (
As shown in a), when it is at a low level (hereinafter referred to as L level), the output of the inverter (3) becomes a high level (hereinafter referred to as H level), so the driving transistor (1) becomes non-conductive. , and the driving transistor (2) becomes non-conductive.

Therefore, the output signal applied to the load becomes an L level ground potential as shown in FIG. 4(b). Next, when the human input signal changes from L level to H level, the output of the inverter (3) changes from H level to L level. Due to a change in the level of the input signal, the driving transistor (1) switches from a non-conducting state to a conducting state, and the driving transistor (2) switches from a non-conducting state to a conducting state.
switches from a conducting state to a non-conducting state. Therefore, the output signal is switched from the ground potential to the H level power supply potential. When the human input signal changes from the H level to the L level again, the driving transistor (1) switches from a conductive state to a non-conducting state, and the driving transistor (2) switches from a non-conducting state to a conductive state, and the output The signal switches from power supply potential to ground potential. In the above case, in order to increase the load driving capability, it is necessary to lower the resistance when the driving transistors (1) and (2) are turned on. However, the inductance of the lead frame (not shown) of the package (not shown) on which the driving transistors (1) and (2) are mounted, the load capacity tc, and the driving transistor (1) or ( An RLC circuit is formed by the conduction resistance of 2) and the phase R of the load resistance (not shown), and the ringing shown in FIG. 4(b) occurs when the level of the output signal changes. This condition occurs particularly when the load driving capability of the output buffer circuit is increased, that is, when the above-mentioned R is decreased.

[Problems to be Solved by the Invention] In the conventional output buffer circuit as described above, ringing occurs in the output signal when the level of the human input signal changes, and this may lead to malfunction of elements connected externally as a load. There were some problems.

The present invention has been made to solve these problems, and an object of the present invention is to provide an output buffer circuit that prevents ringing from occurring in the output signal when the input signal changes.

SUMMARY OF THE INVENTION An object of the present invention is to provide an output buffer circuit that prevents linking when an input signal changes and increases load driving capability when the input signal is stable.

[Means for Solving the Problems] An output bannofer circuit according to the present invention is provided with a control transistor that suppresses the voltage applied to the control electrode of the drive transistor to a low level when an input signal changes, and also has a control transistor that suppresses the voltage applied to the control electrode of the drive transistor. Another control transistor is added to increase the voltage applied to the electrode when the input signal is stable.

[Function] In this invention, when the human input signal changes, the control transistor suppresses the voltage applied to the control electrode of the drive transistor, thereby increasing the conduction resistance of the drive transistor. Suppresses ringing that occurs in the output signal output from the transistor. Further, when the input signal is stable, the other control transistors increase the voltage applied to the control electrode of the drive transistor, thereby lowering the conduction resistance of the drive transistor, thereby increasing the load driving ability.

[Embodiment] FIG. 1 is a circuit diagram showing one embodiment of the present invention, and in the figure, (1) to (3) are exactly the same as those explained with respect to FIG. 3. (4) is a transistor that makes the driving transistor (1) non-conductive, such as a PMO3FET, whose source electrode is connected to the power supply, whose drain electrode is connected to the gate electrode of the driving transistor (1), and whose connected to the gate electrode or input signal source. Similarly, (5) is a transistor, such as an NMOSFET, which makes the driving transistor (2) non-conductive, and whose source electrode is grounded, whose drain electrode is connected to the gate electrode of the driving transistor (2), and whose source electrode is grounded. The gate electrode is connected to a human signal source. (6)～(8
) is a control transistor, such as a PMO3FET, that controls the gate 'I voltage applied to the drive transistor (1) to be kept low when the input signal changes, and is connected between the gate electrode of the drive transistor (1) and the ground. They are connected in series with each other, and all these gate electrodes are connected to an inverter (3
), and all of these second gate electrodes are connected to the power supply. Similarly, (9) to (11)
are control transistors, for example, 11M05FETs, which control the gate voltage applied to the drive transistor (2) to be kept low when the input signal changes, and are connected in series with each other between the power supply and the gate electrode of the drive transistor (2). connected, and all these gate electrodes are connected to the inverter (3)
, and all of these second gate electrodes are grounded. Furthermore, (12) is a control transistor such as an NMO3FET that controls the gate voltage applied to the drive transistor (1) to be high when the input signal is stable, and its drain electrode is connected to the drive transistor (1). Its source electrode is grounded, and its gate electrode is connected to the drain electrode of the driving transistor (1). Similarly, (
13) is the driving transistor (2) when the input signal is stable.
Another control transistor, such as a PMOSFET, which controls the gate voltage applied to the drive transistor (2) to be high, whose source electrode is connected to the power supply, whose drain electrode is connected to the gate electrode of the drive transistor (2), and Its gate electrode is connected to the drain of the driving transistor (2).

The output buffer circuit of the present invention is constructed as described above, and its operation will be explained in detail below. First, when the input signal is already at H level and stable, the transistor (4) is in a non-conducting state and the transistor (5) is in a conducting state. Since the output of the inverter (3) is at L level, the control transistors (6) to (8) are in a conductive state, and the control transistors (9) to (11) are in a non-conductive state. The driving transistor (1) is in a conductive state because its gate voltage is at L level.The driving transistor (2) is in a non-conducting state because its gate voltage is at an L level, so the output signal is at the power supply potential. ing. As a result, the other control transistor (12) is in a conductive state and the gate voltage of the drive transistor (1) is set to the ground potential, but the other control transistor (13)
is in a non-conducting state.

Next, when the input signal changes from the H level to the L level, the transistor (4) becomes conductive, and by setting the gate voltage of the driving transistor (1) to the power supply potential, the driving transistor (1) becomes non-conductive. Make it. Further, the transistor (5) becomes non-conductive. Inverter (3)
Since the output of the control transistor (6
) to (8) become non-conductive, but the control transistors (9) to (11) become conductive, setting the gate voltage of the driving transistor (2) to H level. This H level is not the power supply potential as it is, but the power supply potential is V. 0 and in a conductive state.
) is V7N, then Voo 3VTN
and is 3VtN lower than the power supply potential. As shown in Figure 2, the lower the gate voltage, the higher the drain current. 8 becomes smaller,
Although the control transistor (2) becomes conductive, its conduction resistance increases, and ringing that occurs in the output signal can be suppressed. When the output signal becomes L level and stabilizes (that is, the input signal passes through the period of change and becomes stable), the other control transistor (13) becomes conductive.
The gate voltage of the driving transistor (2) is increased from the above-mentioned low gate voltage to the power supply potential to reduce its conduction resistance.

As a result, the load driving ability of the driving transistor (2) can be increased as usual.

When the input signal changes from the L level to the H level again, the gate voltage of the driving transistor (1) is raised by 3VTN above the ground potential by the control transistors (6) to (8), and its conduction resistance increases. No ringing in the output signal. After that, when the other control transistor (12) becomes conductive, the drive transistor (
The gate voltage of 1) is lowered to the ground potential, the conduction resistance of the driving transistor (1) is reduced, and the load driving capability is increased.

[Effects of the Invention] As explained in detail above, the present invention provides a driving transistor that drives a load and a control transistor that suppresses the voltage applied to the control electrode of this driving transistor to a low level when an input signal changes. This prevents ringing from occurring in the output signal output from the drive transistor, thereby preventing malfunctions of elements driven by the output signal, and further reducing the voltage applied to the control electrode of the drive transistor. Since another control transistor is added which increases the voltage when the input signal is stable, the load driving capability is increased.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a voltage-current characteristic diagram of the driving transistor in Fig. 1, Fig. 3 is a circuit diagram showing a conventional output vanofer circuit, and Fig. 4 1 is a waveform diagram showing input signals and output signals of a conventional output buffer circuit. In the figure, (1) and (2> are driving transistors, (
6) to (8) and (9) to (11) are control transistors, and (12) to (13) are other control transistors. In each figure, the same reference numerals indicate the same or corresponding parts. Figure 1

Claims (2)

[Claims] (1) An output buffer circuit comprising: a driving transistor that drives a load; and a control transistor that keeps the voltage applied to the control electrode of the driving transistor low when an input signal changes. (2) The output buffer circuit according to claim 1, further comprising another control transistor that increases the voltage applied to the control electrode of the drive transistor when the input signal is stable.