JPH03259615A - Output buffer circuit - Google Patents

Output buffer circuit

Info

Publication number
JPH03259615A
JPH03259615A JP5672290A JP5672290A JPH03259615A JP H03259615 A JPH03259615 A JP H03259615A JP 5672290 A JP5672290 A JP 5672290A JP 5672290 A JP5672290 A JP 5672290A JP H03259615 A JPH03259615 A JP H03259615A
Authority
JP
Japan
Prior art keywords
potential
channel
changed
gate electrode
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5672290A
Other languages
Japanese (ja)
Inventor
Yoichi Goi
Nobuyuki Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5672290A priority Critical patent/JPH03259615A/en
Publication of JPH03259615A publication Critical patent/JPH03259615A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent a through-current and to suppress the ringing of an output signal by turning on/off slowly p-channel and n-channel transistors(TRs) by a resistive and a capacitive component when an input signal is changed from a ground potential to a power supply potential or vice versa.
CONSTITUTION: When an input signal at an input terminal 7 is changed from, e.g. a power supply potential into a ground potential, since the potential of a gate electrode of a 1st p-channel TR 1 is changed momentarily from the ground potential to the power potential, the TR 1 is momentarily turned off. On the other hand, the potential of a gate electrode of a 1st n-channel TR 2 rises with a time delay by the resistive component of a transmission gate 10 and the capacitive component of the gate electrode of the TR 2. Thus, the TR 2 starts turning on with a delay than the off point of time of the TR 1. Since the TRs 1, 2 are not simultaneously turned on at the time of switching in such a manner, no through-current flows between them.
COPYRIGHT: (C)1991,JPO&Japio
JP5672290A 1990-03-09 1990-03-09 Output buffer circuit Pending JPH03259615A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5672290A JPH03259615A (en) 1990-03-09 1990-03-09 Output buffer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5672290A JPH03259615A (en) 1990-03-09 1990-03-09 Output buffer circuit

Publications (1)

Publication Number Publication Date
JPH03259615A true JPH03259615A (en) 1991-11-19

Family

ID=13035383

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5672290A Pending JPH03259615A (en) 1990-03-09 1990-03-09 Output buffer circuit

Country Status (1)

Country Link
JP (1) JPH03259615A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6154058A (en) * 1998-04-06 2000-11-28 Nec Corporation Output buffer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6154058A (en) * 1998-04-06 2000-11-28 Nec Corporation Output buffer

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