JPH03253123A - Decoding system for error correcting code - Google Patents

Decoding system for error correcting code

Info

Publication number
JPH03253123A
JPH03253123A JP4956790A JP4956790A JPH03253123A JP H03253123 A JPH03253123 A JP H03253123A JP 4956790 A JP4956790 A JP 4956790A JP 4956790 A JP4956790 A JP 4956790A JP H03253123 A JPH03253123 A JP H03253123A
Authority
JP
Japan
Prior art keywords
decoding
operation
repeating operation
forward
bit error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4956790A
Other versions
JP2614524B2 (en
Inventor
Masayoshi Ohashi
Yutaka Yasuda
Original Assignee
Kokusai Denshin Denwa Co Ltd <Kdd>
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Denshin Denwa Co Ltd <Kdd> filed Critical Kokusai Denshin Denwa Co Ltd <Kdd>
Priority to JP2049567A priority Critical patent/JP2614524B2/en
Publication of JPH03253123A publication Critical patent/JPH03253123A/en
Application granted granted Critical
Publication of JP2614524B2 publication Critical patent/JP2614524B2/en
Anticipated expiration legal-status Critical
Application status is Expired - Fee Related legal-status Critical

Links

Abstract

PURPOSE: To efficiently execute minimum bit error decoding algorithm and to reduce the capacity of a memory by reusing a working storage area to be used for forward or backward repeating operation again in revesed repeating operation to execute decoding.
CONSTITUTION: In the case of applying the minimum bit error decoding algorithm to a linear code obtained by terminating a code word by a certain length, forward repeating operation and backward repeating operation are executed once in each by using only the storage area required for the forward repeating operation. In this case, all calculated results on the way of a decoding process are stored in a decoding operation RAM 112, and at the time of advancing decoding, data are read out from a RAM 112 and the product sum operation between the read data and a branch metric value is executed by a multiplexer 140, an adder/subtractor 141 and an accumulator 122. Thus, the bit error rate can be efficiently reduced.
COPYRIGHT: (C)1991,JPO&Japio
JP2049567A 1990-03-02 1990-03-02 The method of decoding error correction code Expired - Fee Related JP2614524B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2049567A JP2614524B2 (en) 1990-03-02 1990-03-02 The method of decoding error correction code

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2049567A JP2614524B2 (en) 1990-03-02 1990-03-02 The method of decoding error correction code

Publications (2)

Publication Number Publication Date
JPH03253123A true JPH03253123A (en) 1991-11-12
JP2614524B2 JP2614524B2 (en) 1997-05-28

Family

ID=12834785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2049567A Expired - Fee Related JP2614524B2 (en) 1990-03-02 1990-03-02 The method of decoding error correction code

Country Status (1)

Country Link
JP (1) JP2614524B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995015034A1 (en) * 1993-11-29 1995-06-01 Oki Electric Industry Co., Ltd. Device for estimating soft judgement value and device for estimating maximum likelihood system
KR100838292B1 (en) * 2007-06-20 2008-06-17 삼성전자주식회사 Apparatus for controlling read level of memory cell and method using the same
JP2009159037A (en) * 2007-12-25 2009-07-16 Sumitomo Electric Ind Ltd Receiving apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62164321A (en) * 1986-01-16 1987-07-21 Fujitsu Ltd Sequential decoder
JPH02309821A (en) * 1989-05-25 1990-12-25 Fujitsu Ltd Fano type successive decoder

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62164321A (en) * 1986-01-16 1987-07-21 Fujitsu Ltd Sequential decoder
JPH02309821A (en) * 1989-05-25 1990-12-25 Fujitsu Ltd Fano type successive decoder

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995015034A1 (en) * 1993-11-29 1995-06-01 Oki Electric Industry Co., Ltd. Device for estimating soft judgement value and device for estimating maximum likelihood system
US6302576B1 (en) 1993-11-29 2001-10-16 Oki Electric Industry Co., Ltd. Soft decision estimation unit and maximum-likelihood sequence estimation unit
KR100838292B1 (en) * 2007-06-20 2008-06-17 삼성전자주식회사 Apparatus for controlling read level of memory cell and method using the same
US7835209B2 (en) 2007-06-20 2010-11-16 Samsung Electronics Co., Ltd. Method and apparatus for controlling reading level of memory cell
JP2009159037A (en) * 2007-12-25 2009-07-16 Sumitomo Electric Ind Ltd Receiving apparatus

Also Published As

Publication number Publication date
JP2614524B2 (en) 1997-05-28

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