Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filedfiledCritical
Priority to JP1989085985UpriorityCriticalpatent/JP2501869Y2/ja
Publication of JPH0325255UpublicationCriticalpatent/JPH0325255U/ja
Application grantedgrantedCritical
Publication of JP2501869Y2publicationCriticalpatent/JP2501869Y2/ja
Panneau de cablage, dispositif semiconducteur, procede de fabrication d'un dispositif semiconducteur, carte a circuit imprime et dispositif electronique
Panneau de cablage, dispositif semiconducteur, procede de fabrication d'un dispositif semiconducteur, carte a circuit imprime et dispositif electronique