JPH03241873A - Manufacture of thin film semiconductor device - Google Patents

Abstract

PURPOSE:To form an excellent gate oxide film so as to obtain a field effect transistor or a thin film transistor excellent in transistor characteristics by a method wherein a gate insulating film is formed by a sputtering method. CONSTITUTION:An amorphous silicon thin film 1-2 is deposited on an amorphous insulating substrate 1-1, the silicon thin film 1-2 is made to grown in solid phase to form a solid-phase grown silicon thin film 1-3, which is patterned through a photolithography method into an island-shaped film 1-4. Then, a gate oxide film 1-5 is formed through a sputtering method. In the sputtering method concerned, SiO2 is used as a target, and a simplex O2 gas or a mixed gas of O2 gas and Ar gas is used as a discharge gas.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a thin film semiconductor device, and in particular,
Insulated gate field effect transistor or TFT
The present invention relates to a method for forming a gate insulating film of a thin film transistor.

[Prior art] In recent years, 5OI (Silicon On In5u)
Alternatively, as the need for three-dimensional ICs, large liquid crystal display panels, high-speed, high-resolution contact image sensors, etc. increases, technology for forming high-quality gate insulating films at low temperatures has become important. Thermal oxidation method is 900
Since it is a high temperature process of about ~1200°C, (1) elements cannot be formed on inexpensive glass substrates; (2> Lateral diffusion of impurities, (3) In three-dimensional ICs, it has an adverse effect (diffusion of impurities, etc.) on the underlying elements. (4) Poly-3i
Thermal oxide films have problems such as insufficient dielectric strength and high interface state density. Currently, techniques for forming a gate oxide film using a CVD method, a photo-CVD method, a plasma CVD method, or the like are being considered.

[Problems to be Solved by the Invention] However, oxide films formed by conventional methods have problems such as low gate dielectric breakdown voltage and high interface state density. There is a theory that excellent TPT characteristics can be obtained when poly-3i or a gate oxide film has compressive stress.

However, the oxide films formed by the various CVD methods have almost no stress, and the a-3i film is
When a TPT is fabricated using a Si film grown in solid phase at a low temperature of about 200 yen (C), forming a thermal oxide film may generate new defects or reduce the dielectric strength, which may affect the superiority of the in-phase grown Si film. You will not be able to take full advantage of the features provided.

An object of the present invention is to solve these problems and realize a field effect transistor or a thin film transistor having good transistor characteristics by forming an excellent gate oxide film.

[Means for Solving the Problems] A method for manufacturing a thin film semiconductor device of the present invention includes: (1) In a method for manufacturing an insulated gate field effect transistor formed on an insulating substrate, a gate insulating film is formed by sputtering. It is characterized by forming.

Furthermore, (2) the sputtering method uses 5i02 as a target and 02 (oxygen) gas as a discharge gas;
Alternatively, a mixed gas of 02 gas and Ar (argon) gas is used.

[Example] In FIG. 1(a), 1-1 is an amorphous insulating substrate 0
A quartz substrate, a glass substrate, or the like is used. SiO
A Si substrate covered with 2 may be used. 12 when using a quartz substrate or a Si substrate covered with 5in2
It can withstand a high temperature process of 00℃, but when using a glass substrate, the softening temperature is low, so it can withstand a high temperature process of about 600℃.
Limited to the following low temperature processes. First, an amorphous silicon thin film 1-2 is deposited on an amorphous insulating substrate 1-1. It is desirable that the amorphous silicon thin film 1-2 is uniform, does not contain minute crystallites, and does not have any nuclei for crystal growth. The deposition method is EB (Electron
Beam) evaporation method, sputtering method, CVD method, photo CV
There are D method and plasma CVD method. The plasma CVD method is
This is a method often used when producing photovoltaic elements, photodiodes, photosensitive drums, etc. To deposit amorphous silicon thin film, silane gas (SiH4)
is diluted with helium gas (H8) or hydrogen gas (H2) to an appropriate concentration, and a high frequency voltage is applied to decompose and deposit it. In the case of plasma CVD method, the substrate temperature is 500℃
A film can also be formed below. Further, if hydrogen plasma or argon plasma treatment is performed immediately before the deposition, cleaning of the substrate surface and film formation can be performed continuously. After that, 400
C. to 500.degree. C. to release hydrogen from the amorphous silicon thin film.

Next, the silicon thin film 1-2 is grown in phase. As a solid phase growth method, furnace annealing using a quartz tube is convenient. As the annealing atmosphere, nitrogen gas, hydrogen gas, argon gas, helium gas, etc. are used. lXl0-' to l
Annealing may be performed in a high vacuum atmosphere of Xl0-'° Torr. In-phase growth annealing temperature is 500℃~700℃
shall be. In such low-temperature annealing, only crystal grains having a crystal orientation with a small activation energy for crystal growth grow selectively, and moreover, they grow slowly and to a large size. Figure 1 (
In b), 1-3 indicates a silicon thin film grown in a solid phase, and 1-4 indicates a crystal grain boundary.

On the other hand, the silicon thin film 1-2 may be a poly-3i film formed by low pressure CVD, MBE, or the like.

Next, the solid-phase grown silicon thin film 1-3 is patterned by photolithography to form an island shape as shown in FIG. 1(C).

Next, as shown in FIG. 1(d), a gate oxide film 1-5 is formed by sputtering.

As a sputtering method, a magnetron method is widely used in which sputtering is performed by compressing plasma near a target. SiO2 is used as the target. As the discharge gas, 02 gas alone or a mixed gas of 02 gas and Ar gas is used. In the case of using 02 gas alone, the quality of the SiO2 film is controlled by the internal pressure in the reaction chamber and the flow rate of 02 gas. In the case of a mixed gas of O2 gas and Ar gas,
In addition to the internal pressure and flow rate, the quality of the SiO2 film is controlled by changing the mixing ratio of O2 gas and Ar gas. In this way, a dense Si film or membrane with a smooth surface can be obtained. When the partial pressure of 02 is increased, Fig. 2 (
The dielectric strength is improved as shown in a), and the dielectric strength is improved as shown in the figure (b).
As shown in , the interface state density decreases.

The substrate temperature during sputtering is several tens to hundreds of degrees Celsius.

After that, heat treatment may be performed at a low temperature of 600°C or less in an atmosphere of 02 gas, N2 gas, Ar gas, etc.
The formed gate oxide film becomes a finer film with fewer interface states by heat treatment.

Next, as shown in FIG. 1(e), the gate electrode 1-6
form. The gate electrode material may be polycrystalline silicon thin film, molybdenum silicide, metal film such as aluminum or chromium, or ITO.
A transparent conductive film such as or 5n02 can be used. Film forming methods include CVD method, sputtering method,
Although there are methods such as a vacuum evaporation method, a detailed explanation thereof will be omitted here.

Subsequently, as shown in FIG. 1(f), the gate electrode 1-
6 as a mask, impurity ions are implanted to form a source region 1-7 and a drain region 1-8 in a self-aligned manner. As the impurity, P+ or AS+ is used when manufacturing an Nch transistor, and B+ or the like is used when manufacturing a Pch transistor. In addition to ion implantation, methods for adding impurities include laser doping, plasma doping, and other methods. The arrows 1-9 represent impurity ion beams. When a quartz substrate is used as the amorphous insulating substrate 1-1, a thermal diffusion method can be used.

Impurity temperature is from 1 x 1015 to I x 1020 cm
It should be around -3.

Subsequently, as shown in FIG. 1(g), an interlayer insulating film 1-
10 are stacked. As the interlayer insulating film material, an oxide film, a nitride film, or the like is used. As long as the insulation is good, the thickness of the film can be any value, but it is usually from several thousand to several micrometers. A simple method for forming a nitride film is the LPCVD method or plasma CVD method.For the reaction, a mixed gas of ammonia gas (NH3), silane gas, and nitrogen gas, or a mixed gas of silane gas and nitrogen gas, etc. is used. use

Here, hydrogen plasma method or hydrogen ion implantation method,
Alternatively, if hydrogen ions are introduced by a method such as hydrogen diffusion from a plasma nitride film, defects such as dangling bonds existing at the gate oxide film interface are inactivated. Such a hydrogenation step may be performed before laminating the interlayer insulating film 1-9.

Next, as shown in FIG. 1(h), contact holes are formed in the interlayer insulating film and the gate insulating film, contact electrodes are formed, and the source electrode 1-11 and the drain electrode 1-
12. The source electrode and drain electrode are formed of a metal material such as aluminum. In this way, a thin film transistor is formed.

[Effects of the invention] Conventional gate insulating films were not suitable, so even if a TPT was fabricated using a good solid-phase grown Si film, sufficient dielectric strength and good characteristics could not be obtained. According to the present invention, it becomes possible to realize an extremely excellent solid-phase growth TPT.

Conventionally, the discharge gas was Ar gas alone, so the deposited S
The surface state of the iO2 film was highly dependent on the sputtering pressure, and the surface became more rough as the pressure increased. It is known that sputter damage is reduced when using 02 gas.According to the present invention, since 02 gas alone or a mixed gas of 02 gas and Ar gas is used as the discharge gas, the surface shape is very smooth and heat resistant. A dense SiO2 film comparable to that of an oxidized SiO2 film can be obtained.

The film quality of the SiO2 film can be controlled by the internal pressure during sputtering, and lowering the internal pressure results in a denser film.

By changing the mixing ratio of 02 gas and Ar gas, SiO
The composition ratio of the two films can be controlled.

5iO deposited using Ar gas alone as discharge gas
The dielectric strength voltage of the Z film is as low as approximately 2 MV/cm, whereas by mixing 02 gas as in the present invention, the dielectric strength voltage can be significantly improved, and its value is approximately 7 MV/cm.
m, which is almost the same as that of the thermally oxidized SiO2 film, and furthermore, the interface state density can be reduced.

Si deposited using a mixed gas of 02 gas and Ar gas
The specific resistance of the O2 film is comparable to that of a thermally oxidized SiO2 film, and has excellent insulation properties.

Since deposition can be performed at a substrate temperature of several tens to hundreds of degrees Celsius, a glass substrate with a low softening temperature can also be used.

Since it is possible to obtain a gate insulating film having properties close to those of thermally oxidized SiO2 films at low temperatures, it will greatly contribute to the development of SOI technology. The number of processes does not increase at all. 60
Since it can be manufactured using a low-temperature process of 0° C. or lower, it is possible to use a glass substrate that is inexpensive and has a low heat-resistant temperature. Even though an excellent silicon thin film can be obtained, the cost does not increase.

When a thin film transistor is made using the gate insulating film obtained according to the present invention and a large-grain polycrystalline silicon thin film, excellent characteristics can be obtained. Compared to the conventional art, the ON current of the thin film transistor increases and the OFF current decreases. In addition, the threshold voltage is also reduced, and transistor characteristics are greatly improved.

The imbalance in characteristics between the N channel and the P channel is also improved.

Since it is possible to fabricate thin film transistors with excellent characteristics on an amorphous insulating substrate, sufficient high-speed operation can be achieved even when applied to an active matrix substrate in which a driver circuit is integrated on the same substrate. Furthermore, it has great effects on reducing power supply voltage, reducing current consumption, and improving reliability.

In addition, since it is possible to manufacture by a low-temperature process at 600° C. or lower, this is highly effective in reducing the cost and increasing the area of active matrix substrates.

When the present invention is applied to a contact image sensor in which a photoelectric conversion element and its scanning circuit are integrated on the same chip, it is possible to increase the reading speed, increase the resolution, and increase the gradation. Once high resolution is achieved, which produces this effect, it will be easier to apply it to contact type image sensors for color reading. Of course, this has great effects in reducing power supply voltage, reducing current consumption, and improving reliability.

Also, since it can be produced by a low-temperature process,
Close-contact image sensor chip can be made longer,
- A reading device for large facsimile machines such as A4 size or A3 size can be realized using a book chip. Therefore, it is possible to avoid the troublesome and unreliable technique of joining two sensor chips, and the mounting yield is also improved.

In addition, it can also be applied to high-definition liquid crystal televisions or thermal heads with drive circuits integrated on the same substrate.

In addition to quartz and glass substrates, sapphire substrates (
A 1203) or M g O-A 1203゜B
Crystalline insulating substrates such as P + Ca F 2 can also be used.

Although the example has been described using the solid phase growth method as an example, the pol
Needless to say, the present invention can be similarly applied to the case where a y-8i film is used.

Although the above embodiments have been explained using thin film transistors as an example, the present invention can also be applied to elements using thin films such as ordinary MOS transistors, bipolar transistors, and heterojunction bipolar transistors. Further, the present invention can also be applied to elements using SOI technology, such as three-dimensional devices.

[Brief explanation of drawings]

FIGS. 1(a) to 1(h) are process cross-sectional views showing an embodiment of the present invention. FIG. 2(a) is a diagram showing the dependence of the dielectric strength voltage of the sputtered gate oxide film on the 02 partial voltage. FIG. 2(b) is a diagram showing the dependence of the interface state density on the 02 partial pressure. 1-3; Silicon thin film 1-5; Gate oxide film

Claims (2)

[Claims] (1) A method for manufacturing a thin film semiconductor device, which comprises forming a gate insulating film by a sputtering method in a method for manufacturing an insulated gate field effect transistor formed on an insulating substrate. (2) The sputtering method uses SiO_2 as a target.
using O_2 (oxygen) gas or O as the discharge gas.
2. The method for manufacturing a thin film semiconductor device according to claim 1, wherein a mixed gas of _2 gas and Ar (argon) gas is used.