JPH03237510A - Constant current circuit - Google Patents

Constant current circuit

Info

Publication number
JPH03237510A
JPH03237510A JP3325190A JP3325190A JPH03237510A JP H03237510 A JPH03237510 A JP H03237510A JP 3325190 A JP3325190 A JP 3325190A JP 3325190 A JP3325190 A JP 3325190A JP H03237510 A JPH03237510 A JP H03237510A
Authority
JP
Japan
Prior art keywords
circuit
trs
turned
waiting state
current mirror
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3325190A
Other languages
Japanese (ja)
Inventor
Yasushi Mizushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP3325190A priority Critical patent/JPH03237510A/en
Publication of JPH03237510A publication Critical patent/JPH03237510A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce the power consumption in the waiting state by constituting a circuit so that the supply current to current mirror circuits is zero in the waiting state.
CONSTITUTION: When an input signal (a) in the high level is inputted to a switching transistor TR Tr30, the TR Tr30 is made active. Then, a current mirror circuit 10 is made conductive, and TRs Tr11 and Tr12 are turned on. TRs Tr21 and Tr22 of a current mirror circuit 20 are turned on simultaneously, and an output current (b) having a magnitude I0 is outputted from the collector of the TR Tr21. When the signal (a) is changed to the low level, the TR Tr20 is made non-active. Then, the circuit 10 is made non-conductive, and TRs Tr11 and TR12 are turned off. TRs Tr21 and Tr22 of the circuit 20 are turned off simultaneously, and the magnitude of an output current (b) of the TR Tr21 is 0. Consequently, the power consumption in the waiting state can be made zero.
COPYRIGHT: (C)1991,JPO&Japio
JP3325190A 1990-02-14 1990-02-14 Constant current circuit Pending JPH03237510A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3325190A JPH03237510A (en) 1990-02-14 1990-02-14 Constant current circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3325190A JPH03237510A (en) 1990-02-14 1990-02-14 Constant current circuit

Publications (1)

Publication Number Publication Date
JPH03237510A true JPH03237510A (en) 1991-10-23

Family

ID=12381278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3325190A Pending JPH03237510A (en) 1990-02-14 1990-02-14 Constant current circuit

Country Status (1)

Country Link
JP (1) JPH03237510A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008103943A (en) * 2006-10-18 2008-05-01 Renesas Technology Corp Semiconductor integrated circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008103943A (en) * 2006-10-18 2008-05-01 Renesas Technology Corp Semiconductor integrated circuit device

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