JPH03235425A - Digital-analog converter - Google Patents

Abstract

PURPOSE:To reduce the current of a current switch while keeping conversion precision, and to realize the low power consumption of a D/A converter by making a low order bit having a margin in the conversion precision into current weighting. CONSTITUTION:A resistance value in the case an R-2R ladder circuit is seen from a switch S side is 2R/3, and the voltage Vcc-4I.2R/3 of an output terminal OUT at the time when an MSB switch S7 is closed is made to be 1/2 of a full scale, and thus, the voltage Vcc-2I.2R/3 of the output terminal OUT at the time when the next switch S6 is closed becomes 1/4 of the full scale, and the voltage of the output terminal OUT at the time when the switch S5, S4... of an R-2R ladder resistance part is closed becomes 1/8, 1/16... of the full scale. The current weighting reduces a wasteful current, and ineffective power consumption is reduced.

Description

[Detailed Description of the Invention] [Summary of the Invention] Regarding a digital-to-analog converter using an R-2R ladder resistor, a current weighting, R-2R ladder that can reduce current loss and maintain conversion accuracy is provided. Resistance type D/A
In an n-bit digital-to-analog converter, among the n bits, the upper m bits and the lower ! Bits with current weighting and intermediate (n-m-1) [Industrial Application] The present invention relates to digital-to-analog converters using R-2R ladder resistors.

Digital-analog (D
/A) converters are widely used, and a D/A converter with current weighting, which is a modification of this converter, is also used. In detail, the present invention focuses on the D/
This relates to the A converter.

[Conventional technology]

Conventional current weighting, D/2 using R-2R ladder resistors
Figure 3 shows an outline of the A converter.

In this figure, R is a resistor, 2R is a resistor with twice the resistance value, CS, . . . ~C3e are current switches that turn on and off at each digit l and 0 of the digital value, and C30 is the LSB side, CS
-t is the MSB side. I is a constant current source with current value I, VC
C is the power supply or other voltage, and OUT is the output terminal or output voltage of the circuit.

In this circuit, the resistance of the circuit looking at VCC from C3n-t to C30 is all 2/3R, and R is set so that a voltage of 1/2 of the full scale appears when the MSB current switch is on.
, I. When 23B, 33B, etc. are turned on, 1/4, 1/8 of the full scale. A voltage of .

[Problem to be solved by the invention]

When the resistance and full-scale voltage of the R-2R ladder resistor are fixed, the current consumption of the current switch group can be reduced by increasing the number of current weighting bits.

However, when the number of current weighting bits is increased, the current ratio increases. For example, if 4Bit is used as current weighting,
161, 81, 41, 21. A current source of I is required and 1
．． It is generally known that it is not easy to accurately create such a ratio of 16:8:4:2:1.

The present invention improves this point and provides current weighting, which can reduce current consumption and maintain conversion accuracy.
The object of the present invention is to provide an R-2R ladder resistance type D/A converter.

[Means to solve the problem]

As shown in FIG. 1, in the present invention, the lower bits are also current-weighted. Therefore, the upper m bits and lower l bits of an n-bit D/A converter are current weighted, and the intermediate (n-
Only the m-1, ) bits are the weighting of the R-2R ladder resistance.

The current weighting of the upper m bits is such that the current of the constant current source is 2.
'''I, 2fi-'I, ...2'I, and the current weighting of the lower two bits is such that the current of the constant current source is I/
2. ...I/2il, I/2''.The R-2R ladder resistance weighting of the intermediate (nm-1) bits is the current of the constant current source of the part.

[Effect]

In this D/A converter, the lower l bits are also current-weighted, so the resistors R and 2R are in the middle n-m-! The current of the constant current source for the lower bits is I/2.・・・・・・1/2'-',
Since only I/2'' is sufficient, current consumption can be reduced.

As a constant current source, the current is I/2. ...I/2'
-'1/2' values must also be created, but the error in the lower bits has less influence on the overall error than the error in the upper bits. Therefore, even if the lower bits are current-weighted, there is little risk of deterioration in conversion accuracy.

〔Example〕

Figure 2 shows an 8-bit D with current weighting on the upper/lower 2 bits and R-2R ladder resistance weighting on the middle 4 bits.
/A converter is shown. As mentioned above, the resistance value when looking at the R-2R ladder circuit from the switch S side is 2R/3,
The voltage Vcc41·2R/3 at the output terminal OUT when the MSB switch S-'1 is closed is set to 1/2 of the full scale, so that the voltage at the output terminal OUT when the next switch S-'1 is closed is set to 1/2 of the full scale. Voltage ■. , -2I・2R/3 is 1/4 of the full scale, and the voltage at the output terminal OUT when the switch S S+ S4+ of the R-2R ladder resistor section is closed is 1/4 of the full scale. /8.1/16.・・・
. . . is the same as in Fig. 3.

When the switches S, , S, on the lower bit side are closed, the voltage at the output terminal OUT becomes 1/2', 1/28 of the full scale. This means that when switch S2 is closed, 21/3. A current of I/3 flows through the left R, a current of I/6, half of that, flows through the left R, and a current of I/12, half of that, flows through the left R, and this I/12 flows into S. ,
The current flows to R directly above S, causing a voltage drop of -R1/12, which is 1/26 of the full scale, but when switch SI is closed, the current is I/2, so it flows to R directly above S. The resulting voltage drop is S! At half of that time, -RI/24, the voltage drop when switch S0 is closed is -
This is obvious if you consider that it will be R1/4B.

In the R-2R ladder resistor section, the only effective current is the current flowing to R directly above the MSB (this becomes the DAC output).
The currents flowing through the other R and 2H can be considered as wasteful currents that do not directly contribute to the output. Therefore, multi-bit DAC
If it is configured with only an R-2R ladder, the wasted current will be large and the reactive power consumption will be large. This point current weighting reduces wasted current and reduces reactive power consumption.

Changing the current ratio makes it difficult to maintain ratio accuracy between current switches, but compared to the most significant bit St, 41, the least significant bits S, I/4 can be set to 1/2' (others are also similar). ), so there is a margin for accuracy! The D/A converter of the present invention in which bits are weighted with power supply has a resistor R,2
In addition to being able to reduce the size of R, it is also possible to maintain a higher conversion accuracy of 1 than in the system in which the upper m+42 bits are current-weighted by moving it to a higher level. Furthermore, it is possible to reduce power consumption.

The current weighting of the lower bit is based on the constant current source 1/4 of the lowest bit, switch S, and the next lowest bit S, , I/2 is 2 of this (S, , I/4). The next bit after the least significant bit can be connected in parallel (hereinafter referred to as this). The current weighting of the upper bits also follows this. Note that the current weighting of the upper bits can also be weighted by a decoder method.

[Effects of the Invention] As explained above, according to the present invention, the current of the current switch can be reduced while maintaining the conversion accuracy by applying current weighting to the lower bits that have margin for conversion accuracy.
It is possible to reduce the power consumption of the D/A converter. Furthermore, since the R-2R ladder resistor can be eliminated by changing to current weighting, it also contributes to reducing the chip area.

[Brief explanation of drawings]

FIG. 1 is a principle diagram of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is an explanatory diagram of a conventional example. In FIG. 1, R and 2R are resistors, and CS o to CS are current switch sections.

Claims (1)

[Claims] 1. In an n-bit digital-to-analog converter, among the n bits, the upper m bits and the lower l bits are current-weighted, and the middle (n-m-l) bits are R-weighted.
A digital-to-analog converter comprising a 2R ladder resistor.