JPH03231542A - Interference wave detection circuit - Google Patents
Interference wave detection circuitInfo
- Publication number
- JPH03231542A JPH03231542A JP2026179A JP2617990A JPH03231542A JP H03231542 A JPH03231542 A JP H03231542A JP 2026179 A JP2026179 A JP 2026179A JP 2617990 A JP2617990 A JP 2617990A JP H03231542 A JPH03231542 A JP H03231542A
- Authority
- JP
- Japan
- Prior art keywords
- interference wave
- frequency
- cpu
- output
- multiplexer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
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- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Monitoring And Testing Of Transmission In General (AREA)
- Noise Elimination (AREA)
Abstract
Description
【発明の詳細な説明】
（発明の技術分野）
本発明は、ディジタル衛星通信システムにおいて、通信
帯域内に干渉波として混入してくる無変調波、狭帯域Ｆ
Ｍ波あるいはこれらの掃引波を検出する干渉波検出装置
に関するものである。Detailed Description of the Invention (Technical Field of the Invention) The present invention is directed to a digital satellite communication system that uses unmodulated waves and narrowband F waves that enter the communication band as interference waves.
The present invention relates to an interference wave detection device that detects M waves or these swept waves.
（従来技術とその問題点）
衛星通信システムの発展にともない、同一の衛星にアク
セスする地球局数も増加してきており、地球局装置の不
具合や誤操作等によって無変調波や狭帯域ＦＭ波、ある
いはその掃引波が不要波として発射される事態か生じる
ことかある。ディジタル衛星通信で導入されている時分
割多元接続方式（ＴＤＭＡシステム）の場合には、自局
に割り当てられたある一定時間帯内に同一の搬送波周波
数を用いてバースト状のＴＤＭＡ信号を送信するため、
各局の送信バーストか衛星上で衝突しないように各局か
らのバースト送出タイミングを高精度で制御するバース
ト同期を確立するため、ＴＤＭＡフレーム毎に同期バー
ストが挿入されている。(Prior art and its problems) With the development of satellite communication systems, the number of earth stations accessing the same satellite has also increased, and due to malfunctions or incorrect operations of earth station equipment, unmodulated waves, narrowband FM waves, or There may be a situation where the swept wave is emitted as an unnecessary wave. In the case of the time division multiple access system (TDMA system) introduced in digital satellite communications, burst TDMA signals are transmitted using the same carrier frequency within a certain time period allocated to the local station. ,
A synchronization burst is inserted into each TDMA frame in order to establish burst synchronization that controls the timing of burst transmission from each station with high precision so that the transmission bursts of each station do not collide on the satellite.
基準局から送出される同期バースト（基準バースト）は
ＴＤＭＡシステムの同期維持だけでなく、システム制御
にも使用されている。このような通信システムに干渉波
か混入すると、信号品質の劣化だけでなくバースト同期
の維持や基準バーストによるシステム制御ができなくな
り通信不能となる場合がある。Synchronization bursts (reference bursts) sent from the reference station are used not only to maintain synchronization in the TDMA system but also for system control. If interference waves enter such a communication system, not only will the signal quality deteriorate, but it may also become impossible to maintain burst synchronization or control the system using reference bursts, making communication impossible.
入力信号帯域に混入してきた干渉波検出法として、位相
同期回路を用いて狭帯域干渉波に同期させた時の電圧制
御発振器の出力周波数から干渉波周波数を求める方式、
あるいは久方信号帯域を中心周波数の異なる多数の狭帯
域フィルタで構成したフィルタ・マルチプレクサで帯域
分割し、分割された帯域内の信号成分を検波してディジ
タル値に変換してＣＰＵで演算処理を行って干渉波周波
数を推定する方法等がある。位相同期回路を用いた干渉
波検出回路は、回路構成が簡単で無変調波や受信４号帯
域内を連続して掃引している干渉波を検出・追尾するこ
とは容易であるが、入力信号に混入した干渉波が不連続
な場合や断続している場合には位相同期回路の同期維持
を図ることができない。また、干渉波レベルか小さ（な
ると位相同期回路の同期状態が不安定になり干渉波の有
無を判定することか困難になる欠点があった。一方、フ
ィルタ・マルチプレクサ方式は不連続あるいは断続した
干渉波でも検出可能であるか、信号電力より低電力の干
渉波を検出する場合には所望の伝送帯域内を多数の狭帯
域フィルタを用いて分割して検出感度を高めたフィルタ
・マルチプレクと該マルチプレクサの検波出力をディジ
タル値に変換する多数のＡ／Ｄ変換器と高速動作のＣＰ
Ｕが必要である。そのため、干渉波検出回路の装置規模
か大きくなると共に装置価格か高くなる欠点があった。As a method for detecting interference waves that have mixed into the input signal band, there is a method of determining the interference wave frequency from the output frequency of a voltage controlled oscillator when synchronized to narrowband interference waves using a phase synchronization circuit.
Alternatively, the Kugata signal band is divided into bands using a filter multiplexer composed of many narrowband filters with different center frequencies, and the signal components within the divided bands are detected and converted into digital values, which are then processed by the CPU. There are methods for estimating the interference wave frequency. An interference wave detection circuit using a phase-locked circuit has a simple circuit configuration and can easily detect and track unmodulated waves and interference waves that are continuously sweeping within the reception band No. 4. If the interference waves mixed in are discontinuous or intermittent, it is impossible to maintain the synchronization of the phase locked circuit. Another disadvantage is that if the interference wave level is small (if the level of interference is small, the synchronization state of the phase-locked circuit becomes unstable, making it difficult to determine the presence or absence of interference waves.On the other hand, the filter/multiplexer method has the disadvantage that the interference wave is discontinuous or intermittent. When detecting interference waves with lower power than the signal power, filter multiplexing is used to increase detection sensitivity by dividing the desired transmission band using a number of narrowband filters. Numerous A/D converters and high-speed operating CP convert the multiplexer detection output into digital values
U is required. Therefore, there is a drawback that the scale of the interference wave detection circuit becomes large and the cost of the device also increases.
（発明の目的）
本発明は、それぞれ位相同期回路とフィルタ・マルチプ
レクサの機能を組み合わせることでこれらの問題点を解
決し、比較的簡単な構成で干渉波周波数を推定できるマ
ルチプレクサ掃引方式による干渉波検出回路を提供する
ものである。(Objective of the Invention) The present invention solves these problems by combining the functions of a phase-locked circuit and a filter multiplexer, and detects interference waves using a multiplexer sweep method that can estimate interference wave frequencies with a relatively simple configuration. It provides a circuit.
（発明の構成）
この目的を達成するために、本発明による干渉波検出回
路は次のように構成されている。(Configuration of the Invention) In order to achieve this object, the interference wave detection circuit according to the present invention is configured as follows.
干渉波検出回路を、電圧制御発振器を局部発振器とする
周波数変換器と、該周波数変換器の出力周波数波帯域内
に中心周波数を設定した複数の狭帯域通過フィルタを用
いたマルチプレクサと、該マルチプレクサの出力を検波
してディジタル電圧値に変換する回路と、検波したディ
ジタル電圧値を演算処理するＣＰＵと、ＣＰＵ出力で前
記電圧制御発振器の発振周波数を制御するためのＤ／Ａ
変換器とで構成し、
ＣＰＵからの制御信号によって該電圧制御発振器の発振
周波数を掃引し、周波数変換された所望の入力信号帯域
成分を該マルチプレクサに加え、その出力を検波してデ
ィジタル電圧値に変換してＣＰＵに加える手段を備え、
ディジタル変調信号とこれに混入した狭帯域干渉波の電
力密度か大幅に異なっていることに着目してＣＰＵで演
算処理することによって干渉波の有無と干渉波周波数お
よび干渉波周波数の変化方向を判定して追尾し、干渉波
周波数と等しい該電圧制御発振器の発振周波数が得られ
るようにしたことを特徴とする干渉波検出回路を提供可
能にしている。The interference wave detection circuit includes a frequency converter using a voltage controlled oscillator as a local oscillator, a multiplexer using a plurality of narrow band pass filters whose center frequency is set within the output frequency wave band of the frequency converter, and the multiplexer. A circuit that detects the output and converts it into a digital voltage value, a CPU that processes the detected digital voltage value, and a D/A that controls the oscillation frequency of the voltage controlled oscillator using the CPU output.
The oscillation frequency of the voltage controlled oscillator is swept by a control signal from the CPU, the frequency-converted desired input signal band component is applied to the multiplexer, and the output is detected and converted into a digital voltage value. It is equipped with means for converting and applying it to the CPU, and by focusing on the fact that the power density of the digital modulation signal and the narrowband interference wave mixed therein is significantly different, the CPU performs arithmetic processing to determine the presence or absence of interference waves and the interference waves. It is possible to provide an interference wave detection circuit characterized in that the frequency and the direction of change of the interference wave frequency are determined and tracked to obtain an oscillation frequency of the voltage controlled oscillator that is equal to the interference wave frequency.
また、前述した複数の帯域通過フィルタを用いたマルチ
プレクサの通過帯域幅に検出速度は比例するか追尾精度
は反比例関係になることから、通過帯域幅の広いマルチ
プレクサを用いて検出精度の速い干渉波検出回路を構成
し、一方、干渉波追尾回路には追尾か高精度で行えるよ
うに比較的狭い帯域幅のマルチプレクサを用いることに
よって、干渉波の検出を迅速に行って高精度で干渉波周
波数に追尾した該電圧制御発振器の８力周波数を出力さ
せることも出来る。In addition, since the detection speed is proportional to the passband width of the multiplexer using multiple bandpass filters mentioned above, or the tracking accuracy is inversely proportional to the passband width, it is possible to detect interference waves with high detection accuracy using a multiplexer with a wide passband width. On the other hand, the interference wave tracking circuit uses a multiplexer with a relatively narrow bandwidth so that tracking can be performed with high precision, so that interference waves can be detected quickly and tracked at the interference wave frequency with high precision. It is also possible to output the 8-power frequency of the voltage controlled oscillator.
以下図面により本発明の詳細な説明する。The present invention will be explained in detail below with reference to the drawings.
本発明による干渉波検出回路を用いた干渉波除去回路の
第一の実施例を図１に示す。入力端子１に加えられたＩ
Ｆ帯倍信号、ハイブリッド２て分岐され、それぞれ第１
線路３、第２線路４に加えられる。第１線路３のＩＦ帯
倍信号干渉波検出回路１６に加えられて、干渉波の有無
と干渉波周波数の検出に用いられ、第２線路のＩＦ帯倍
信号ハイブリッド５で分岐され一方は干渉波除去回路７
に加えられ、他方はＩＦＦ路６に加えられる。干渉波か
検出されると干渉波周波数の存在する信号周波数帯域を
帯域阻止フィルタ（ＢＥＦ）９で除去する。また、ＩＦ
Ｆ路６は、干渉波を含まない通常状態におけるＩＦ帯倍
信号バイパス伝送路であり、スイッチ１４を経て出力端
子１５に接続される。A first embodiment of an interference wave removal circuit using an interference wave detection circuit according to the present invention is shown in FIG. I applied to input terminal 1
The F-band doubled signal is branched by hybrid 2, and the first
It is added to the line 3 and the second line 4. It is added to the IF band double signal interference wave detection circuit 16 on the first line 3, and is used to detect the presence or absence of interference waves and the interference wave frequency, and is branched at the IF band double signal hybrid 5 on the second line. Removal circuit 7
and the other to IFF path 6. When an interference wave is detected, a band rejection filter (BEF) 9 removes the signal frequency band in which the interference wave frequency exists. Also, if
The F path 6 is an IF band doubled signal bypass transmission path in a normal state without interference waves, and is connected to the output terminal 15 via the switch 14.
干渉波除去回路７は、第１の乗算器（ＭＩＸ）８、狭帯
域干渉波除去用の帯域阻止フィルタ（ＢＥＦ）９、第２
のＭＩＸＩ １、局部発振器信号を分岐して該第１と第
２のＭＩＸへ加えるためのハイブリッド１３および周波
数変換によって生じるイメージ周波数成分を除去して所
望の信号帯域成分のみを通過させる帯域通過フィルタ（
ＢＰＦ）１０．１２とて構成されている。干渉波除去回
路７は、該第１と該第２の局部発振器として用いられる
電圧制御発振器（ＶＣＯ）２２の周波数を変化させるこ
とによって周波数可変形の狭帯域阻止フィルタとして機
能する。本装置の入力端子１に加えられたＩＦ帯倍信号
干渉波が混入すると干渉波検出回路１６によって干渉波
か検出され、検出した干渉波の中心周波数を求めてＶＣ
Ｏ制胛信号とスイッチ切替信号を出力する。従って、該
干渉波除去回路７に加えられたＩＦ帯倍信号、信号成分
を含めた干渉波の存在する周波数帯域が帯域阻止フィル
タ９で除去される。また、干渉波を検出すると干渉波検
出回路７はスイッチ１４を切替えて干渉帯域を除去した
ＩＦ帯倍信号出力端子１５に出力する。The interference wave removal circuit 7 includes a first multiplier (MIX) 8, a band rejection filter (BEF) 9 for removing narrowband interference waves, and a second multiplier (MIX) 8.
MIXI 1, a hybrid 13 for branching the local oscillator signal and adding it to the first and second MIXes, and a bandpass filter (for removing image frequency components generated by frequency conversion and passing only desired signal band components).
BPF) 10.12. The interference wave removal circuit 7 functions as a frequency variable narrow band rejection filter by changing the frequency of the voltage controlled oscillator (VCO) 22 used as the first and second local oscillators. When the IF band doubled signal interference wave applied to the input terminal 1 of this device mixes, the interference wave is detected by the interference wave detection circuit 16, and the center frequency of the detected interference wave is determined and the VC
Outputs an O control signal and a switch changeover signal. Therefore, the frequency band in which interference waves exist, including the IF band doubled signal and signal components added to the interference wave removal circuit 7, is removed by the band rejection filter 9. Further, when an interference wave is detected, the interference wave detection circuit 7 switches the switch 14 and outputs the signal to the IF band doubled signal output terminal 15 from which the interference band has been removed.
本実施例における干渉波検出回路１６は、第３のＭＩＸ
１７、中心周波数の異なる２組の狭帯域ＢＰＦを用いた
マルチプレクサ１８、該マルチプレクサ１８で分割した
帯域毎の出力を検波してディジタル電圧値に変換するＡ
／Ｄ変換器１９．２０、これらのディジタル値を演算処
理するＣＰＵ２４、ＣＰＵ出力てＶＣＯ２２の発振周波
数を制御するためのＤ／Ａ変換器２１、ＶＣＯ２２およ
びＶＣＯ出力を分岐するハイブリッド２３とて構成され
ている。The interference wave detection circuit 16 in this embodiment is a third MIX
17. Multiplexer 18 using two sets of narrowband BPFs with different center frequencies; A that detects the output of each band divided by the multiplexer 18 and converts it into a digital voltage value;
/D converters 19 and 20, a CPU 24 that processes these digital values, a D/A converter 21 that uses the CPU output to control the oscillation frequency of the VCO 22, a VCO 22, and a hybrid 23 that branches the VCO output. ing.
干渉波検出回路１６に加えられたＩＦ帯倍信号、ＶＣＯ
２２とＭ Ｉ Ｘ ｌ ７テフルチプレクサ１８の動作
周波数帯に変換された後、マルチプレクサ１８に加えら
れ帯域分割される。マルチプレクサ１８を構成している
２組の狭帯域ＢＰＦの出力端子にはそれぞれ検波器とＡ
／Ｄ変換器が接続されており、各分割帯域のアナログ検
波電圧をＡ／Ｄ変換したディジタル電圧値がＣＰＵ２４
のメモリに取り込まれる。ＣＰＵ２４はＶＣＯ２２を掃
引し所望の信号帯域における干渉波の存在しない場合の
検波電圧値を基準にしである定められたアルゴリズムに
従ってディジタル演算処理を行い、掃引帯域毎に干渉波
の有無を判定する。この様なディジタル演算処理により
、ある周波数帯域に干渉波が存在すると判定された場合
には、ＶＣＯ２２の掃引を停止してマルチプレクサ１８
の複数出力レベルの大小関係を比較して干渉波を追尾す
る。IF band doubled signal added to the interference wave detection circuit 16, VCO
22 and M I The output terminals of the two narrowband BPFs constituting the multiplexer 18 are connected to a detector and
/D converter is connected, and the digital voltage value obtained by A/D converting the analog detection voltage of each divided band is sent to the CPU 24.
is loaded into memory. The CPU 24 sweeps the VCO 22 and performs digital arithmetic processing according to a predetermined algorithm based on the detected voltage value when no interference wave exists in a desired signal band, and determines the presence or absence of an interference wave for each sweep band. If it is determined through such digital calculation processing that there is an interference wave in a certain frequency band, the sweep of the VCO 22 is stopped and the multiplexer 18
The interference waves are tracked by comparing the magnitude relationship of multiple output levels.
該マルチプレクサ１８を２組の狭帯域フィルタを用いて
構成した干渉波検出回路の検出・追尾動作について以下
詳細に説明する。The detection and tracking operations of the interference wave detection circuit in which the multiplexer 18 is constructed using two sets of narrowband filters will be described in detail below.
第２図は中心周波数かｆｌとｆ２の狭帯域通過フィルタ
ＢＰＦ−１とＢＰＦ−２を通過損失３ｄＢの点て交叉す
るように配置した構成のマルチプレクサを用い、干渉波
を含む信号成分を検波した場合の周波数対検波レベル関
係を示している。ここで、信号帯域に比較してＢＰＦ−
１とＢＰＦ−２の通過帯域幅を十分狭くすると、電力密
度の異なる信号成分の検波レベルＰＳと干渉波が存在す
る場合の検波レベルＰｌまたはＰ２との差異が大きくな
り干渉波を高感度で検出することが可能になる。従って
、ＶＣＯを掃引して前記乗算器１７で周波数変換された
信号帯域内における該マルチプレクサ１８の検波レベル
を干渉波が存在していない時の検波レベルと比較するか
、または信号成分の検波レベル以上の点に閾値を設定し
ておくことにより干渉波の有無を判定し、ｖＣＯの掃引
周波数から干渉波周波数を推定することができる。Figure 2 shows a multiplexer with a configuration in which narrow band pass filters BPF-1 and BPF-2 with center frequencies fl and f2 are arranged so as to intersect at a point with a passing loss of 3 dB, and a signal component including interference waves is detected. The relationship between frequency and detection level is shown in the figure. Here, BPF-
If the passband widths of 1 and BPF-2 are sufficiently narrowed, the difference between the detection level PS of signal components with different power densities and the detection level Pl or P2 when interference waves are present becomes large, allowing interference waves to be detected with high sensitivity. It becomes possible to do so. Therefore, the detection level of the multiplexer 18 within the signal band frequency-converted by the multiplier 17 by sweeping the VCO is compared with the detection level when no interference wave exists, or is higher than the detection level of the signal component. By setting a threshold at the point, it is possible to determine the presence or absence of an interference wave, and estimate the interference wave frequency from the vCO sweep frequency.
更に、干渉波周波数が変化している場合の追尾に関して
は、第２図に示すようにＢＰＦ−１とＢＰＦ−２の検波
レベルの大小関係を比較することによって干渉波周波数
の変化方向を判定することができる。なお、２組以上の
ＢＰＦを用いてマルチプレクサを構成することによって
、干渉波周波数の推定精度の向上を図ることも可能であ
る。Furthermore, regarding tracking when the interference wave frequency is changing, the direction of change in the interference wave frequency is determined by comparing the magnitude relationship between the detection levels of BPF-1 and BPF-2 as shown in Figure 2. be able to. Note that it is also possible to improve the estimation accuracy of the interference wave frequency by configuring a multiplexer using two or more sets of BPFs.
本発明による第２の実施例を第３図に示す。前記第１の
実施例の干渉波検出回路１６のフィルタ・マルチプレク
サ１８を掃引して干渉波を検出しこれに追尾する場合、
該マルチプレクサの通過帯域幅が狭い方が干渉波検出感
度は向上するが、信号帯域内を掃引する速度が制約を受
ける。一方、該マルチプレクサ１８の通過帯域幅を広く
すると掃引速度を早くできるが、検出感度が低下するだ
けでなく干渉波周波数の推定精度も低下する問題がある
。これらの問題解決のため、本実施例では干渉波検出回
路をそれぞれ検出機能と追尾機能を有する回路で構成に
することによって解決を図っている。すなわち、本実施
例では干渉波検出回路への入力信号を２分岐し、双方に
第１の実施例の干渉波検出回路１６と同様な構成の回路
を接続して追尾回路１６ａと検出回路２６として動作さ
せ、それぞれ追尾回路１６ａと検出回路２６に用いるマ
ルチプレクサの通過帯域幅を異ならせ、帯域幅の広いＢ
ＰＦを用いたマルチプレクサで干渉波の検出を行い、帯
域幅の狭いＢＰＦを用いたマルチプレクサで干渉波を追
尾するようにすることで干渉波検出の迅速化と高精度な
干渉波周波数の追尾を可能にしている。A second embodiment according to the invention is shown in FIG. When detecting and tracking interference waves by sweeping the filter multiplexer 18 of the interference wave detection circuit 16 of the first embodiment,
The narrower the passband width of the multiplexer, the better the interference wave detection sensitivity, but the speed at which the signal band can be swept is restricted. On the other hand, if the passband width of the multiplexer 18 is widened, the sweep speed can be increased, but there is a problem that not only the detection sensitivity decreases but also the estimation accuracy of the interference wave frequency decreases. In order to solve these problems, in this embodiment, the interference wave detection circuit is configured with circuits each having a detection function and a tracking function. That is, in this embodiment, the input signal to the interference wave detection circuit is branched into two, and circuits having the same configuration as the interference wave detection circuit 16 of the first embodiment are connected to both of them to form the tracking circuit 16a and the detection circuit 26. The passband widths of the multiplexers used for the tracking circuit 16a and the detection circuit 26 are made different, and B, which has a wide bandwidth, is
By detecting interference waves with a multiplexer using a PF and tracking the interference waves with a multiplexer using a BPF with a narrow bandwidth, it is possible to speed up interference wave detection and track the interference wave frequency with high precision. I have to.
以下図面を用いて第２の実施例の構成とその動作を説明
する。The configuration and operation of the second embodiment will be described below with reference to the drawings.
本実施例における検出回路は、ＭＩＸ２７、複数の狭帯
域ＢＰＦを用いたマルチプレクサ２８、該マルチプレク
サ２８で分割した各帯域の出力を検波してディジタル電
圧値に変換するＡ／Ｄ変換器２９．３０、これらのディ
ジタル値を演算処理するＣＰＵ２４．ＣＰＵ２４の出力
でＶＣＯ３２の発振周波数を制御するためのＤ／Ａ変換
器３１、ＶＣＯ３２とで構成されている。The detection circuit in this embodiment includes a MIX 27, a multiplexer 28 using a plurality of narrowband BPFs, an A/D converter 29, 30 that detects the output of each band divided by the multiplexer 28, and converts it into a digital voltage value. A CPU 24 that processes these digital values. It is composed of a D/A converter 31 and a VCO 32 for controlling the oscillation frequency of the VCO 32 with the output of the CPU 24.
入力信号端子ｌに加えられたＩＦ帯倍信号、ノ１イブリ
ッド２．５によって分岐され、干渉波除去回路７．１Ｆ
線路６および干渉波検出回路に加えられる。干渉波検出
回路へ加えられたＩＦ帯倍信号、ハイブリッド２５で分
岐され、干渉波の検出回路２６と追尾回路１６ａに加え
られる。検出回路２６に加えられたＩＦ帯倍信号、ＶＣ
Ｏ３２とＭＩＸ２７でマルチプレクサ２８の動作周波数
帯に変換された後マルチプレクサ２８に加えられる。The IF band doubled signal applied to the input signal terminal 1 is branched by No. 1 hybrid 2.5 and sent to the interference wave removal circuit 7.1F.
It is added to the line 6 and the interference wave detection circuit. The IF band doubled signal applied to the interference wave detection circuit is branched by the hybrid 25 and applied to the interference wave detection circuit 26 and the tracking circuit 16a. IF band doubled signal applied to the detection circuit 26, VC
The signal is converted into the operating frequency band of the multiplexer 28 by the O32 and the MIX 27, and then added to the multiplexer 28.
該マルチプレクサ２８の出力のアナログ検波電圧をＡ／
Ｄ変換したディジタル電圧値がＣＰＵ２４のメモリに取
り込まれる。ＣＰＵ２４はＶＣＯ３２を掃引し所望の信
号帯域における干渉波の存在しない場合の検波電圧値を
基準にしである定められたアルゴリズムに従ってディジ
タル演算処理を行い、掃引帯域毎に干渉波の有無を判定
する。The analog detection voltage of the output of the multiplexer 28 is
The D-converted digital voltage value is taken into the memory of the CPU 24. The CPU 24 sweeps the VCO 32 and performs digital arithmetic processing according to a predetermined algorithm based on the detected voltage value when no interference wave exists in a desired signal band, and determines the presence or absence of an interference wave for each sweep band.
この様なディジタル演算処理により、ある周波数帯域に
干渉波か存在すると判定された場合には、ＶＣＯ３２の
掃引を停止してマルチプレクサ２８の複数出力レベルの
大小関係を比較して干渉波の中心周波数を求め、ＣＰＵ
２４を介して追尾回路１６のＶＣＯ２２の発振周波数を
制御する。追尾回路１６ａは第１図の実施例の干渉波検
出回路１６と構成か同じであり、検出回路２６の情報に
基ついたＣＰＵ２４の制御によってＶＣＯ２２の周波数
を設定して、干渉波周波数か変化している場合はこれに
追尾したＶＣＯ２２の出力を干渉波除去回路７に出力す
る。また、ＣＰＵ２４よりスイッチ切替信号かスイッチ
１４に送られ、干渉波除去回路７のＩＦ帯倍信号出力端
子１５に出力する。Through such digital calculation processing, if it is determined that an interference wave exists in a certain frequency band, the sweep of the VCO 32 is stopped and the magnitude relationship of multiple output levels of the multiplexer 28 is compared to determine the center frequency of the interference wave. Search, CPU
24 to control the oscillation frequency of the VCO 22 of the tracking circuit 16. The tracking circuit 16a has the same configuration as the interference wave detection circuit 16 of the embodiment shown in FIG. If so, the output of the VCO 22 that has tracked this is output to the interference wave removal circuit 7. Further, a switch switching signal is sent from the CPU 24 to the switch 14 and output to the IF band double signal output terminal 15 of the interference wave removal circuit 7.
なお、干渉波か存在しないと判定された場合には、ＣＰ
Ｕ２４はＩＦＦ路６を経由してきたＩＦ帯倍信号そのま
ま出力端子１５に出力する。In addition, if it is determined that there is no interference wave, the CP
U24 outputs the IF band doubled signal that has passed through the IFF path 6 to the output terminal 15 as it is.
また、追尾回路１６ａのＶＣＯ２２の出力を分岐して検
出回路２６の乗算器７へ加え、且つ、干渉波の検出と追
尾動作に伴うＣＰＵ２４からの制御シーケンスを変更す
ることによって、検出回路２６のＤ／Ａ変換器３１とＶ
ＣＯ３２を省略することもできる。In addition, by branching the output of the VCO 22 of the tracking circuit 16a and applying it to the multiplier 7 of the detection circuit 26, and by changing the control sequence from the CPU 24 associated with the interference wave detection and tracking operation, the D of the detection circuit 26 is /A converter 31 and V
CO32 can also be omitted.
（発明の効果）
以上詳細に説明したように、本発明による干渉波検出回
路を用いると衛星回線に突発的に混入してくる狭帯域の
干渉波を迅速に検出し、これに高精度で追尾した電圧制
御発振器の出力周波数を得ることかできる。(Effects of the Invention) As explained in detail above, by using the interference wave detection circuit according to the present invention, narrowband interference waves that suddenly enter the satellite line can be quickly detected and tracked with high precision. It is possible to obtain the output frequency of the voltage controlled oscillator.
第１図、第３図は本発明による干渉波除去装置の実施例
の構成を表したブロック図、第２図は本発明装置の動作
を説明するための特性図である。
■・・・入力端子、２． ５． １３． ２３． ２５
・・・ハイブリッド、３．４．６・・・ＩＦ線路、７・
・・干渉波除去回路、８，１１，１７．２７・・・乗算
器（ＭＩＸ）９・・・帯域阻止フィルタ（ＢＲＦ）、１
０．１２・・・帯域通過フィルタ（ＢＥＦ）、１４・・
・スイッチ、１５・・・出力端子、１６・・・干渉波検
出回路、１６ａ・・・追尾回路、１８．２８・・・マル
チプレクサ、１９゜２０．２９．３０・・・検波器とＡ
／Ｄ変換器、２１゜３１・・・Ｄ／Ａ変換器、２２．３
２・・・電圧制御発振器（ＶＣＯ） 、２４・・・ＣＰ
Ｕ。1 and 3 are block diagrams showing the configuration of an embodiment of the interference wave removal device according to the present invention, and FIG. 2 is a characteristic diagram for explaining the operation of the device according to the present invention. ■...Input terminal, 2. 5. 13. 23. 25
...Hybrid, 3.4.6...IF line, 7.
...Interference wave removal circuit, 8, 11, 17.27... Multiplier (MIX) 9... Band rejection filter (BRF), 1
0.12...Band pass filter (BEF), 14...
・Switch, 15... Output terminal, 16... Interference wave detection circuit, 16a... Tracking circuit, 18.28... Multiplexer, 19゜20.29.30... Detector and A
/D converter, 21°31...D/A converter, 22.3
2...Voltage controlled oscillator (VCO), 24...CP
U.
Claims (3)
フィルタと周波数変換された所望信号帯域成分のみを通
過させる帯域通過フィルタとが接続され、入力信号とし
て入力されたディジタル変調信号に混入した狭帯域干渉
波を検出する干渉波検出回路の出力で発振周波数が制御
される電圧制御発振器の出力を該第１と第２の乗算器の
局部発振器出力として加えることによって阻止帯域の中
心周波数を制御する狭帯域干渉波除去回路において、干
渉波検出回路を第３の乗算器と、複数の狭帯域通過フィ
ルタを用いたマルチプレクサと、該マルチプレクサの出
力を検波してディジタル電圧値に変換する回路と、検波
したディジタル電圧値を演算処理するＣＰＵと、該ＣＰ
Ｕの出力で前記電圧制御発振器の発振周波数を制御する
ためのＤ／Ａ変換器とで構成し、前記入力信号を該電圧
制御発振器を局部発振器とする該第３の乗算器に加えて
周波数変換し、周波数変換された所望の信号帯域内に中
心周波数を設定された該マルチプレクサの出力を検波し
てディジタル電圧値に変換して前記ＣＰＵに加えるよう
にした手段を備え、 該電圧制御発振器の発振周波数を前記ＣＰＵからの制御
信号によって掃引し、所望の信号帯域内を掃引された該
マルチプレクサの複数出力のディジタル電圧値を前記Ｃ
ＰＵで演算処理することによって、干渉波の有無と干渉
波周波数および干渉波周波数の変化方向を判定して干渉
波を追尾できるように構成されたことを特徴とする干渉
波検出回路。(1) A narrow band rejection filter and a band pass filter that passes only frequency-converted desired signal band components are connected between the first multiplier and the second multiplier, and a digital signal input as an input signal is connected to the first multiplier and the second multiplier. By adding the output of a voltage-controlled oscillator whose oscillation frequency is controlled by the output of an interference wave detection circuit that detects narrowband interference waves mixed in the modulated signal as the local oscillator output of the first and second multipliers, the stopband is determined. In a narrowband interference wave removal circuit that controls the center frequency of A converting circuit, a CPU that performs arithmetic processing on the detected digital voltage value, and the CPU
and a D/A converter for controlling the oscillation frequency of the voltage controlled oscillator with the output of U, and the input signal is added to the third multiplier which uses the voltage controlled oscillator as a local oscillator to perform frequency conversion. and means for detecting the output of the multiplexer whose center frequency is set within the frequency-converted desired signal band, converting it into a digital voltage value, and applying it to the CPU, the oscillation of the voltage controlled oscillator The frequency is swept by a control signal from the CPU, and the digital voltage values of the multiple outputs of the multiplexer swept within a desired signal band are converted to the C
An interference wave detection circuit characterized in that the interference wave detection circuit is configured to be able to track the interference wave by determining the presence or absence of the interference wave, the interference wave frequency, and the direction of change of the interference wave frequency by performing arithmetic processing on the PU.
さらに前記入力信号を通す第１の線路から分岐した分岐
入力を通す第２の線路を備え、該第２の線路には、第４
の乗算器と、該第１線路の狭帯域フィルタより通過帯域
幅を広くした複数の狭帯域通過フィルタを用いた第２の
マルチプレクサと、該マルチプレクサの出力を検波して
ディジタル電圧値に変換する回路と、検波したディジタ
ル電圧値を演算処理するＣＰＵと、該ＣＰＵ出力で該第
２の電圧制御発振器の発振周波数を制御するためのＤ／
Ａ変換器で構成した回路を備え、該第２の電圧制御発振
器の発振周波数を前記ＣＰＵからの制御信号によって掃
引し、所望の信号帯域内を掃引された該第２のマルチプ
レクサ出力のディジタル電圧値を前記ＣＰＵで演算処理
することによって干渉波の有無と干渉波周波数を判定し
、該第１線路の電圧制御発振器の発振周波数を前記ＣＰ
Ｕから制御して該第１線路のマルチプレクサの複数出力
のディジタル電圧値を前記ＣＰＵで演算処理することに
よって干渉波周波数の変化方向を判定して干渉波周波数
に追尾させることにより、干渉波の検出を迅速に行って
高精度で干渉波周波数に追尾した該第１線路の電圧制御
発振器の出力周波数を出力できるようにしたことを特徴
とする干渉波検出回路。(2) The interference wave detection circuit according to claim 1,
Furthermore, a second line for passing a branch input branched from the first line for passing the input signal is provided, and the second line has a fourth line for passing the branch input.
a second multiplexer using a plurality of narrow band pass filters having a wider pass band width than the narrow band filter of the first line, and a circuit that detects the output of the multiplexer and converts it into a digital voltage value. , a CPU that performs arithmetic processing on the detected digital voltage value, and a D/D converter that controls the oscillation frequency of the second voltage controlled oscillator using the output of the CPU.
A digital voltage value of the second multiplexer output swept within a desired signal band by sweeping the oscillation frequency of the second voltage controlled oscillator with a control signal from the CPU, and sweeping the oscillation frequency of the second voltage controlled oscillator using an A converter The presence or absence of an interference wave and the interference wave frequency are determined by calculating the oscillation frequency of the voltage controlled oscillator of the first line by the CPU.
The interference wave is detected by controlling from U and calculating the digital voltage values of the multiple outputs of the multiplexer of the first line by the CPU to determine the direction of change in the interference wave frequency and tracking the interference wave frequency. An interference wave detection circuit characterized in that the output frequency of the voltage controlled oscillator of the first line can be outputted by quickly performing the following steps and tracking the interference wave frequency with high precision.
される該第４の乗算器の局部発振器として該第１線路の
電圧制御発振器を用い、該電圧制御発振器の発振周波数
をＣＰＵからの制御信号によって掃引し、所望の信号帯
域内を掃引された該第２のマルチプレクサ出力のディジ
タル電圧値をＣＰＵで演算処理することによって干渉波
の有無と干渉波周波数を判定し、干渉波が検出された後
は、該第１線路のマルチプレクサ出力のディジタル電圧
値をＣＰＵで演算処理することよって干渉波周波数の変
化方向を判定して干渉波周波数に追尾させることで、干
渉波の検出を迅速に行って高精度で干渉波周波数に追尾
した該第１線路の電圧制御発振器の出力周波数を出力で
きるように構成されたことを特徴とする干渉波検出回路
。(3) The voltage controlled oscillator of the first line is used as a local oscillator of the fourth multiplier connected to the second line according to claim 2, and the oscillation frequency of the voltage controlled oscillator is The digital voltage value of the output of the second multiplexer swept within a desired signal band is swept by a control signal from the CPU, and the CPU processes the digital voltage value to determine the presence or absence of an interference wave and the frequency of the interference wave. After the interference wave is detected, the CPU processes the digital voltage value of the multiplexer output of the first line to determine the direction of change in the interference wave frequency and tracks the interference wave frequency, thereby detecting the interference wave. An interference wave detection circuit characterized in that it is configured to output the output frequency of the voltage controlled oscillator of the first line that quickly tracks the interference wave frequency with high precision.
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2026179A JP2561868B2 (en) | 1990-02-07 | 1990-02-07 | Interference wave detection circuit |
| US07/566,679 US5222106A (en) | 1990-02-07 | 1990-08-13 | Interference detection and reduction |
| EP95101367A EP0651519B1 (en) | 1990-02-07 | 1990-12-07 | Interference detector |
| EP90123570A EP0440920B1 (en) | 1990-02-07 | 1990-12-07 | Interference detection and reduction |
| DE1990623632 DE69023632T2 (en) | 1990-02-07 | 1990-12-07 | Detection and reduction of faults. |
| DE1990633523 DE69033523T2 (en) | 1990-02-07 | 1990-12-07 | Interference detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2026179A JP2561868B2 (en) | 1990-02-07 | 1990-02-07 | Interference wave detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03231542A true JPH03231542A (en) | 1991-10-15 |
| JP2561868B2 JP2561868B2 (en) | 1996-12-11 |
Family
ID=12186302
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2026179A Expired - Lifetime JP2561868B2 (en) | 1990-02-07 | 1990-02-07 | Interference wave detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2561868B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003530756A (en) * | 1999-04-28 | 2003-10-14 | イスコ インターナショナル， インコーポレイテッド | Interference detection, identification, extraction, and reporting |
| WO2012157141A1 (en) * | 2011-05-16 | 2012-11-22 | 古野電気株式会社 | Interference wave signal removal device, gnss receiver device, mobile terminal, interference wave signal removal program, and interference wave signal removal method |
| WO2012157140A1 (en) * | 2011-05-16 | 2012-11-22 | 古野電気株式会社 | Interference wave signal removal device, gnss receiver device, mobile terminal, interference wave signal removal program, and interference wave signal removal method |
| JP2016538797A (en) * | 2013-09-18 | 2016-12-08 | ライトポイント・コーポレイションＬｉｔｅＰｏｉｎｔ Ｃｏｒｐｏｒａｔｉｏｎ | System and method for testing a wideband data packet signal transceiver using a narrowband tester |
-
1990
- 1990-02-07 JP JP2026179A patent/JP2561868B2/en not_active Expired - Lifetime
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003530756A (en) * | 1999-04-28 | 2003-10-14 | イスコ インターナショナル， インコーポレイテッド | Interference detection, identification, extraction, and reporting |
| WO2012157141A1 (en) * | 2011-05-16 | 2012-11-22 | 古野電気株式会社 | Interference wave signal removal device, gnss receiver device, mobile terminal, interference wave signal removal program, and interference wave signal removal method |
| WO2012157140A1 (en) * | 2011-05-16 | 2012-11-22 | 古野電気株式会社 | Interference wave signal removal device, gnss receiver device, mobile terminal, interference wave signal removal program, and interference wave signal removal method |
| CN103518144A (en) * | 2011-05-16 | 2014-01-15 | 古野电气株式会社 | Interference wave signal removal device, global navigation satellite system receiver, mobile terminal, interference wave signal removal program, and interference wave signal removal method |
| JP5698349B2 (en) * | 2011-05-16 | 2015-04-08 | 古野電気株式会社 | Interference wave signal removal apparatus, GNSS reception apparatus, mobile terminal, interference wave signal removal program, and interference wave signal removal method |
| JP5698350B2 (en) * | 2011-05-16 | 2015-04-08 | 古野電気株式会社 | Interference wave signal removal apparatus, GNSS reception apparatus, mobile terminal, interference wave signal removal program, and interference wave signal removal method |
| US9291715B2 (en) | 2011-05-16 | 2016-03-22 | Furuno Electric Co., Ltd. | Interference wave signal removing device, GNSS reception apparatus, mobile terminal, interference wave signal removing program and interference wave removing method |
| US9748988B2 (en) | 2011-05-16 | 2017-08-29 | Furuno Electric Co., Ltd. | Interference wave signal removing device, GNSS reception apparatus, mobile terminal, interference wave signal removing program and interference wave removing method |
| JP2016538797A (en) * | 2013-09-18 | 2016-12-08 | ライトポイント・コーポレイションＬｉｔｅＰｏｉｎｔ Ｃｏｒｐｏｒａｔｉｏｎ | System and method for testing a wideband data packet signal transceiver using a narrowband tester |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2561868B2 (en) | 1996-12-11 |
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