JPH03228332A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH03228332A
JPH03228332A JP2365890A JP2365890A JPH03228332A JP H03228332 A JPH03228332 A JP H03228332A JP 2365890 A JP2365890 A JP 2365890A JP 2365890 A JP2365890 A JP 2365890A JP H03228332 A JPH03228332 A JP H03228332A
Authority
JP
Japan
Prior art keywords
film
gas
substrate
flow rate
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2365890A
Other languages
Japanese (ja)
Inventor
Hideki Gomi
五味 秀樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2365890A priority Critical patent/JPH03228332A/en
Publication of JPH03228332A publication Critical patent/JPH03228332A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make it possible to form an insulating film having a superior buried flatness and to contrive to improve the yield of the manufacture of an integrated circuit device because the insulating film having the superior flatness can be formed by a process only of one time by a method wherein a deposited film in a fluid state is vapor-phase grown on the main surface of a semiconductor substrate at a substrate temperature equal to an higher than the glass transition temperature of the deposited film. CONSTITUTION:In the manufacturing process of a semiconductor device, wherein a deposited film 204 is formed for flattening a step of the main surface of a semiconductor substrate, the film 204 in a fluid state is vapor-phase grown on the main surface of the substrate using a substrate temperature of the glass transition temperature or higher of the film 204. For example, an insulating film 202 is formed on a single crystal silicon substrate 201 with an semiconductor element formed thereon and moreover, polycrystalline silicon wirings 203 are formed. Then, a vapor growth of a fluid BPSG film 204 is performed at a substrate temperature of 900 deg.C, at a pressure of 0.6 Torr, at the flow rate of 120SCCM of SiH4 gas, at the flow rate of 2 slm of N2O gas, at the flow rate of 10SCCM of PH3 gas and the flow rate of 10SCCM of B2H6 gas. Thereby, the formed film 204 becomes one having a flatness superior that of a conventional film obtainable by performing two processes of film formation and reflow.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の製造方法に係り、特に半導体装
置製造プロセスで発生する段差を絶縁膜を用いて平坦化
する気相成長方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a vapor phase growth method for flattening steps that occur in a semiconductor device manufacturing process using an insulating film.

〔従来の技術〕[Conventional technology]

半導体装置の製造中に発生した主表面の段差を平坦化す
る従来の技術としては、PSG(リンガラス)やBPS
G (ボロンリンガラス)等の絶縁膜を気相成長法で形
成し、その後この絶縁膜のガラス転移温度以上の温度(
PSG膜では950℃以上、BPSG膜では850°C
以上)で熱処理を行ない、リフローさせる方法がある。
Conventional techniques for flattening steps on the main surface that occur during the manufacturing of semiconductor devices include PSG (phosphorus glass) and BPS.
An insulating film such as G (borophosphorus glass) is formed by a vapor phase growth method, and then the temperature (
950°C or higher for PSG film, 850°C for BPSG film
There is a method of performing heat treatment using the above method and reflowing.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

前述した従来の平坦化技術では、絶縁膜堆積後にリフロ
ーを行っているなめ、リフロー後の平坦性は絶縁膜堆積
時のステップカバレッジに大きく依存する。特に、超高
集積回路のように段差の間隔が密になり、段差高と段差
間隔との比(アスペクト比)が1.0に近づく場合、絶
縁膜堆積工程で膜が成長するのに従い段差のアスペクト
比はますます大きくなり、反応ガスがこの段差の底部に
入りにくくなる。その結果、空孔(ボイド〉が発生し、
リフロー後もこのボイドは消失しない。また、段差がオ
ーバーハング状になっている場合、例えばステップ・カ
バレッジ100%の気相成長法を用いてもボイドが発生
する。このようなボイドの発生は、デバイス特性を著し
く劣化させ、その結果デバイスの歩留りや信頼性を低下
させるという欠点がある。段差の間隔が広い場所でも従
来の方法では十分な平坦性が得られず段差上の絶縁膜上
と段差量底部の絶縁膜上の高低差が大きく生じてしまい
、その上に形成する配線の断線や短絡が生じてしまう。
In the conventional planarization technique described above, reflow is performed after the insulating film is deposited, so the flatness after reflow largely depends on the step coverage during the insulating film deposition. In particular, when the steps are closely spaced as in ultrahigh-integration circuits and the ratio of step height to step distance (aspect ratio) approaches 1.0, the steps become smaller as the film grows during the insulating film deposition process. As the aspect ratio becomes larger and larger, it becomes difficult for the reactant gas to enter the bottom of this step. As a result, voids are generated,
This void does not disappear even after reflow. Furthermore, if the step has an overhang shape, voids will occur even if, for example, a vapor phase growth method with 100% step coverage is used. The occurrence of such voids has the drawback of significantly deteriorating device characteristics, resulting in a decrease in device yield and reliability. Even in places where the steps are wide apart, the conventional method cannot achieve sufficient flatness, resulting in a large difference in height between the insulating film on the step and the insulating film at the bottom of the step, resulting in disconnections in the wiring formed on top of the insulating film. or a short circuit may occur.

また、従来の平坦化技術では、膜堆積後の膜の経時変化
によりリンあるいはボロン濃度が変化し、そのためにリ
フロー後のりフロー形状が安定しないという問題がある
。さらに従来の平坦化技術は、気相成長法による膜堆積
工程とりフローのための熱処理工程が分かれているため
、工程数が増え、集積回路装置の歩留りが下がってしま
うという欠点がある。
Further, in the conventional planarization technique, there is a problem that the phosphorus or boron concentration changes due to changes in the film over time after the film is deposited, and therefore the reflow shape after reflow is not stable. Furthermore, conventional planarization techniques have the disadvantage that the film deposition process using the vapor phase growth method and the heat treatment process for the flow are separated, which increases the number of processes and lowers the yield of integrated circuit devices.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、半導体基板主平面の段差を平坦化するため堆
積膜を形成する半導体装置の製造方法において、堆積膜
のガラス転移温度以上の基板温度で半導体基板の主表面
上に流動性状態の堆積膜を気相成長することを特徴とす
る。なお、流動性堆積膜の蒸気圧は、原料ガスの圧力よ
り低いことが必要である。
The present invention provides a method for manufacturing a semiconductor device in which a deposited film is formed in order to flatten a step on the main plane of a semiconductor substrate, in which the deposited film is deposited in a fluid state on the main surface of the semiconductor substrate at a substrate temperature higher than the glass transition temperature of the deposited film. The film is grown in a vapor phase. Note that the vapor pressure of the fluid deposited film needs to be lower than the pressure of the source gas.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の第1の実施例で炉芯管型減圧気相成長
装置を用いてBPSG膜を堆積する場合の装置の概略図
である。101は半導体基板、102は反応炉、103
はヒーター、108は流量コントローラである。シラン
(SiH4)ガス、H20ガス、PH3ガス、82H6
ガスはそれぞれS i Haガス供給管104、N20
ガス供給管105、PH3ガス供給管106、B2H6
ガス供給管107から導入する。これにより半導体基板
上にBPSG膜を形成することができる。
FIG. 1 is a schematic diagram of an apparatus for depositing a BPSG film using a furnace tube type reduced pressure vapor phase growth apparatus according to a first embodiment of the present invention. 101 is a semiconductor substrate, 102 is a reactor, 103
is a heater, and 108 is a flow controller. Silane (SiH4) gas, H20 gas, PH3 gas, 82H6
The gases are S i Ha gas supply pipe 104 and N20, respectively.
Gas supply pipe 105, PH3 gas supply pipe 106, B2H6
The gas is introduced from the gas supply pipe 107. Thereby, a BPSG film can be formed on the semiconductor substrate.

第2図は本発明の第1図に示す装置を用いてBPSG膜
を形成した半導体装置の工程順断面図である。半導体素
子を形成した単結晶シリコン基板201上に絶縁膜20
2を形成し、更に多結晶シリコン配線203をエツチン
グを用いて形成する(第2図(a))。次に、本発明の
特徴となる流動性BPSG膜の気相成長を第1図の装置
を用いて行なう。成膜条件は基板温度900℃、圧力0
、□Torr、S i H4ガス流量120 SCCM
FIG. 2 is a process-order cross-sectional view of a semiconductor device in which a BPSG film is formed using the apparatus shown in FIG. 1 of the present invention. An insulating film 20 is formed on a single crystal silicon substrate 201 on which a semiconductor element is formed.
A polycrystalline silicon wiring 203 is further formed by etching (FIG. 2(a)). Next, vapor phase growth of a fluid BPSG film, which is a feature of the present invention, is performed using the apparatus shown in FIG. Film forming conditions are substrate temperature 900℃, pressure 0
, □Torr, S i H4 gas flow rate 120 SCCM
.

N20ガス流量:251m、PH3ガス流量10!Ic
cM、 B2 H6ガス流量105CCMである。この
条件で形成中のBPSG膜は流動性を持ち、段差被覆性
に優れる。第2図(b)は流動性BPSG膜形成中の断
面図であり、平坦部で約2000人形成した場合である
。なお、BPSG膜の蒸気圧は0、ITOrr程度であ
る。このように流動性BPSG膜を用いた場合は、成膜
初期段階から段差被覆性が優れ、段差部でのオーバーハ
ング形状が形成されないため、1μm以下の配線間隔で
も埋め込むことが可能である。このようにして流動性B
PSG膜を所望の膜厚まで形成しく第2図(C))、ガ
スの導入を止める。次に反応炉内のガスの置換及び圧力
を大気圧に戻し、半導体基板を反応炉から引き出す。そ
の時の外気による冷却によって半導体基板上のBPSG
膜は、固体状態の絶縁膜となる。その形状は、流動性B
PSG膜を形成したままの状態(第2図(C〉)が維持
される。このようにして形成されたBPSG膜は従来の
膜形成、リフローという2つの工程を行なう膜よりも平
坦性が優れ、半導体装置の信頼性及び製造歩留りが大き
く向上する。
N20 gas flow rate: 251m, PH3 gas flow rate 10! Ic
cM, B2 H6 gas flow rate is 105 CCM. The BPSG film being formed under these conditions has fluidity and excellent step coverage. FIG. 2(b) is a cross-sectional view during formation of a fluid BPSG film, in which approximately 2000 films were formed on a flat area. Note that the vapor pressure of the BPSG film is about 0, ITOrr. When a fluid BPSG film is used in this manner, the step coverage is excellent from the initial stage of film formation, and no overhang shape is formed at the step portion, so it is possible to embed even a wiring interval of 1 μm or less. In this way, liquidity B
After forming the PSG film to a desired thickness (FIG. 2(C)), the introduction of gas is stopped. Next, the gas in the reactor is replaced and the pressure is returned to atmospheric pressure, and the semiconductor substrate is pulled out from the reactor. At that time, the BPSG on the semiconductor substrate is cooled by the outside air.
The film becomes a solid state insulating film. Its shape is fluidity B
The state in which the PSG film is formed (Fig. 2 (C)) is maintained.The BPSG film formed in this way has better flatness than the conventional film that requires two processes: film formation and reflow. , the reliability and manufacturing yield of semiconductor devices are greatly improved.

第3図は本発明の第2の実施例で分散型常圧気相成長装
置を用いてBPSG膜を堆積する場合の装置の概略図で
ある。301は反応室、302は半導体基板、303は
排気管、304は基板支持台である。基板支持台304
に設置された半導体基板302を赤外線ランプ305に
よって870℃に加熱する。シランガス、PH3ガス、
B2H6ガスはそれぞれSiH4ガス供給管311゜P
H3ガス供給管310.B2H6ガス供給管309より
導入し、あらかじめ混合してデイスバ−ジョンヘッド3
06へ送る。またN2oガスはN20ガス供給管308
がらディスバージョンヘッド306へ導入する。これら
のガスは870℃に加熱された半導体基板上で反応し、
流動性状態のB P S GMを形成する。所望の膜厚
を形成後、ガスの供給を止め赤外線ランプ305を切る
ことによって基板は冷却され、BPSG膜は因襲状態の
絶縁膜となる。この方法を用いて形成されたBPSG膜
も第1の実施例と同様に非常に平坦性の優れたものであ
る。
FIG. 3 is a schematic diagram of an apparatus for depositing a BPSG film using a distributed atmospheric pressure vapor deposition apparatus according to a second embodiment of the present invention. 301 is a reaction chamber, 302 is a semiconductor substrate, 303 is an exhaust pipe, and 304 is a substrate support stand. Board support stand 304
The semiconductor substrate 302 placed on the substrate is heated to 870° C. by an infrared lamp 305. Silane gas, PH3 gas,
B2H6 gas is SiH4 gas supply pipe 311゜P.
H3 gas supply pipe 310. B2H6 gas is introduced from the supply pipe 309, mixed in advance, and then transferred to the disk version head 3.
Send to 06. In addition, N2o gas is supplied via the N20 gas supply pipe 308.
into the dispersion head 306. These gases react on a semiconductor substrate heated to 870°C,
Form BPS GM in a fluid state. After forming the desired film thickness, the substrate is cooled by stopping the gas supply and turning off the infrared lamp 305, and the BPSG film becomes an insulating film in its conventional state. The BPSG film formed using this method also has excellent flatness, similar to the first embodiment.

なお、本実施例ではBPSG膜堆積のためのガス系とし
て[S i H4+N20+PH3+B2H6]系を用
いたが、その他のガス系例えば5i(OC2H4) 4
 、すなわちTEOSなどを用いても同様に実施できる
。また本実施例では、堆積膜をBPSG膜としたが、ガ
ラス転移温度が400℃から1000℃の範囲であれば
いがなる絶縁膜でも良い。
In this example, [S i H4 + N20 + PH3 + B2H6] system was used as the gas system for depositing the BPSG film, but other gas systems such as 5i (OC2H4) 4
In other words, it can be similarly implemented using TEOS or the like. Further, in this embodiment, the deposited film is a BPSG film, but any insulating film having a glass transition temperature in the range of 400°C to 1000°C may be used.

〔発明の効果〕〔Effect of the invention〕

以上説明した様に本発明は、堆積膜のガラス転移温度以
上の基板温度で半導体基板の主表面上に流動性状態の堆
積膜を気相成長することにより、非常に埋込み平坦性の
優れた絶縁膜を形成できる効果がある。また−回の工程
のみで平坦性の優れた絶縁膜が形成できるため、集積回
路装置の製造歩留りが向上する。
As explained above, the present invention achieves an insulating film with excellent embedded flatness by vapor-phase growing a fluid deposited film on the main surface of a semiconductor substrate at a substrate temperature higher than the glass transition temperature of the deposited film. It has the effect of forming a film. Furthermore, since an insulating film with excellent flatness can be formed in only - times of steps, the manufacturing yield of integrated circuit devices is improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第1実施例で減圧気相成長法を用いた
場合の装置の概略図、第2図(a)〜(c)は第1実施
例を用いた半導体装置の製造工程断面図、第3図は本発
明の第2の実施例で常圧気相成長法を用いた場合の装置
の概略図である。 101.302・・・半導体基板、102・・・反応炉
、103・・・ヒーター 104.31!・−・SiH
4ガス供給管、105,308・・・N20ガス供給管
、106,310・・・PH3ガス供給管、107.3
09・・・B2H6ガス供給管、108゜312・・・
流量コントローラ、201・・・シリコン基板、202
・・・絶縁膜、203・・・多結晶シリコン配線、20
4・・・流動性BPSG膜、301・・・反応室、30
3・・・排気管、304・・・基板支持台、3゜5・・
・赤外線ランプ、306・・・ディスバージョンヘッド
、307・・・石英ガラス。
FIG. 1 is a schematic diagram of an apparatus in a first embodiment of the present invention using a low pressure vapor phase growth method, and FIGS. 2(a) to (c) are manufacturing steps of a semiconductor device using the first embodiment. The sectional view and FIG. 3 are schematic diagrams of an apparatus in which atmospheric pressure vapor phase growth is used in a second embodiment of the present invention. 101.302...Semiconductor substrate, 102...Reactor, 103...Heater 104.31!・-・SiH
4 gas supply pipe, 105,308...N20 gas supply pipe, 106,310...PH3 gas supply pipe, 107.3
09...B2H6 gas supply pipe, 108°312...
Flow rate controller, 201... silicon substrate, 202
... Insulating film, 203 ... Polycrystalline silicon wiring, 20
4... Fluid BPSG membrane, 301... Reaction chamber, 30
3... Exhaust pipe, 304... Board support stand, 3゜5...
- Infrared lamp, 306...disversion head, 307...quartz glass.

Claims (1)

【特許請求の範囲】 1、半導体基板主表面の段差を平坦化するため堆積膜を
形成する半導体装置の製造工程において、半導体基板主
表面上に、堆積膜のガラス転移温度以上の基板温度を用
いて流動性状態の堆積膜を気相成長することを特徴とす
る半導体装置の製造方法。 2、前記流動性堆積膜の気相成長において、流動性堆積
膜物質の蒸気圧が成膜用原料ガスの圧力より低いことを
特徴とする請求項1記載の半導体装置の製造方法。
[Claims] 1. In the manufacturing process of a semiconductor device in which a deposited film is formed to flatten a step on the main surface of a semiconductor substrate, a substrate temperature higher than the glass transition temperature of the deposited film is applied on the main surface of the semiconductor substrate. 1. A method for manufacturing a semiconductor device, characterized by vapor phase growth of a deposited film in a fluid state. 2. The method of manufacturing a semiconductor device according to claim 1, wherein in the vapor phase growth of the fluid deposited film, the vapor pressure of the fluid deposited film material is lower than the pressure of the film forming raw material gas.
JP2365890A 1990-02-02 1990-02-02 Manufacture of semiconductor device Pending JPH03228332A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2365890A JPH03228332A (en) 1990-02-02 1990-02-02 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2365890A JPH03228332A (en) 1990-02-02 1990-02-02 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH03228332A true JPH03228332A (en) 1991-10-09

Family

ID=12116611

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2365890A Pending JPH03228332A (en) 1990-02-02 1990-02-02 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH03228332A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60245231A (en) * 1984-05-18 1985-12-05 サームコ システムズ インコーポレーテツド Method of depositing borophossilidate glass
JPS61156741A (en) * 1984-12-28 1986-07-16 Fujitsu Ltd Method for formation of phosphosilicate film
JPS62123725A (en) * 1985-11-25 1987-06-05 Hitachi Ltd Manufacture of semiconductor device
JPS62213130A (en) * 1986-03-13 1987-09-19 Nec Corp Cvd method under normal pressure
JPS6425545A (en) * 1987-07-22 1989-01-27 Fujitsu Ltd Growing method for boron phosphorus silicate glass film

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60245231A (en) * 1984-05-18 1985-12-05 サームコ システムズ インコーポレーテツド Method of depositing borophossilidate glass
JPS61156741A (en) * 1984-12-28 1986-07-16 Fujitsu Ltd Method for formation of phosphosilicate film
JPS62123725A (en) * 1985-11-25 1987-06-05 Hitachi Ltd Manufacture of semiconductor device
JPS62213130A (en) * 1986-03-13 1987-09-19 Nec Corp Cvd method under normal pressure
JPS6425545A (en) * 1987-07-22 1989-01-27 Fujitsu Ltd Growing method for boron phosphorus silicate glass film

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