JPH03191596A - Manufacture of multilayer ceramic board with built-in capacitor - Google Patents
Manufacture of multilayer ceramic board with built-in capacitorInfo
- Publication number
- JPH03191596A JPH03191596A JP1329731A JP32973189A JPH03191596A JP H03191596 A JPH03191596 A JP H03191596A JP 1329731 A JP1329731 A JP 1329731A JP 32973189 A JP32973189 A JP 32973189A JP H03191596 A JPH03191596 A JP H03191596A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- ceramic green
- green sheet
- capacitor layer
- built
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 62
- 239000003990 capacitor Substances 0.000 title claims abstract description 58
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000002003 electrode paste Substances 0.000 claims abstract description 20
- 238000000034 method Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims description 14
- 239000000203 mixture Substances 0.000 claims description 6
- 238000010030 laminating Methods 0.000 claims description 3
- 238000003825 pressing Methods 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 239000011230 binding agent Substances 0.000 abstract description 4
- 239000011800 void material Substances 0.000 abstract 2
- 239000010410 layer Substances 0.000 description 37
- 239000000843 powder Substances 0.000 description 15
- 238000010304 firing Methods 0.000 description 7
- 238000001035 drying Methods 0.000 description 6
- 238000007639 printing Methods 0.000 description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 239000004020 conductor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 238000010344 co-firing Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 201000003373 familial cold autoinflammatory syndrome 3 Diseases 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
- ZFZQOKHLXAVJIF-UHFFFAOYSA-N zinc;boric acid;dihydroxy(dioxido)silane Chemical compound [Zn+2].OB(O)O.O[Si](O)([O-])[O-] ZFZQOKHLXAVJIF-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野Ｊ
本発明は、コンデンサ内蔵多層セラミック基板の製造方
法に関し、特に、セラミックグリーンシート上にコンデ
ンサ層を形成せしめ、その上面に同組成のセラミックグ
リーンシートを積層圧着し、焼成するコンデンサ内蔵多
層セラミック基板の製造方法の改良に関するものである
。[Detailed Description of the Invention] [Industrial Application Field J] The present invention relates to a method for manufacturing a multilayer ceramic substrate with a built-in capacitor, and in particular, a method for forming a capacitor layer on a ceramic green sheet, and a ceramic green sheet having the same composition on the top surface of the capacitor layer. The present invention relates to an improvement in a method for manufacturing a multilayer ceramic substrate with a built-in capacitor, which involves laminating, pressing, and firing.
［従来の技術Ｊ
従来、コンデンサを内蔵するセラミック回路基板を同時
焼成によって製造する方法には、電極ペーストを印刷し
たセラミックグリーンシートに必要な大きさの誘電体層
を必要箇所に印刷し、その上に電極ペーストを印刷した
セラミックグリーンシートを積層圧着し一体焼成する方
法がある。[Conventional technology J] Conventionally, the method of manufacturing a ceramic circuit board with a built-in capacitor by co-firing involves printing a dielectric layer of the required size on a ceramic green sheet printed with electrode paste at the required location, and then There is a method in which ceramic green sheets printed with electrode paste are laminated and pressure-bonded and integrally fired.
〔発明が解決しようとする課題Ｊ
しかしながら、積層圧着して一体焼成した回路基板には
、誘電体ペーストを印刷した部分と誘電体ペーストの無
い部分とで回路基板の厚さの差が生じたり、隣接した誘
電体層の間にボイドが形成されたりする。厚さの差やボ
イドの形成などを避けるため、圧着工程の圧力を大きく
すると、誘電体層を挟持している部分とそれ以外の部分
とで密度差が大きくなり、焼成したとき密度差に基（収
縮量の差が基板の変形又は表面の凹凸として表われ、基
板への印刷や素子の搭載に際して位置ずれが生じ易い。[Problem to be Solved by the Invention J] However, in a circuit board that is laminated and pressure-bonded and integrally fired, there is a difference in the thickness of the circuit board between the part printed with the dielectric paste and the part without the dielectric paste. Voids may form between adjacent dielectric layers. In order to avoid differences in thickness and the formation of voids, if the pressure in the crimping process is increased, the difference in density will increase between the part sandwiching the dielectric layer and the other parts, and when fired, the difference in density will increase. (The difference in the amount of shrinkage appears as deformation of the substrate or irregularities on the surface, and misalignment is likely to occur when printing or mounting elements on the substrate.
［問題点を解決するための手段［
本発明者らは、上記の問題は、誘電体層の有る部分と誘
電体層の無い部分とか混在した厚みの異なる積層体を同
一の圧力で圧着成形することに起因すると考え、積層体
の厚みを同一にすることにより問題を解決した。[Means for Solving the Problems] The present inventors solved the above problem by pressing and molding a laminate of different thicknesses, including parts with a dielectric layer and parts without a dielectric layer, with the same pressure. The problem was solved by making the thickness of the laminate the same.
すなわち１本発明は、セラミックグリーンシート上に、
電極ペースト、誘電体ペースト及び電極ペーストを順次
印刷積層してコンデンサ層を形成せしめ、その−Ｌ面に
同組成の他のセラミックグリーンシートを積層圧青し、
焼成するコンデンサ内蔵多層セラミック基板の製造方法
において、前記コンデンサ層が形成された後、上記他の
セラミックグリーンシートの積層圧着前に、該コンデン
サ層に対応する部分が打抜かれたセラミックグリーンシ
ートを該コンデンサ層に嵌合して、かつ、該コンデンサ
層と同じ厚さに載置した後、前記他のセラミックグリー
ンシートを積層圧着することを特徴とするコンデンサ内
蔵多層セラミック基板の製造方法である。That is, one aspect of the present invention is that on a ceramic green sheet,
Electrode paste, dielectric paste, and electrode paste are sequentially printed and laminated to form a capacitor layer, and another ceramic green sheet of the same composition is laminated on the -L side of the layer,
In the method for manufacturing a multilayer ceramic substrate with a built-in capacitor which is fired, after the capacitor layer is formed and before the other ceramic green sheets are laminated and crimped, a ceramic green sheet with a portion corresponding to the capacitor layer punched out is added to the capacitor. This is a method for manufacturing a multilayer ceramic substrate with a built-in capacitor, characterized in that, after being fitted into the layer and placed to have the same thickness as the capacitor layer, the other ceramic green sheet is laminated and pressure bonded.
本発明でセラミックグリーンシート材料に用いられるセ
ラミックとしては、セラミックグリーンシート多層積層
法に用いられるものであれば任意のものが使用できるが
、回路基板の焼成に際して導体材料の選択幅があり、微
細配線が可能な点から、焼成温度が８００〜１１００℃
の低温焼成セラミックス基板に用いられるものが好まし
い。As the ceramic used in the ceramic green sheet material in the present invention, any ceramic can be used as long as it is used in the ceramic green sheet multilayer lamination method, but there is a wide selection of conductor materials when firing the circuit board, and fine wiring The firing temperature is 800 to 1100℃ because it is possible to
Those used for low-temperature fired ceramic substrates are preferred.
セラミックグリーンシートの材料としては、例えばＺｎ
ＯＺｎ０−Ｍｇ０−Ａ１系粉末、５１０ａ−８２０３系
ガラス粉末とアルミナ粉末を所定割合で混合した粉末。Examples of materials for ceramic green sheets include Zn.
A powder obtained by mixing OZn0-Mg0-A1 based powder, 510a-8203 based glass powder and alumina powder in a predetermined ratio.
ＰｂＯ−３ｉｎ□−ＢｚＯｓ−ＣａＯ系ガラス粉末とア
ルミナ粉末を所定割合で混合した粉末、Ｃａ０−Ａｊａ
Ｏ＊−５ｌＯ＊Ｂ、０．系ガラス粉末とアルミナ粉末を
所定割合で混合した粉末、 Ｍｇ０−Ａｊ！Ｏｘ−５ｉ
ＯＯｘ−５ｉＯ系ガラス粉末とアルミナ粉末を所定割合
で混合した粉末、＋３ａＳｎ （ＳＯ−１粉末等がある
。PbO-3in□-BzOs-CaO glass powder and alumina powder mixed in a predetermined ratio, Ca0-Aja
O*-5lO*B, 0. Mg0-Aj!-based glass powder and alumina powder mixed in a predetermined ratio. Ox-5i
There are powders that are a mixture of OOx-5iO glass powder and alumina powder in a predetermined ratio, +3aSn (SO-1 powder, etc.).
誘電体及び電極の材質には特に限定はないが、セラミッ
クグリーンシートの焼成温度にほぼ合致した８００〜１
１００℃で焼成できる誘電体及び電極が好ましく、例え
ば誘電体としては、複合ペロブスカイト等があり、電極
としては、銀、銀パラジウム、銅、金などが挙げられる
。There are no particular limitations on the materials of the dielectric and electrodes, but 800 to 1, which almost matches the firing temperature of ceramic green sheets.
Dielectrics and electrodes that can be fired at 100° C. are preferred, and examples of the dielectric include composite perovskite, and examples of the electrode include silver, silver palladium, copper, and gold.
コンデンサ層を形成する誘電体ペーストと電極へ一スト
とは、それぞれスクリーン印刷法等により印刷される。The dielectric paste forming the capacitor layer and the paste for the electrodes are each printed by a screen printing method or the like.
コンデンサ層に嵌合する打抜かれたセラミックグリーン
シートは、それを挟持するセラミックグリーンシートと
同一組成のものが用いられ、焼成後各層に境界の無い一
体的な基板が得られる。The punched ceramic green sheet that fits into the capacitor layer has the same composition as the ceramic green sheet sandwiching it, and after firing, an integrated substrate with no boundaries between the layers can be obtained.
また、コンデンサ層とそれに嵌合する打抜かれたセラミ
ックグリーンシートとは、その厚みを揃えることが必要
で、一部のコンデンサ層を誘電体ペーストや電極ペース
トを繰返し印刷して他のコンデンサ層より厚くした場合
には、その形状厚さに応じて、打抜かれたセラミックグ
リーンシートを重ねる必要がある。コンデンサ層と嵌合
する打抜かれたセラミックグリーンシートとの厚さの差
は、±ＩＯｐｍに留めることが好ましい。また、打抜か
れたセラミックグリーンシートとコンデンサ層とはなる
べく密接させることが必要で、その間隙は５０μｍ以下
にすることが好ましい。間隙が大きすぎると、焼成過程
で導体が断線するおそれがある。In addition, it is necessary to make the thickness of the capacitor layer and the punched ceramic green sheet that fits into it the same, so some capacitor layers are made thicker than other capacitor layers by repeatedly printing dielectric paste or electrode paste. In this case, it is necessary to overlap the punched ceramic green sheets depending on the shape and thickness. It is preferable that the difference in thickness between the capacitor layer and the mating die-cut ceramic green sheet be kept within ±IOpm. Further, it is necessary to bring the punched ceramic green sheet and the capacitor layer as close together as possible, and the gap therebetween is preferably 50 μm or less. If the gap is too large, the conductor may break during the firing process.
単層コンデンサを形成せしめる場合は、通常セラミック
グリーンシート上に下部電極へ一又トを印刷し、次いで
誘電体ペースト、上部電極ペーストの順で印刷を行なう
のが、コンデンサ層の厚み精度上好ましいが、上部電極
ペーストは他のセラミックグリーンシート上に印刷して
もよい。When forming a single-layer capacitor, it is usually preferable to print one layer of the lower electrode on a ceramic green sheet, then print the dielectric paste and then the upper electrode paste in this order, from the viewpoint of thickness accuracy of the capacitor layer. , the upper electrode paste may be printed on other ceramic green sheets.
多層コンデンサを形成せしめる場合には、セラミックグ
リーンシート上に電極ペースト、誘電体ペースト、電極
ペーストを印刷した上に、更に誘電体ペースト、電極ペ
ーストを印刷し、必要に応じてこれが繰り返される。When forming a multilayer capacitor, an electrode paste, a dielectric paste, and an electrode paste are printed on a ceramic green sheet, and then a dielectric paste and an electrode paste are further printed, and this process is repeated as necessary.
セラミックグリーンシート上に印刷された？ｉ数のコン
デンサ層の厚さが異なるときは、薄いコンデンサ層に厚
さを合わせたセラミックグリーンシートに必要な打抜き
を施して載置し、次いで厚いコンデンサ層の残りの厚さ
のセラミックグリーンシートに、必要な打抜きを施して
載置する。必要があれば、同じ打抜きセラミックグリー
ンシトを重ねてコンデンサ層と厚みを揃える。Printed on ceramic green sheet? When the thickness of the i number of capacitor layers is different, the ceramic green sheet with the thickness matched to the thin capacitor layer is punched out as required and then placed on the ceramic green sheet with the remaining thickness of the thick capacitor layer. , perform the necessary punching and place it. If necessary, overlap the same punched ceramic green sheets to match the thickness of the capacitor layer.
〔実施例］
以下１本発明を実施例によって具体的に説明するが、本
発明はこれらの実施例に限定されるものではない。[Example] The present invention will be specifically explained below with reference to Examples, but the present invention is not limited to these Examples.
実施例１
セラミックグリーンシートは、アルミナとホウ珪酸亜鉛
ガラスを５０：５０ （重量比）で混ぜた粉末にバイン
ダと溶剤を加えてスラリーとし、ドクタープレイド法に
より作製した。Example 1 A ceramic green sheet was prepared by adding a binder and a solvent to a powder of a 50:50 (weight ratio) mixture of alumina and zinc borosilicate glass to form a slurry, and using a doctor plaid method.
誘電体ペーストは、Ｐｂ（ｌＪｇ＋ｚ＋Ｎｂｘｚｓ）０
３−ＰｂＴｉＯｚ−ＰｂＯ誘電体粉末にビヒクルを加え
て製造した。The dielectric paste is Pb(lJg+z+Nbxzs)0
It was manufactured by adding a vehicle to 3-PbTiOz-PbO dielectric powder.
電極ペーストは、Ａｇ−Ｐｄ（１５％）粉末にビヒクル
を加えて製造した。The electrode paste was prepared by adding vehicle to Ag-Pd (15%) powder.
第１図は本実施例の回路基板の製造工程を示す。FIG. 1 shows the manufacturing process of the circuit board of this embodiment.
＋１１厚さ １００μ爾のセラミックグリーンシートＩ
上に、
（２）乾燥後の厚さが７１１１１となるように電極ペー
スト２を印刷した後、
（３）その上に乾燥後の厚さが４ｈｗとなるように誘電
体ペースト３を印刷し、
（４）更にその上に対向電極ペースト４を乾燥後の厚さ
が７４ｍ＋どなるように印刷した。+11 100μ thick ceramic green sheet I
(2) After printing electrode paste 2 so that the thickness after drying is 71111, (3) Printing dielectric paste 3 on top of it so that the thickness after drying is 4hw, (4) Furthermore, the counter electrode paste 4 was printed on it so that the thickness after drying was 74 m+.
（５）その後、更にその上に乾燥後の厚さが４０Ｂｍと
なるように誘電体ペースト３及び乾燥後の厚さがＩＢ＋
どなるように電極ペースト２を印刷して、コンデンサ層
５を形成せしめた。(5) Then, add dielectric paste 3 on top of it so that the thickness after drying is 40Bm and the thickness after drying is IB+
Electrode paste 2 was printed to form capacitor layer 5.
（６）上記ｆｌｌ のセラミックグリーンシートと同じ
材質、同じ製法で作製され、コンデンサ層５の形が打抜
かれている厚さ１００μ腸のセラミックグリーンシート
６を、コンデンサ層５の周囲に嵌合して載置した。(6) A ceramic green sheet 6 with a thickness of 100 μm, which is made of the same material and manufactured by the same manufacturing method as the ceramic green sheet of above fll, and has the shape of the capacitor layer 5 punched out, is fitted around the capacitor layer 5. I placed it.
（７）次いで上記＋１１ と同じセラミックグリーンシ
ート７をその上に載置し、
（８）この積層体を熱圧着し、脱バインダー処理した後
、焼成して、コンデンサ内蔵セラミックス基板８を得た
。(7) Next, the same ceramic green sheet 7 as in +11 above was placed thereon, (8) this laminate was bonded by thermocompression, subjected to binder removal treatment, and then fired to obtain a ceramic substrate 8 with a built-in capacitor.
実施例２
第２図に示すように、
（１）、厚さ １００μｍのセラミックグリーンシート
１０上に、乾燥後の厚さが７Ｂ及び４０ＢｗＩとなるよ
うに、それぞれ電極ペースト及び誘電体ペーストを交互
に印刷して、厚さの異なる多層コンデンサ層１１及び１
２を形成せしめ、
（２）コンデンサ層に対応する部分を打抜いた厚さ１０
０ｇｍのセラミックグリーンシート１３及び１４をコン
デンサ層の周囲に載置し、
］３）その上に厚さ ＩＯｈｍのセラミックグリーンシ
ート１５を載置し、
（４）熱圧着、脱バインダー及び焼成によって、コンデ
ンサ内蔵セラミックス基板１６を得た。Example 2 As shown in FIG. 2, (1) electrode paste and dielectric paste were alternately applied on a ceramic green sheet 10 with a thickness of 100 μm so that the thickness after drying was 7B and 40BwI, respectively. Printed multilayer capacitor layers 11 and 1 with different thicknesses
2, and (2) punched out the part corresponding to the capacitor layer with a thickness of 10
0 gm ceramic green sheets 13 and 14 are placed around the capacitor layer; 3) A ceramic green sheet 15 of IOhm thickness is placed thereon; (4) a capacitor is formed by thermocompression bonding, binder removal and firing A built-in ceramic substrate 16 was obtained.
この様にして得られたコンデンサ内蔵セラミックス菖ｊ
＄ｉｉ只乃ｔ〆１６け いずｈｔ、姿形ｈｓ ｔｒど
字面の凹凸も認められなかった。Ceramic iris with built-in capacitor obtained in this way
$ii Tadano t〆16ke Izuht, figure hs trdo
No irregularities in the font were observed.
「発明の効果］
本発明は、コンデンサ内蔵多層セラミック基板を製造す
るに当たり、コンデンサ層の周囲に、コンデンサ層の形
状に打抜かれたセラミックグリーンシートを嵌合載置し
たので、熱圧着、焼成によって、コンデンサを基板内部
にボイドなしに安定して形成でき、しかもコンデンサ層
の存在による基板の変形や凹凸が無いので、表面実装面
積が広く、かつ、基板上への回路印刷、素子搭載工程を
正確に行なうことができる。"Effects of the Invention" According to the present invention, when manufacturing a multilayer ceramic substrate with a built-in capacitor, a ceramic green sheet punched in the shape of the capacitor layer is fitted and placed around the capacitor layer, so that the Capacitors can be stably formed inside the board without voids, and there is no deformation or unevenness of the board due to the presence of the capacitor layer, so the surface mounting area is wide and the circuit printing and element mounting processes on the board can be performed accurately. can be done.
第１図は本発明の実施例のコンデンサ内蔵回路基板の製
造工程の説明図で、第２図は他の実施例の製造工程の説
明図である。
１．７．１０．１５：セラミックグリーンシート、
２．４＝電極ペースト。
３：誘電体ペースト、
５− Ｉｔ、＋２：コンデンサ層
６゜
１３゜
１４：打抜かれたセラミックグリー
ンシート、
８゜
１６ ：
コンデンサ内蔵セラミックス基板。FIG. 1 is an explanatory diagram of the manufacturing process of a circuit board with a built-in capacitor according to an embodiment of the present invention, and FIG. 2 is an explanatory diagram of the manufacturing process of another embodiment. 1.7.10.15: Ceramic green sheet, 2.4=electrode paste. 3: Dielectric paste, 5-It, +2: Capacitor layer 6°13°14: Punched ceramic green sheet, 8°16: Ceramic substrate with built-in capacitor.
Claims (1)
誘電体ペースト及び電極ペーストを順次印刷積層してコ
ンデンサ層を形成せしめ、その上面に同組成の他のセラ
ミックグリーンシートを積層圧着し、焼成するコンデン
サ内蔵多層セラミック基板の製造方法において、前記コ
ンデンサ層が形成された後、上記他のセラミックグリー
ンシートの積層前に、該コンデンサ層に対応する部分が
打抜かれたセラミックグリーンシートを該コンデンサ層
に嵌合して、かつ、該コンデンサ層と同じ厚さに載置し
た後、前記他のセラミックグリーンシートを積層圧着す
ることを特徴とするコンデンサ内蔵多層セラミック基板
の製造方法。(1) Electrode paste on the ceramic green sheet,
A method for manufacturing a multilayer ceramic substrate with a built-in capacitor, in which a dielectric paste and an electrode paste are successively printed and laminated to form a capacitor layer, and another ceramic green sheet having the same composition is laminated and pressure-bonded on the top surface of the capacitor layer, and the capacitor layer is fired. After the formation, and before laminating the other ceramic green sheets, a ceramic green sheet with a portion corresponding to the capacitor layer punched out is fitted onto the capacitor layer, and the thickness is the same as that of the capacitor layer. A method for producing a multilayer ceramic substrate with a built-in capacitor, which comprises laminating and pressing the other ceramic green sheet after the ceramic green sheet is placed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1329731A JPH03191596A (en) | 1989-12-21 | 1989-12-21 | Manufacture of multilayer ceramic board with built-in capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1329731A JPH03191596A (en) | 1989-12-21 | 1989-12-21 | Manufacture of multilayer ceramic board with built-in capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03191596A true JPH03191596A (en) | 1991-08-21 |
Family
ID=18224646
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1329731A Pending JPH03191596A (en) | 1989-12-21 | 1989-12-21 | Manufacture of multilayer ceramic board with built-in capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03191596A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19609221C1 (en) * | 1996-03-09 | 1997-08-07 | Bosch Gmbh Robert | Process for the production of ceramic multilayer substrates |
| US5656113A (en) * | 1993-08-03 | 1997-08-12 | Ngk Spark Plug Co., Ltd. | Method of manufacturing a multilayered wiring substrate of aluminum nitride having a high dielectric layer |
| US6680441B2 (en) | 2001-06-13 | 2004-01-20 | Denso Corporation | Printed wiring board with embedded electric device and method for manufacturing printed wiring board with embedded electric device |
| WO2004066699A1 (en) * | 2003-01-21 | 2004-08-05 | Tdk Corporation | Multi-layer ceramic substrate and method for manufacture thereof |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0195591A (en) * | 1987-10-07 | 1989-04-13 | Murata Mfg Co Ltd | Multylayered ceramic substrate and manufacture thereof |
-
1989
- 1989-12-21 JP JP1329731A patent/JPH03191596A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0195591A (en) * | 1987-10-07 | 1989-04-13 | Murata Mfg Co Ltd | Multylayered ceramic substrate and manufacture thereof |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5656113A (en) * | 1993-08-03 | 1997-08-12 | Ngk Spark Plug Co., Ltd. | Method of manufacturing a multilayered wiring substrate of aluminum nitride having a high dielectric layer |
| US5709928A (en) * | 1993-08-03 | 1998-01-20 | Ngk Spark Plug Co., Ltd | Multilayered wiring substrate of aluminum nitride having a high dielectric layer and method of manufacture thereof |
| DE19609221C1 (en) * | 1996-03-09 | 1997-08-07 | Bosch Gmbh Robert | Process for the production of ceramic multilayer substrates |
| US5876538A (en) * | 1996-03-09 | 1999-03-02 | Robert Bosch Gmbh | Method for manufacturing a ceramic multilayer substrate for complex electronic circuits |
| US6680441B2 (en) | 2001-06-13 | 2004-01-20 | Denso Corporation | Printed wiring board with embedded electric device and method for manufacturing printed wiring board with embedded electric device |
| US7165321B2 (en) | 2001-06-13 | 2007-01-23 | Denso Corporation | Method for manufacturing printed wiring board with embedded electric device |
| WO2004066699A1 (en) * | 2003-01-21 | 2004-08-05 | Tdk Corporation | Multi-layer ceramic substrate and method for manufacture thereof |
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