JPH03185900A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To perform highly integrated packaging and high-efficiency cooling of an ingot simultaneously by a method wherein a wiring metal film is formed on the outer surface of the ingot formed into a polyhedron, a cylindrical body or a spherical body in a prescribed pattern and semiconductor chips, which are connected to the wiring metal film, are mounted on the outer surface of the ingot. CONSTITUTION:IC chips 2 are adhered on the whole periphery of the outer surface of a hollow and polyhedral silicon ingot 1 at prescribed arrangement intervals. The ingot 1 is arranged its external shape into a hexagonal pillar by a chamfering work, for example, and the outer diameter and height of the hexagonal pillar are respectively set in a dimension to correspond to a mounting density, but the diameter of a hollow part 3 is provided comparatively large for improving a cooling effect. The individual IC chips 2 are directly formed on the ingot 1 in the same method as the manufacturing method of normal semiconductor element. In case the member of the IC chips 2 is high and the IC chips are formed on the whole periphery of the ingot 1, the heat generation at the time of operation of the ingot becomes a considerable one. Then a cooling medium is circulated in the hollow of the ingot 1. Thereby, the cooling of the ingot is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to high-density packaging technology for integrated circuits (ICs), and particularly to high-density packaging technology for silicon ICs without sacrificing cooling efficiency. It is about a certain technology.

[Conventional technology]

Traditionally, integrated circuit packaging is done by DIPing semiconductor chips to
(dual in line package) or L
This is done by sealing it in a puff cage such as a leadless chip carrier (CC), and soldering this package onto a resin-based printed wiring board.

By the way, the present inventor has studied improvements in high-density packaging of semiconductor devices.

The following are the techniques studied by the present inventor, and the outline thereof is as follows.

For example, semiconductor devices that are densely packaged, such as large computers, have a large number of terminals (or electrodes), making it difficult to connect them to the substrate using conventional methods.

Therefore, for example, CCB (Controlled C
It is implemented using the o11apse Bonding method. In this method, a copper ball or pad is formed on the surface of a semiconductor device by connecting it to an internal input/output cover pattern. This is soldered to the conductor of the board using a solder alloy.

The mounting technology related to such a CCB is described in, for example, "Mounting of Surface Mount LSI Package and Improving Its Reliability" published by Applied Technology Publishing (Hitachi, Ltd., Semiconductor Division Hato).

[Problems to be Solved by the Invention] However, the mounting means using CCB as described above is
Although it is possible to achieve higher density mounting than P or LCC, it is still mounted on a flat surface, and there is a limit to the improvement in mounting density. To solve this problem, LCC, ZIP
A method has been proposed in which a predetermined number of sub-boards (such as zigzag in-line packages) are mounted upright on the main board to three-dimensionally mount them (for example, Nikkei Electronics, 198'7, 9.7 (k429 ).However, in this case as well, flat plates are basically assembled three-dimensionally, which limits high mounting efficiency, obstructs ventilation, and limits cooling methods (
The inventors have discovered that there is a problem in that there is a problem (wind cooling only).

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a technology that can simultaneously achieve high-density packaging and high-efficiency cooling of semiconductor devices.

Another object of the present invention is to provide a semiconductor device manufacturing technique that can simultaneously combine high-density packaging and high-efficiency cooling.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, wiring metal is formed in a predetermined pattern on the outer surface of an ingot in the form of a polyhedron, cylinder, or sphere.
Further, a semiconductor chip connected to the metal wiring is mounted on the outer surface of the ingot.

[Effect]

According to the above-mentioned means, wiring metal is formed on an ingot which functions as a substrate and further functions as a cooling member, and an IC chip is mounted thereon to form a three-dimensional structure to increase the packaging density per unit area.

Therefore, it becomes possible to eliminate the need for a package, improve packaging density, reduce size and weight, and further increase speed.

[Example 1] FIG. 1 is a perspective view showing an embodiment of the present invention.

Also, the 21st! I is a perspective view showing the appearance of an ingot according to the present invention, and FIG. 3 is a plan view showing a wiring pattern for connection to one of the IC chips.

As shown in FIG. 1, IC chips 2 are attached at predetermined intervals around the entire outer surface of a hollow polyhedral silicon ingot 1. As shown in FIG. For example, as shown in Fig. 2, the ingot 1 is shaped into a hexagonal prism by chamfering, and its outer diameter and length are determined according to the packaging density, but the diameter of the hollow part 3 will be described later. It is made relatively large to improve the cooling effect.

As will be described later, the IC chip 2 has a pad on its periphery, and this pad is electrically connected to a wiring metal 4 formed on the surface of the ingot 1 in a pattern as shown in FIG. 3 by a bonding wire. . A pad 4a for connecting a bonding wire is formed at each tip of the wiring metal 4. Further, the wiring metal 4 is made of AI (aluminum), Au (gold), etc., and depending on the circuit configuration, it may be wired to other surfaces such as the adjacent ingot surface, or it may be wired all the way around. Sometimes there is a line.

Each of the IC chips 2 is directly formed on the ingot 1 in the same way as a normal semiconductor device operates.

The number of IC chips 2 is large, and the I
When the C chip 2 is formed, considerable heat is generated during its operation. Therefore, inside the hollow of ingot 1,
A cooling medium (a gas such as air or a liquid such as water) is passed through, thereby performing cooling.

Next, regarding the manufacturing process of the example with the above configuration, the second
This will be explained with reference to Fig. 7.

First, as shown in Fig. 2, a silicon ingot 1 is chamfered so that it becomes a polyhedron (in this example, a hexahedron), and the inside is hollowed out to form a hollow part centered on the axis. do.

Further, the chamfered ingot surface 5 is mirror-finished in the same way as a normal silicon wafer.

Next, the wiring metal 4 as shown in FIG. 3 is formed as shown in FIG. That is, first, an IC is placed on the ingot surface 5.
An interlayer film 6 made of PSG (phosphorus glass) is formed except for the part where the chip 2 is attached, and a wiring metal 4 is formed on this interlayer film 6. Then, a protective film 7 made of PSG is formed on the wiring metal 4. do.

The process for forming the wiring metal 4 can be performed using insulating film deposition, photolithography, etching, wiring metal deposition, or the like. Note that the interlayer film 6 and the protective film 7 are made of 5ins or 5iN in addition to PSG.
(Nitride film) can also be used.

Next, as shown in FIG. 5, an IC chip 2 is placed on each of the ingot surfaces 5 of the ingot 1 using Ag paste, Au-
It is attached using 3n eutectic or the like. After this, as shown in FIG. 6, the IC chip 2 is
The semiconductor device shown in FIG. 1 is completed by electrically connecting the pad 9 and the pad 4a of the wiring gold *4.

FIG. 7 (cross-sectional view) shows this state viewed from the side.

In addition, in the case of installation in an actual device, piping and the like for causing a cooling medium to flow through the hollow portion 3 are connected, and a pump for forcibly circulating the cooling medium is connected to the piping.

According to the above embodiment, without using a package,
Since the IC chip is directly mounted, the space taken up by the package can be saved, and this space can be used for mounting, making it possible to reduce the size and weight. Furthermore, if each face of the polyhedron of ingot L is regarded as one board, they are tightly fixed in a circular shape, and adjacent parts can be connected with wiring metal 4, so the wiring can be made as short as possible. . As a result, signal delays caused by wiring length can be eliminated, and high-speed processing becomes possible.

In addition, a circuit constituting one or more functional blocks of the computer is assigned to each face of the polyhedron (for example, the first
(CPU part on one side, memory part on the second side, peripheral circuits on the third side, etc.), one ingot forms at least one computer as a whole, so as mentioned above, a high-performance computer without signal delay can be realized. Obtainable. It is particularly suitable for building supercomputers.

C Example 2] FIG. 8 is a perspective view showing another embodiment of the present invention.

In this example, whereas the previous example used a hollow prismatic cylinder for the ingot 1, the ingot 10 is cylindrical and made of the same material as the ingot 1, and ICs are placed on the flat surfaces of both ends of the ingot 10.
The chip 2 is installed in the through hole 11 perpendicular to the axis (
One or more of the through holes 11 are formed in the body, and the through holes 11 are used as cooling passages.

This example has a smaller mounting area than the previous example, so the packaging density is lower, but since chamfering is not required,
Manufacturing becomes easier. Note that the manufacturing method is performed according to FIGS. 2 to 6.

Above, the invention made by the present inventor has been specifically explained based on Examples, but it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. stomach.

For example, in the above embodiment, an example is shown in which the ingot 1 has six sides, but the ingot 1 is not limited to this and can be formed arbitrarily. Furthermore, although the entire area of each surface of the ingot 1 is made flat and the necessary number of IC chips 2 are attached, it is also possible to flatten only the surface to which the IC chips 2 are attached without making the entire surface flat. good.

Further, the ingot 1 can be made into a polyhedron such as a sphere or a quadrilateral in addition to a prismatic shape.

Further, although the cooling medium is forced to flow through the hollow portion 3, silent air may be used instead.

Furthermore, although silicon (Si) is used for the ingot, it is not limited to this. Further, although an example has been shown in which a cylindrical ingot is chamfered to form a square column, a hollow cylinder may be formed by pasting together a number of plates corresponding to the number of faces (six in the case of a hexahedron).

In this case, the material for the plates is one that has the same coefficient of thermal expansion and low thermal resistance, such as SiC.

It is desirable to use AIN or the like.

〔Effect of the invention〕

Among the inventions disclosed in this application, the effects obtained by typical ones are as follows.

In other words, wiring metal is formed in a predetermined pattern on the outer surface of an ingot in the form of a polyhedron, cylinder, or sphere.
Furthermore, since the semiconductor chip connected to the nuclear wiring metal is mounted on the outer surface of the ingot, a package is not required, and it is possible to improve the packaging density, reduce the size and weight, and further increase the speed.

[Brief explanation of drawings]

FIG. 1 is a perspective view showing an embodiment of the present invention, FIG. 2 is a perspective view showing the external appearance of an ingot according to the present invention, and FIG. 3 is a plan view showing a wiring pattern for connection to one of the IC chips. Figure 4 is a cross-sectional view showing the state of the interlayer film, wiring metal, and protective film forming machines, Figure 5 is a perspective view showing the state in which the IC chip is mounted on the ingot, and Figure 6 is the A plan view showing a state in which a pad and a wiring metal pad are connected with a bonding wire, FIG. 7 is a sectional view taken along the ■-■ arrow in FIG. 6, and FIG. 8 is a perspective view showing another embodiment of the present invention. It is a diagram. 1.10... Ingot, 2... IC chip, 3.
...Hollow part, 4...Wiring metal, 4a. 9... Pad, 5... Ingot surface, 6... Interlayer film, 7... Protective film, 8... Bonding wire,
11...Through hole. Figure 2 Figure 2: IC chip 5: Incot front seal Figure 3 Figure 1/14 Figure 5 Figure 6

Claims (5)

[Claims] 1. A semiconductor device characterized in that a wiring metal is formed in a predetermined pattern on the outer surface of an ingot in the form of a polyhedron, a cylinder, or a sphere, and a semiconductor chip connected to the wiring metal is further mounted on the outer surface of the ingot. . 2. 2. The semiconductor device according to claim 1, wherein the polyhedron is constructed by pasting together a number of plates according to the number of faces. 3. 2. The semiconductor device according to claim 1, wherein a through hole is provided in the center of said polyhedron, and the through hole is used as a cooling medium passage. 4. 2. The semiconductor device according to claim 1, wherein a circuit constituting one or more functional blocks of a computer is assigned to each side of the polyhedron, and one polyhedron forms at least one computer as a whole. 5. A wiring pattern corresponding to the required circuit is formed on the outer surface of the ingot, where at least the area where the IC chip is to be mounted is flattened, and the IC chip is mounted.
A method for manufacturing a semiconductor device, comprising electrically connecting pads of a C chip and pads of the wiring pattern with bonding wires.