JPH03184356A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPH03184356A
JPH03184356A JP32452989A JP32452989A JPH03184356A JP H03184356 A JPH03184356 A JP H03184356A JP 32452989 A JP32452989 A JP 32452989A JP 32452989 A JP32452989 A JP 32452989A JP H03184356 A JPH03184356 A JP H03184356A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
frame
lead
adhesion
surface
frames
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32452989A
Inventor
Masaaki Matsuo
Kiyotaka Okinari
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Abstract

PURPOSE: To eliminate short-circuiting trouble in an IC test while not being disconnected from a lead frame by providing a protrusion-like lead which extends horizontally on an adhesion surface of a semiconductor chip from a frame, does not contact the adhesion surface, and is embedded into a resin after sealing the resin.
CONSTITUTION: In a metal lead frame 10 mounting a semiconductor chip, the title item is the lead frame 10 with frames 10a and 10b on an adhesion surface 10e of the semiconductor chip and the upper and lower parts which are nearly horizontal and parallel to the adhesion surface 10e and is the frame 10 where the adhesion surface 10e and the frames 10a and 10b are connected, having a protrusion-like lead 10i which is extended horizontally from the frames 10a and 10b toward the adhesion surface 10e without contacting the adhesion surface 10e and which is embedded into the resin after sealing. For example, the first frame 10a and second frame 10b are coupled, an auxiliary coupling lead 10i which is open from the pad 10e is provided, and each two coupling leads 10f for connecting between the pad 10e and the first frame 10a and the second frame 10b are provided.
COPYRIGHT: (C)1991,JPO&Japio
JP32452989A 1989-12-13 1989-12-13 Lead frame Pending JPH03184356A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32452989A JPH03184356A (en) 1989-12-13 1989-12-13 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32452989A JPH03184356A (en) 1989-12-13 1989-12-13 Lead frame

Publications (1)

Publication Number Publication Date
JPH03184356A true true JPH03184356A (en) 1991-08-12

Family

ID=18166822

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32452989A Pending JPH03184356A (en) 1989-12-13 1989-12-13 Lead frame

Country Status (1)

Country Link
JP (1) JPH03184356A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0550013A2 (en) * 1991-12-27 1993-07-07 Fujitsu Limited Semiconductor device and method of producing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6119157A (en) * 1984-07-06 1986-01-28 Nec Corp Lead frame and semiconductor device using same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6119157A (en) * 1984-07-06 1986-01-28 Nec Corp Lead frame and semiconductor device using same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0550013A2 (en) * 1991-12-27 1993-07-07 Fujitsu Limited Semiconductor device and method of producing the same
EP0550013B1 (en) * 1991-12-27 2000-07-26 Fujitsu Limited Semiconductor device and method of producing the same

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