JPH03183116A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To produce a space for forming a mark on the surface side and to cope with a higher integration density and a multikind aligner by a method wherein one part of a mark for combination use is formed on the rear surface of a wafer. CONSTITUTION:Prior to a process to form an initial element formation region as a wafer process, a mirror-finished wafer 1 is turned over; a photolithographic process and an etching process are executed; only an alignment pattern 2 is formed on the rear 1b. Then, the wafer is turned over as a preparation to form an alignment pattern 3 other than usual patterns for an interconnection, a through hole and the like on the surface side 1a. Then, the alignment pattern 3 other than the usually formed patterns is formed on the surface side 1a. The wafer 1 is moved in the x-direction and the y-direction; the pattern 2 is combined by using a rearside alignment optical system 4; then, the pattern 3 is combined with a mark of a mask with submicron accuracy by using a rear surface-side alignment optical system 5.

Description

[Detailed description of the invention]

[Summary] The purpose of this method is to provide a method that can form a large number of highly accurate alignment patterns in the alignment process, especially in the wafer alignment process.
In a method for manufacturing a semiconductor device, the method includes a step of aligning marks on the mask and marks on the surface of the wafer when forming a pattern using a mask in an exposure apparatus,
A mark formed on a mirror-finished portion of the back surface of the wafer is detected by an optical detection system disposed in the exposure device facing the back surface, and the wafer is aligned in the exposure device. , and then the marks on the mask and the marks on the wafer surface are aligned. [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to an alignment process, particularly a wafer alignment process. In the manufacturing process of semiconductor devices, marks on a mask and marks on a wafer are aligned in order to transfer a pattern on a mask onto a wafer. [Prior art] In conventional alignment, two or more marks are made on the mask and wafer surface, and in order to align them,
Alignment was performed by optically detecting each position. In this case, generally, marks for rough alignment and marks for final alignment are made on the wafer surface. Conventionally, a method is known in which a mark is placed on the back side of the wafer (the side opposite to the exposure surface), and the mark is detected using a microscope or the like placed opposite the back side of the wafer, and then matched with the mark on the mask (Japanese Patent Publication No. 55 -46053). In recent years, as ICs have become more and more multi-layered, the number of photolithography steps and the number of alignment operations has also increased. When making multilayer wiring, it is necessary to make marks on the wafer so that the positions of the patterns in the upper and lower layers can be accurately determined when each layer is exposed. Further, it becomes necessary to perform hybrid exposure of the lower layer and the upper layer at different exposure positions. Therefore, as multilayer wiring, hybrid exposure, etc. are frequently performed, the number of marks continues to increase, and it has become difficult to form a large number of marks on a limited area of a wafer. [Problem to be solved by the invention] In order to deal with such difficulties, conventional methods have been to widen the area in which marks can be formed by: ■ narrowing the spacing between patterns, or ■ reducing the patterns themselves. Countermeasures have been taken to address this problem, but none of them can be called a fundamental solution because (2) causes erroneous detection of marks, and (2) does not allow for significant reduction due to restrictions in the standards of exposure equipment. On the other hand, since no pattern is formed on the back side of the wafer, there seems to be enough area to form a large number of marks by using the back side. However,
As taught by No. 46053, special assumptions are required when using back side marks. That is, a charging microscope (hereinafter referred to as the first microscope) is provided facing the back side of the wafer, and a photoelectron microscope (hereinafter referred to as the second microscope) is provided facing the mask pattern.
When a microscope (referred to as a microscope) is provided, it is assumed that the first and second microscopes are in a fixed positional relationship in advance. However, this positional relationship may gradually shift during use of the equipment, so simply forming marks on the back side of the wafer will not allow direct alignment with the marks on the mask. . Therefore, the first and second microscopes gradually become misaligned during use, and the mask and wafer are aligned without being corrected for the misalignment, which reaches several micrometers, resulting in deterioration of patterning accuracy. There are many risks. The present invention aims to solve the above problems by providing a method that can form a large number of highly accurate alignment patterns. [Means for Solving the Problems] The present invention provides a method for forming a pattern on the surface of a wafer having mirror-finished portions on both sides using a mask in an exposure apparatus. In a semiconductor device manufacturing method that includes a step of aligning marks on the front surface of a wafer, a mark formed on a mirror-finished portion of the back surface of a wafer is detected by an optical detection system disposed in an exposure apparatus facing the back surface. It is characterized in that the wafer is detected and aligned within the exposure apparatus, and then the mark on the mask and the wafer surface are aligned. In the method of the present invention, an alignment pattern or mark is formed on the back side of the wafer before or after forming a pattern on the front side of the wafer as usual; the wafer used has a mirror finish on both sides; the exposure equipment is compatible with the back side mark. This method differs from normal positioning methods in that an alignment optical system is provided. According to the present invention, since the back side of the wafer is also used as a mark or pattern formation location, the area in which alignment patterns can be formed increases dramatically.Since the back side is also mirror-finished, unnecessary scattering from the surroundings is avoided. , there is no possibility of erroneous detection of marks formed on the back surface. In the method of the present invention, the marks on the back side of the wafer are not used for alignment with the marks on the mask, but are used exclusively for rough alignment of the wafer position within the exposure apparatus with relatively rough accuracy. The position of the mark on the backside of the wafer is determined by the distance from the wafer orientation flat, the radius from the wafer center, etc. Here, the position of the mark on the back side of the wafer is ±30 μm, which is mainly caused by misalignment when applying the wafer to sputtering, and the alignment optical system may be misaligned within the device by about ±30 μm during use. A deviation of about 30 μm may occur. On the other hand, the criteria for determining the relative positions of the backside mark and the frontside mark are the distance from the orientation flat, the radius from the wafer center, etc. therefore,
Detection deviation of about ±40 m occurs for front and back marks. In other words, this degree of rough alignment is possible only with marks on the back side of the wafer, and there is no need to compare the mark measurement results on the front and back sides each time alignment is performed.Actually, marks are formed on the back side of the wafer to compensate for the above misalignment. Error 1~
2gm is added. Conventionally, rough alignment and fine alignment were performed using marks on the wafer surface, but in the present invention, by providing rough alignment marks on the back side of the wafer, the total number of marks can be reduced even though the number of front surface marks is the same as before. I can do a lot. Therefore,
It becomes possible to form part of the alignment pattern on the back side, and it becomes easy to arrange many patterns necessary for alignment with the mask on the front side. Furthermore, when exposure is performed using different equipment, the process of performing coarse alignment and then fine alignment in one equipment can be repeated in another equipment, thereby increasing the number of alignment marks on the wafer surface by changing equipment. can be greatly simplified. The marks on the back side of the wafer are usually etched to have a concave and convex shape so that a sharp reflected image can be obtained.The shape of each mark is normal, and it may also be a pattern with components in the X and Y directions. When etching the front surface pattern, the etching liquid flows around to the back surface, resulting in loss of sharpness, so it is preferable to prepare the pattern each time alignment is performed. [Embodiment 1] A case will be described in which a positioning pattern is formed and used for rough alignment in exposure using a stepper. Prior to the process of forming the first element formation region of the size of a sea urchin, the mirror-finished wafer 1 is turned over and subjected to a photolithography process and an etching process to form only the six alignment patterns 2 on the back side 1b. In preparation for forming alignment patterns 3 (FIG. 2) other than normal patterns such as wiring and through holes on 1a, the wafer is turned over. Next, an alignment pattern 3 (FIG. 3) other than the pattern normally formed on the front side 1a is formed, but a rough alignment pattern is not necessary. The following photolithography process is performed using one exposure device. First, as shown in FIG. The alignment optical system 5 performs submicron fine alignment between the pattern 3 and the mark on the mask (not shown) with submicron precision.The pattern formation in this process is only on the front side, and is similar to normal wiring patterns. form. In the case of multilayer wiring, the above steps are repeated.

【Effect of the invention】

As explained above, in the present invention, by forming part of the rough alignment marks on the back side of the wafer, there is room for marks to be formed on the front side, making it possible to achieve higher integration and support a wider variety of exposure equipment. It's now possible.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of alignment using marks on the back side of the wafer, and FIG. 2 is an explanatory diagram of alignment using marks on the front side of the wafer. 1-Wafer 2-Back side alignment pattern, 3-Front side alignment pattern

Claims (1)

[Claims] 1. When forming a pattern on the surface of a wafer having mirror-finished portions on both sides using a mask in an exposure device, the mark on the mask and the mark on the surface of the wafer are A method for manufacturing a semiconductor device including an alignment step, wherein a mark formed on a mirror-finished portion of the back surface of the wafer is detected by an optical detection system disposed in the exposure apparatus facing the back surface. . A method of manufacturing a semiconductor device, characterized in that the wafer is aligned in the exposure apparatus, and then the mark on the mask and the mark on the wafer surface are aligned.