JPH031828B2 - - Google Patents

Info

Publication number
JPH031828B2
JPH031828B2 JP22474483A JP22474483A JPH031828B2 JP H031828 B2 JPH031828 B2 JP H031828B2 JP 22474483 A JP22474483 A JP 22474483A JP 22474483 A JP22474483 A JP 22474483A JP H031828 B2 JPH031828 B2 JP H031828B2
Authority
JP
Japan
Prior art keywords
conductive layer
semiconductor
circuit board
semiconductor element
element chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP22474483A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60116157A (ja
Inventor
Kazuyuki Shimada
Takafumi Kashiwagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58224744A priority Critical patent/JPS60116157A/ja
Publication of JPS60116157A publication Critical patent/JPS60116157A/ja
Publication of JPH031828B2 publication Critical patent/JPH031828B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
    • H01L23/4827Materials
    • H01L23/4828Conductive organic material or pastes, e.g. conductive adhesives, inks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
JP58224744A 1983-11-29 1983-11-29 半導体装置 Granted JPS60116157A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58224744A JPS60116157A (ja) 1983-11-29 1983-11-29 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58224744A JPS60116157A (ja) 1983-11-29 1983-11-29 半導体装置

Publications (2)

Publication Number Publication Date
JPS60116157A JPS60116157A (ja) 1985-06-22
JPH031828B2 true JPH031828B2 (enrdf_load_stackoverflow) 1991-01-11

Family

ID=16818554

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58224744A Granted JPS60116157A (ja) 1983-11-29 1983-11-29 半導体装置

Country Status (1)

Country Link
JP (1) JPS60116157A (enrdf_load_stackoverflow)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6243138A (ja) * 1985-08-21 1987-02-25 Seiko Instr & Electronics Ltd 液晶表示装置のic実装構造
JPS6347942A (ja) * 1986-08-18 1988-02-29 Fuji Xerox Co Ltd 半導体装置
EP0265077A3 (en) * 1986-09-25 1989-03-08 Sheldahl, Inc. An anisotropic adhesive for bonding electrical components
FR2618254B1 (fr) * 1987-07-16 1990-01-05 Thomson Semiconducteurs Procede et structure de prise de contact sur des plots de circuit integre.
JPH01132138A (ja) * 1987-08-13 1989-05-24 Shin Etsu Polymer Co Ltd Icチップの電気的接続方法、樹脂バンプ形成材料および液晶表示器
JP2666299B2 (ja) * 1987-10-08 1997-10-22 ソニー株式会社 固体撮像装置
JPH0234951A (ja) * 1988-04-20 1990-02-05 Seiko Epson Corp 半導体装置の実装構造
JPH02199847A (ja) * 1989-01-27 1990-08-08 Shin Etsu Polymer Co Ltd Icチップの実装方法
US5136365A (en) * 1990-09-27 1992-08-04 Motorola, Inc. Anisotropic conductive adhesive and encapsulant material
KR100218996B1 (ko) * 1995-03-24 1999-09-01 모기 쥰이찌 반도체장치
CA2156941A1 (en) * 1995-08-21 1997-02-22 Jonathan H. Orchard-Webb Method of making electrical connections to integrated circuit
JPH09199506A (ja) * 1995-11-15 1997-07-31 Citizen Watch Co Ltd 半導体素子のバンプ形成方法
US6396712B1 (en) * 1998-02-12 2002-05-28 Rose Research, L.L.C. Method and apparatus for coupling circuit components
JP4761164B2 (ja) * 2006-03-31 2011-08-31 ブラザー工業株式会社 接続構造、および部品搭載基板

Also Published As

Publication number Publication date
JPS60116157A (ja) 1985-06-22

Similar Documents

Publication Publication Date Title
KR100597993B1 (ko) 반도체 패키지용 범프, 그 범프를 적용한 반도체 패키지 및 제조방법
JP2751912B2 (ja) 半導体装置およびその製造方法
KR100886778B1 (ko) 컴플라이언트 전기 단자들을 갖는 장치 및 그 제조 방법들
US5783465A (en) Compliant bump technology
KR100290993B1 (ko) 반도체장치,반도체탑재용배선기판및반도체장치의제조방법
EP1096567A2 (en) BGA package and method for fabricating the same
US6118183A (en) Semiconductor device, manufacturing method thereof, and insulating substrate for same
KR20020018133A (ko) 전자 장치 및 그 제조 방법
JPH031828B2 (enrdf_load_stackoverflow)
KR100206866B1 (ko) 반도체 장치
JP3565090B2 (ja) 半導体装置の製造方法
US6815830B2 (en) Semiconductor device and method of manufacturing the same, circuit board and electronic instrument
JP4729963B2 (ja) 電子部品接続用突起電極とそれを用いた電子部品実装体およびそれらの製造方法
JP2000277649A (ja) 半導体装置及びその製造方法
JP2000243864A (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
JP3162068B2 (ja) 半導体チップの実装方法
JP3560996B2 (ja) 実装用配線板およびこれを用いた実装方法
JP2002064162A (ja) 半導体チップ
JPH0661304A (ja) 半導体素子のボンディング方法
JP2001127194A (ja) フリップチップ型半導体装置及びその製造方法
JPH02280334A (ja) 半導体装置及びその製造方法
JPH033384B2 (enrdf_load_stackoverflow)
JP3841135B2 (ja) 半導体装置、回路基板及び電子機器
JP3283947B2 (ja) 半導体装置およびその製造方法
JPS6297340A (ja) Icチツプの電気的接続方法