JPH0317651U - - Google Patents

Info

Publication number
JPH0317651U
JPH0317651U JP7856689U JP7856689U JPH0317651U JP H0317651 U JPH0317651 U JP H0317651U JP 7856689 U JP7856689 U JP 7856689U JP 7856689 U JP7856689 U JP 7856689U JP H0317651 U JPH0317651 U JP H0317651U
Authority
JP
Japan
Prior art keywords
wiring layer
pair
flop
flip
constituted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7856689U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7856689U priority Critical patent/JPH0317651U/ja
Publication of JPH0317651U publication Critical patent/JPH0317651U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Memories (AREA)
JP7856689U 1989-07-03 1989-07-03 Pending JPH0317651U (US06633600-20031014-M00021.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7856689U JPH0317651U (US06633600-20031014-M00021.png) 1989-07-03 1989-07-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7856689U JPH0317651U (US06633600-20031014-M00021.png) 1989-07-03 1989-07-03

Publications (1)

Publication Number Publication Date
JPH0317651U true JPH0317651U (US06633600-20031014-M00021.png) 1991-02-21

Family

ID=31621955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7856689U Pending JPH0317651U (US06633600-20031014-M00021.png) 1989-07-03 1989-07-03

Country Status (1)

Country Link
JP (1) JPH0317651U (US06633600-20031014-M00021.png)

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