JPH03145382A - Contour correction circuit - Google Patents

Abstract

PURPOSE:To use a delay element in common for both contour emphasis and speed modulation by utilizing a differentiating signal and a quadratic differentiating signal of an input signal for a speed modulation signal and a contour correction signal respectively. CONSTITUTION:The circuit is provided with a delay element 44 whose output side has a high impedance to reflect a signal, a buffer means TR1 outputting a video signal to the said delay element 44, a 1st comparator circuit 40 outputting a quadratic differentiating signal (d) for contour emphasis from two signals if input and output sides of the delay element 44 and a 2nd comparator circuit 42 outputting a differentiating signal (g) for scanning speed modulation from two signals being a signal at the output of the delay element 44 and the video signal. Then the 1st comparator circuit 40 outputs the quadratic differentiating signal (d) for contour emphasis and the 2nd comparator circuit 42 outputs the quadratic differentiating signal (g) for scanning speed modulation. Thus, the contour correction circuit is realized, which uses the delay element 44 for the contour emphasis circuit and the scanning speed modulation circuit.

Description

[Detailed description of the invention] (b) Industrial application field The present invention relates to a contour correction circuit.

(b) Prior art Figure 4 shows an example of a well-known contour enhancement circuit, and Figure 5 shows an example of a well-known contour enhancement circuit.
The waveform diagram is shown in the figure.

In Figure 4, (10) is the video signal input terminal, (12)
(14) is a delay element, (16) is an adder, (18) is -
(20) is an adder, (22) is a variable amplifier, (
24) is an adder.

When a video signal having the shape shown in FIG. 4(b) is input to the video signal input terminal (10), this video signal is sent to the delay element (12).
It is delayed by 2τ at step (14) and added to the original video signal at adder (16). Then, the output is a single multiplier (18
), resulting in a signal as shown in FIG. 5(c). Furthermore, this output (cl) and the video signal delayed by τ are sent to an adder (
20) to output a second-order differential signal for contour enhancement as shown in FIG. 5d. This second-order differential signal (d) is amplified to an appropriate amount by a variable amplifier (22), and added to the delayed image 1@ signal by an adder (24) to produce an edge-enhanced signal as shown in Figure 5 (el). Obtain video signal.

In FIGS. 4 and 5, the outline enhancement by the video signal itself has been explained, but the speed modulation circuit will be explained with reference to FIGS. 6 and 7. This speed modulation circuit is also described in, for example, Utility Model Publication No. 19407 (1988) (H04N3/32),
No. 3-992 (IO4N5/44), etc., and is well known.

In FIG. 6, (26) is a video signal input terminal. (
28) is a delay circuit, (30) is an inverting amplifier, (32) is an adder, (34) is a variable amplifier, and (36) is a speed modulation signal output terminal.

When a video signal as shown in Figure 7 is input to the video signal input terminal (26), this video signal is processed by the delay element (28) to
The signal is delayed and becomes a signal as shown in FIG. 7(c).

This signal (C) and the original signal passed through the inverting amplifier (30) are added by an adder (32) to obtain a first-order differential signal (d) for scanning speed modulation.

Incidentally, large-screen televisions employ both an edge enhancement circuit and a scanning speed modulation circuit as described above.

(C) Problems to be Solved by the Invention The present invention provides an edge correction circuit that serves as both an edge enhancement circuit and a delay element of a scanning speed modulation circuit.

(d) Means for Solving the Problems The present invention provides a contour correction circuit that enhances the contour of a video signal and performs contour correction by varying the scanning speed of an electron beam. A reflecting delay element (44), a buffer means (TRY) for outputting a video signal to the delay element (44), and a delay element (44) that outputs a video signal to the delay element (44).
4), which outputs a second-order differential signal for edge enhancement from the two signals on the input side and the output side, and from the two signals on the output side of the delay element (44) and the video signal. Second comparison circuit that outputs the first-order differential signal for scanning speed modulation ¥8 (
421.

(e) Operation In the present invention, the first comparison circuit III (401) outputs a second-order differential signal for edge enhancement, and the second comparison circuit (42) outputs a first-order differential signal for scanning speed modulation.

(f) Embodiment An embodiment of the present invention will be described with reference to FIGS. 1 and 2. In Figure 1, (38) is the video signal input terminal, (
TR0) to (TR4) are buffer transistors whose collectors are grounded. (4G) (42) is a comparison circuit consisting of a differential amplifier. (R1) to (R6) are resistances, (v
Rl) is a variable resistor for contour enhancement adjustment, and (VB2) is a variable resistor for scanning speed modulation adjustment. (44) is a delay element with a delay amount, and the characteristic impedance is Z.

(Z=R1). (46) is the addition point. (47
) is a buffer amplifier. (48) is an output terminal for an edge-enhanced video signal, and +50 is an output terminal for a scanning speed modulation signal.

The above operation will be explained. Moreover, an example of the waveform of each part is shown in FIG.

A video signal (a) is input to the video signal input terminal (38). This video signal (a) is output from a transistor (TR1), a resistor (R+), and a delay element (44). The output (c) of this delay element (44) is f(10τ) ... (1) Here, the output side of the delay element (44) is a buffer consisting of a differential amplifier and a comparator circuit ( 40) (42)
(Since it is input to 471, it is totally reflected because it is high impedance. Therefore, the signal (b) at the input side of the delay element (44) is 7-ff (t) ff (t + 2τ) 1 ・... (2
). In the comparison circuit (40), the signals (b) (c
), the output signal (d) is A
τ)]... (3). In addition, A is a comparison circuit (40
) is determined by the amount of amplification.

Another comparator circuit (42) obtains the difference between the signals (c) and (ao) so that its output signal (g) is A'[f(t
+τ)-f(1)] ... (4), and f (
t) is a −th order differential waveform. Furthermore, if this equation (4) is F (t), then F(t)−FCt+τ)2^'(
f(t+τ)-f(t)-f(t+2τ)+fft
+τ)1 =^' [2f(t+r)-f(t)-f(t+2rl
l... (5) From the definition of F(t), equation (5) is the second-order differential waveform of f(tl.Here, by comparing equations (3) and (5), equation (3), That is, it can be seen that the output of the comparator circuit (40) has a second-order differential waveform of f(t3).

This signal (dl is the τ delay signal (c) and the resistor (R2)
, and are added via the variable resistor (Vllll), the contour enhancement is adjusted by varying this variable resistor (VR+).

Furthermore, the degree of scanning speed modulation is adjusted by varying the variable resistor (VR21).

As mentioned above, both the first-order differential signal (g) and second-order differential signal (d) of the input signal are obtained from the circuit shown in FIG. 1, and can be used as a velocity modulation signal and a contour correction signal, respectively.

FIG. 3 shows another embodiment of the invention. This example is a type that switches the frequency characteristics of contour correction to match the input source, and in place of the delay element (44) in Fig. 1, another delay element (+44') with a different delay amount and a delay element are added. A switch (SWl) (Si2) is added to select the switch. This allows contour enhancement, velocity modulation, and both peak frequencies to be switched simultaneously.

(G) Effects of the Invention As described above, according to the present invention, the delay element (44) can be used for both contour enhancement and speed modulation.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a waveform diagram of each part thereof. FIG. 3 is a diagram showing another embodiment of the present invention. FIGS. 4 and 5 are diagrams showing conventional edge enhancement circuits. 6 and 7 are diagrams showing conventional scanning speed modulation circuits. (44)...Delay element, (TR11...Buffer transistor (buffer means), (40)...Comparison circuit (first comparison circuit), (42)...
...Comparison circuit (second comparison circuit).

Claims (1)

[Claims] (1) In a contour correction circuit that enhances the contour of a video signal and also performs contour correction by varying the scanning speed of the electron beam, a delay element (
44), a buffer means (TR_1) for outputting the video signal to the delay element (44), and outputting a second-order differential signal for edge enhancement from two signals on the input side and output side of the delay element (44). The first comparison circuit (4
0); and a second comparison circuit (42) that outputs a first-order differential signal for scanning speed modulation from two signals: the output side of the delay element (44) and the video signal. correction circuit.