JPH03137735A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPH03137735A
JPH03137735A JP1277516A JP27751689A JPH03137735A JP H03137735 A JPH03137735 A JP H03137735A JP 1277516 A JP1277516 A JP 1277516A JP 27751689 A JP27751689 A JP 27751689A JP H03137735 A JPH03137735 A JP H03137735A
Authority
JP
Japan
Prior art keywords
output
input
buffers
circuit
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1277516A
Other languages
Japanese (ja)
Inventor
Koji Kawamoto
Yukihiko Shimazu
Tomoaki Fujiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1277516A priority Critical patent/JPH03137735A/en
Publication of JPH03137735A publication Critical patent/JPH03137735A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce an influence degree as a whole integrated circuit and to facilitate the evaluation of the performance of output buffers by inputting plural signals controlling the state of the output buffers and the selection operation of a selection circuit through an input/output circuit.
CONSTITUTION: For measuring the electric characteristic of the output buffers in the input/output circuit 100, the control signals are inputted from an external part by using an input terminal which does not come to a hindrance to the operation of a signal processing circuit 200 while it is rest among plural input terminals 101 when a system is set in an initial state. Namely, an ENABLE signal controlling the state of an output buffer with output control function 109, a DATA signal being the input signal of an output buffer 108 and the output buffer 109 and a PINTEST signal controlling the selection operation of the selection circuit 400 are inputted from the external part. Since the logical levels of the input signals of the buffers 108 and 109 and the logical level of an enable signal can directly be decided in the external part, the performance of the buffers 108 and 109 single body can easily be evaluated without being influenced as the whole integrated circuit.
COPYRIGHT: (C)1991,JPO&Japio
JP1277516A 1989-10-24 1989-10-24 Semiconductor integrated circuit Pending JPH03137735A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1277516A JPH03137735A (en) 1989-10-24 1989-10-24 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1277516A JPH03137735A (en) 1989-10-24 1989-10-24 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH03137735A true JPH03137735A (en) 1991-06-12

Family

ID=17584687

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1277516A Pending JPH03137735A (en) 1989-10-24 1989-10-24 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH03137735A (en)

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