JPH03121568A - Automatic optimization system for logic symbol size - Google Patents

Abstract

PURPOSE:To decrease logic design man-hours by registering basic types by logic symbol type names in a logic symbol library and drawing logic symbols optimized according to the number of signal lines to the logic symbols. CONSTITUTION:A logic diagram drawing program 3 inputs a logic file 1 and the logic symbol library 2 to prepare and output a logic diagram 4. Logic symbols are registered in the library 2 so that terminals to which signal lines are connected are classified by functions and put together in one terminal by the functions and the minimized logic symbols where the terminals are put together is regarded as a basic type. Then when the logic drawing 4 is prepared the basic size of a logic symbol extracted from the library 2 is compared with a necessary symbol size value found from the number of parameters corresponding to the number of signal lines connected to the logic symbol and a larger value is shown as logic symbol size on the logic diagram 4. Consequently, the logic symbol of optimized size can be displayed.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an automatic logic diagram creation method, and in particular, automatic optimization of logic symbol size to obtain an appropriate logic symbol size from the number of signal lines connected to a logic symbol. Regarding the method.

[Conventional technology]

In the conventional automatic logic diagram creation method, all logic symbols are registered as a library, and any logic symbol is selected from the library and used. Therefore, if the number of signal lines to be connected differs, it is necessary to prepare all menus for the different portions on the library, or to register the logical symbols in the library with the maximum value as a single signal connection. Furthermore, related inventions of this type include:

For example, Japanese Patent Application Laid-Open No. 62-217369 can be cited.

[Problem to be solved by the invention]

The above conventional technology increases the number of man-hours for library maintenance in the process before logic diagram creation, the number of man-hours for selecting logic symbol menus during logic design, and does not take into consideration the density on the logic drawing, increasing the number of man-hours for logic design. Alternatively, there was a problem with the increase in the number of logic diagram pages and the visibility.

The present invention aims to reduce the number of man-hours required for logic design by automatically optimizing the logic symbol size, and aims to improve the density of logic drawings to obtain easy-to-read logic drawings. It is.

[Means to solve the problem]

In order to achieve the above object, a basic model of a logic symbol size, which is multiplexed and expressed for each function of a terminal of a logic symbol, is registered in a library as a logic symbol. Extract the corresponding logic symbol from the library registered when creating the logic diagram, find the logic symbol size required to connect the signal lines from the number of signal lines connected to the logic symbol, and compare it with the logic symbol size extracted from the library. do,
By using the larger value, a logical symbol of an appropriate size is displayed in the logical diagram.

[Effect]

For logic symbols, the terminals that connect signal lines are divided by function, and each function is consolidated into one terminal.

Provide parameters for each terminal function. A logic symbol obtained by consolidating and minimizing these terminals is registered in the library as a basic form.

When creating a logic diagram, compare the basic size of the logic symbol extracted from the library with the value calculated from the number of parameters corresponding to the number of signal lines connected to the logic symbol, and select the larger one. The value of is shown as a logical symbol size on a logical diagram. As a result, from the basic form of the logic symbol registered in the library, the tf size is optimized for the number of signal lines to be connected.
71 physical symbols can be displayed.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing a logical diagram creation system of the present invention,
1 is the logic file, which contains the logic symbol type name, signal name,
Logical net information consisting of parameters is described. 2
is a logical symbol library in which the basic forms of symbol shapes, sizes, and parameters are registered for each logical symbol type name.

3 is a logic diagram creation program which inputs the logic file 1 and logic symbol library 2, optimizes the logic symbol size, creates and outputs a logic diagram 4.

FIG. 2 is a diagram showing logic symbols, where lO is a basic logic symbol registered in the logic symbol library, and 11 is logic diagram drawing logic optimized according to the number of signal lines connected based on the basic logic symbol 10. symbol, 12 is a signal line, 13 is a basic parameter, 14 is a divided signal line, 15
is a division parameter, and the logical symbol size is optimized based on the logic net information described in the logic file 1, and the division signal line 14 and division parameter 15 are drawn.

FIG. 3 is a flowchart showing the process of optimizing the logical symbol size, in which 100 is a process for creating a logical symbol size table, in which logical symbols are registered in the logical symbol library 2 from the logical symbol type name described in the logical file 1. The symbol size is registered in the table. 101 calculates the appropriate value of the logical symbol size from the number of division parameters of the logical symbol obtained from the logical file 1. 10
Step 2 compares the value of the logical symbol size registered in the logical symbol size table with the appropriate value of the logical symbol size determined in step 101. , 103 takes the larger value based on the comparison result in 102, updates the logical symbol size table, and sets it as the logical symbol size at the time of drawing the logical diagram.

According to this embodiment, it is possible to reduce the number of steps required for logic design by manually specifying the logic symbol size, and furthermore, it is possible to improve the logic drawing density and obtain an easy-to-read drawing. can be shown. It is also possible to specify the logic symbol size manually, but if you specify a logic symbol smaller than the logic symbol size calculated from the number of signal lines to be connected, an error will be displayed to prevent inappropriate logic symbol size. designation can be prevented.

〔Effect of the invention〕

According to the present invention, basic types for each logic symbol type name are registered in a logic symbol library, and logical symbols are drawn optimized according to the number of signal lines to the logic symbol, thereby allowing logic design. This has the effect of reducing the number of man-hours.

In addition, the optimized logic symbol size can improve the density of the logic drawings and provide an easy-to-read logic drawing.

[Brief explanation of drawings]

FIG. 1 is an overall diagram of a logic diagram creation system according to an embodiment of the present invention, FIG. 2 is a logic symbol diagram, and FIG. 3 is a flowchart of logic symbol size optimization processing. 1...Logic file, 2...Logic symbol library, 3...Logic diagram creation program, 4...Logic diagram, 10...Basic logic symbol, 11...Logic diagram drawing logic symbol, 12 ...Signal line, 13...Basic parameter, 14...Divided signal line, 15...Divided parameter, No.

Claims (1)

[Claims] 1. In a logic diagram automatic creation method that extracts logic symbols from a logic symbol library and automatically creates a logic drawing based on a functional diagram, extracts a logic symbol that becomes a basic model from the logic symbol library and connects it to the logic symbol. 1. An automatic logical symbol size optimization method, characterized in that the logic symbol size required for connection of the signal lines is determined by separating terminals of the logic symbol according to the number of signal lines to be connected.