JPH03116836A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to avoid effectively a peeling of an oxidation-resisting film from a thin oxide film by a method wherein an ion-implantation is performed before the formation of a thick oxide film and simultaneously with a heat treatment at the time of the formation of the thick oxide film subsequent to the ion-implantation, a diffusion of the impurity from an ion-implanted region and an acticating treatment of the impurity are simultaneously performed. CONSTITUTION:An implantation of impurity ions is performed in a selected part of the surface of a semiconductor substrate 5 to form an impurity implanted region 20. After that, when an oxidation treatment for forming anew a thin SiO2 base oxide film 31 on the surface of the substrate 5 is performed, an oxide film part 31a, which is thick compared to other part 316, is formed on the region 20 by an accelerating oxidation. Then, an oxidation-resisting film 7, that is, a silicon nitride SiN film, is formed on this film 31. Then, with this film 7 patterned, a window 8 and a recessed part 21 are formed. Moreover, a thick oxide film 9 is selectively formed in the removed part of this film 7, that is, in the window 8, by a thermal oxidation and simultaneously with the formation of this film 9, a diffusion of the impurity from the region 20 and an activating treatment of the impurity are performed to form an impurity introduced region 11 of a deep depth. Thereby, the silicon nitride film which is used as the film 7 can be avoided from peeling from the film 31.

Description

Detailed Description of the Invention (Industrial Field of Application) The present invention relates to a method of manufacturing a semiconductor device, and in particular a process of forming a thick oxide film in a selected portion, and a step of forming a deep oxide film in the selected portion by ion implantation. The present invention relates to a method of manufacturing a semiconductor device including a step of forming an impurity-introduced region.

[Summary of the invention]

The present invention relates to a method for manufacturing a semiconductor device, which includes a step of forming a thick oxide film in a selected portion, and a step of forming a deep impurity-introduced region by ion implantation in the selected portion. In the manufacturing method, there is a step of implanting impurity ions into a selected portion of the surface of the semiconductor substrate, and then a thermal oxidation treatment is performed to form a new oxide film on the surface of the semiconductor substrate. A step of forming a base oxide film in which the oxide film is thicker than other parts by accelerated oxidation, a step of forming an oxidation-resistant film on the base oxide film, and a step of patterning at least the above-mentioned oxidation-resistant film. Then, a thick oxide film is formed by thermal oxidation in a limited area in the removed portion of the oxidation-resistant film, and at the same time, impurities from the ion-implanted region are diffused and activated to form a deep impurity-introduced region. In this way, the diffusion of ion-implanted impurities and the heat treatment for activation treatment and the heat treatment for forming a thick oxide film are combined, simplifying the number of manufacturing steps and shortening the time. To prevent peeling (peeling) of an oxidation-resistant film and to reliably form a thick oxide film selectively in a predetermined portion.

(Prior Art) In semiconductor devices, particularly semiconductor integrated circuits, a thick oxide insulating layer is selectively formed on a silicon semiconductor substrate by thermal oxidation to separate circuit elements or regions within a circuit element. In some cases, the separation may be performed by

An example of this case will be explained with reference to FIG.

In this example, I I L (Integrated
First, as shown in FIG. 6A, a high n-type impurity concentration is applied to a selected position on the main surface of a p-type semiconductor silicon substrate (1). Embedded area (2)
is formed by a diffusion method or the like, and a p-type impurity is diffused to another selected position, for example, a position surrounding the region (2), to form an isolation region (3).

Next, as shown in FIG. 6B, an n-type silicon semiconductor layer (4) is epitaxially grown on the main surface of the substrate (1) having these buried regions (2), isolation regions (3), etc. A semiconductor substrate (5) is constructed.

Next, the surface of this semiconductor substrate (5), that is, the semiconductor layer (4)
) is thermally oxidized to form a 5i02 base oxide film (6) that will become a pad layer over the entire surface, and on top of this a silicon Ny1-Lite 5iN (mainly 5i3N
An oxidation-resistant film (7) consisting of n) is formed by CVD (chemical vapor deposition) or the like, and then patterned as shown in FIG. 6C to finally form a thick oxide film. In this example, a window (8) is formed in the field part other than the part where the circuit element is formed and a part of the circuit element, and a recess is also formed in the semiconductor layer (4), and then an oxidation-resistant film is formed. Using the film (7) as a mask, a thermal oxidation process is performed through the window (8), that is, inside the recessed portion of the semiconductor layer (4) to form a thick oxide film (9), so-called I, acos.

Thereafter, as shown in Figure 6, an ion implantation mask (for example, a photoresist ion implantation mask) (
10) is formed by a well-known optical photographic technique. Then, ions of an n-type impurity, such as phosphorus (P), are implanted through a window formed in this ion implantation mask (10), and then heat treatment is performed to diffuse and activate the implanted impurity, and the buried region (2) is A so-called plug-in region (11) is formed with a deep impurity introduction region (11).

Then, as shown in Figure 6, photoresist 1-(1
0) is removed, a surface insulating layer (12) of SiO□ etc. is deposited by surface thermal oxidation or CVD, a window is formed in this, and p-type impurities are diffused through the window to form an IIL. Injection area (13
) and a base region (14), further forming a base region (
14) For example, a collector region (15) is formed by selectively diffusing n-type impurities thereon. In this way, the n
The mold region is an emitter region (16), and the buried region (2) and the plug-in region, that is, the deep impurity doped region (11) connected thereto, are the emitter electrode extraction region. Electrode windows are formed in the insulating layers on the base region (14), the collector region (15), and the injection region (13) to form emitter electrodes (17E), base electrodes (17B), and collector electrodes (17C), respectively. The injection electrodes (171) are each formed by ohmic adhesion.

In such a configuration, if the depth of the impurity introduction region, that is, the plug-in region (11) is not selected to reach the buried region (2) properly, for example, due to regions (13), (16), and (14) in IIL, A problem arises in the current amplification factor or IIL propagation delay time in the pnp transistor.

In addition, not only when configuring the above-mentioned IIL, but also in the above-mentioned structure, the injection region (13)
For example, area (15) (14) (16)
npn with emitter, base and collector respectively
) When configuring a transistor, there are inconveniences such as a decrease in VCE. In order to avoid such inconvenience and ensure that the impurity-introduced region (11) reaches the buried region (2), the dose of ion implantation to form this region (11) must be increased, and this It is conceivable that the temperature and duration of the diffusion process for forming the region (11) may be increased, but increasing the dose poses problems in terms of constraints from the ion implantation equipment and productivity.
In addition, heat treatment for the ion implantation region at a high temperature and for a long time may require higher temperature and longer heat treatment if the thickness of the semiconductor layer (4) is increased to ensure the emitter-collector breakdown voltage vcto. Ensuring the depth of the region (11) and increasing the thickness of the semiconductor layer are not mutually exclusive, and heat treatment at high temperatures and for a long period of time causes disadvantages such as a significant increase in working time and difficulty in workability.

In addition, in order to avoid such drawbacks, we focused on the fact that the formation of the thick oxide film (9) described above, that is, LOGO5 requires heat treatment at a high temperature for a long period of time, for example, at 1000°C for 1360 minutes. It is conceivable that the diffusion and activation heat treatment for formation also serve as the formation of this oxide film (9).

An example of this case will be explained with reference to FIG.

In FIG. 7, parts corresponding to those in FIG. 6 are designated by the same reference numerals, and redundant explanation will be omitted.

In this case as well, the same steps as in FIGS. 6A and 6B are taken to deposit a thin 5iOz layer on the surface of the semiconductor substrate (5), that is, on the semiconductor layer (4), which will serve as a buffer layer for ion implantation, as shown in FIG. 7A. After forming the oxide film (18), an ion implantation mask (10) having a window (19) on the part where the region (11) will finally be formed is formed by depositing, for example, a photoresist, for example, an n-type resist. An impurity implantation region (20) is formed under the window (19) by ion-implanting an impurity, for example, phosphorus. Thereafter, as shown in FIG. 7B, an ion implantation mask (10
) is removed, and an oxidation-resistant film (7) made of SiN is deposited on the thin SiO□ oxide film (18) by CVD or the like.

Then, as shown in FIG. 7C, the oxidation-resistant film (7) and 5iO
The Z oxide film (18) is patterned by selective etching as required, and finally the semiconductor layer (4) is thermally oxidized using the thick film (7) as a mask to form a thick oxide film (9). At the same time, a deep impurity implantation region (11) is formed by performing diffusion and activation processing from the ion implantation region (20). Thereafter, as shown in FIG. 7, the electrodes (
17E) (17B) (17c) (171) are ohmically deposited to form an IIL.

In the case of such a method, as mentioned above, in forming the thick oxide film (9), heat treatment is performed at a high temperature and for a long time, for example, at 1000'C for 360 minutes. ), and it is possible to avoid special heat treatment for diffusion and activation treatment to form the region (11). Therefore, it is possible to improve workability and therefore productivity.

However, in the case of such a method, when forming the thick oxide film (9), the oxidation-resistant film (5iN (SiJ4) film (7) as a mask is used as a mask for forming the thick oxide film (9).
It has been found that there are cases in which a pattern of thick oxide film (9) cannot be formed with high precision due to peeling off from 18), and this causes a problem that leads to the generation of defective products.

[Problem to be solved by the invention]

The present invention relates to a method for manufacturing semiconductor devices such as various semiconductor integrated circuits including the above-mentioned IIL, and particularly to the formation of a thick oxide film,
In a manufacturing method for obtaining a semiconductor integrated circuit with ion-implanted impurity diffusion and activation treatment for forming a deep impurity-introduced region (If), thermal oxidation treatment and ion-implanted impurity diffusion and activation treatment are performed. In order to simplify manufacturing and improve mass productivity, we aim to selectively form a thick oxide film in a predetermined pattern with high precision while reliably avoiding peeling of the oxidation-resistant mask, that is, LOGO5. to enable the formation of

This peeling occurs because the edge of the SiN oxidation-resistant film is lifted by the formation of a thick oxide film, ie, LOGO3, and a stress-induced crank enters the part where the adhesion has deteriorated due to the damage sustained during the previous ion implantation. This is thought to be caused by.

As is clear from the measurement results of the relationship between ion implantation dose and peeling (%) in Figure 8, this peeling increases as the ion implantation dose increases. 6 out of 02 at 900″C
A SiO2 base film (6) is formed by heat treatment for 0 minutes, and a 1000-layer thick SiN oxidation-resistant film is formed on top of this. The percentage of blocks in which the SiN film (7) peeled off (hereinafter referred to as the "peeling rate") was measured for the block shown in FIG. It's big.

[Means for Solving the Problems] The present invention includes a step of forming a thick oxide film in a selected portion, and a step of forming a deep impurity-introduced region by ion implantation in the selected portion. A method for manufacturing a semiconductor device includes a step of implanting impurity ions into a selected portion of the surface of a semiconductor substrate (5) to form an impurity implantation region (20) as shown in FIG. As shown in Figure 1C, an impurity ion implantation region (20) is ion-implanted by performing oxidation treatment to form a new thin oxide film (31) on the surface of the semiconductor substrate (5).
The above shows the oxidized hydrogen forming step in which an oxide film part (31a) is formed thicker than the other part (31b) by accelerated oxidation, and as shown in the first figure, an oxidation-resistant film is formed on this oxidized JIW (31). A step of forming a film (7), that is, a silicon nitride SiN film, a step of patterning this oxidation-resistant film (7) at least as shown in FIG. 1F, and a step of patterning this oxidation-resistant film (7) as shown in FIG. A thick oxide film (9) is selectively formed in the removed portion of the oxide film, that is, within the window (8), by thermal oxidation, and at the same time, impurities are diffused and activated from the impurity ion implantation region (20) to form a deep oxide film (9). A target semiconductor device is obtained through a step of forming a deep impurity-introduced region (11).

[Function] In the method of the present invention, the SiN oxidation-resistant film (7) is formed on the newly formed oxide film (31) after impurity ion implantation. The silicon nitride film as the oxidized film (7) was more likely to be prevented from peeling off than the SiO□ oxide film (31). The reason is not clear, but for example, Figure 1A
When a SiO□ film was formed as a buffer layer during ion implantation to form the ion implantation region (20) shown in , this was removed and an oxidation-resistant film (with force applied) was placed on the newly formed oxide film (31). When forming the ions, distortion caused during ion implantation is eliminated, and when using this method, a thick oxide film (31a) is formed by accelerated oxidation on the ion implantation region (20), so that the ions are It is thought that it is possible to more effectively buffer the effects of strain generated during implantation on the interface with the oxidation-resistant film (7), thereby avoiding its peeling.

〔Example〕

An example of a method for manufacturing a semiconductor device according to the present invention will be explained with reference to FIG. In this example, 2L is constructed, and in this case as well, as shown in FIG.
A buried region (2) of a second conductivity type, for example, an n-type in this example, is formed with a high impurity concentration by selective diffusion on its main surface, and a buried region (2) of a first conductivity type, in this example, is formed around it with a high impurity concentration. After forming the p-type isolation region (3) by selective diffusion etc.
1) A semiconductor substrate (5) is formed by epitaxially growing a silicon semiconductor layer (4) of a second conductivity type, in this example, an n-type. Then, on the surface of this semiconductor substrate (5), that is, the surface of the semiconductor layer (4), a SiO□ buffer layer (32) of, for example, 150 to 300 layers is formed, for example, 90 layers, as necessary.
It is formed by thermal oxidation treatment for 20 to 60 minutes in a 0'C, Oz atmosphere. Then, an ion implantation mask (10) is formed by applying, for example, photoresist on this, and this is exposed and developed to form a window (19) in the area where ion implantation is to be performed.
to be drilled. Then, through the window (I9) of this ion implantation mask (10), phosphorus ions P' are applied at a voltage of, for example, 70 KeV.
The impurity implanted region (20
) to form.

As shown in Figure B, the ion implantation mask (10) is removed and the 5i02 buffer layer (32) is removed as described above.
If it is provided, it is removed by etching.

Next, as shown in FIG.
It is formed by performing heat treatment for about 60 minutes in 2 atmospheres.

In this case, on the impurity implantation region (20), the oxide film portion (31a) which is j7 thicker than the base oxide film (31) due to the acceleration effect.
occurs. It is already a known phenomenon that such accelerated oxidation occurs, and it occurs not only when the implanted impurity is phosphorus P, but also when As, Sb, B, etc. are used as the implanted impurity. In this case, the thickness of the thick oxide film portion (31a) is 300 to 2000, for example 800.

Next, as shown in the first diagram, 5iN (mainly Si3N
SiN oxidation-resistant film deposited to a thickness of 1000 mm (7)
form.

As shown in FIG.
), a window (8) and a recess (2) are respectively formed in the portion where a thick oxide film is to be finally formed. This 5t
Patterning for the Jn oxidation-resistant mask (7) is formed by selective etching using photolithography, for example, and using this oxidation-resistant mask (7) as a mask, the underlying 5i02 oxide film (31) can be etched. , and further RIE (reactive ion etching)
The recess (21) for the silicon semiconductor layer (4)
can perform the formation. However, this recess (2
When forming 1), for example, by plasma etching, a Sin mask with a thickness of about 3,000, for example, is formed on the oxidation-resistant mask (7) by the CVD method, and this is used as a mask for photo-etching. A predetermined pattern is formed by lithography, and using this as a mask, the recesses (21) are etched. The recess (21) is formed on a portion surrounded by the isolation region (3) and on a portion facing the buried region (2).

As shown in FIG. 1F, a thick oxide film (9) is formed so as to bury the fourth part (21) by heat treatment at 1000°C for 1360 minutes or at 1050°C in an atmosphere of 02/1200, and impurities are removed. Impurities in the implanted region (20) are thermally diffused and activated. In this case, the semiconductor layer (
By appropriately selecting the thickness of 4) in consideration of the penetration of the buried region (2) into the semiconductor layer (4), the depth at which the impurity introduced region (11) reaches the buried region (2) can be adjusted. Can be formed.

Then, if a thick SiO□ mask layer exists (not shown), it is removed, and the oxidation-resistant mask (7) is removed as necessary, and the semiconductor layer (4) is removed as shown in FIG. 1G. An n-type region surrounded by a thick oxide film (9) is used as an emitter region (16), and a second conductivity type, that is, an n-type impurity, for example, is selectively diffused onto this to form an injection region (13) and a base region. (14) is formed, and a collector region (15) is further formed by selectively diffusing second conductivity type n-type impurities at a high concentration onto the base region (14). Then, electrode windows are formed in the insulating layer on the impurity introduction region (11), the base region (14), the collector region (15), and the injection region (13), respectively, to form an emitter electrode (17E), a base electrode (17B), Collector electrode (17C), injection electrode (17C)
1) are applied ohmically to achieve the desired IIL.
Obtain a semiconductor device.

Figure 2 shows the ion implantation dose and oxidation treatment time for forming the base oxide film (31) when forming the impurity implantation region (20), and the implantation of the base oxide film (31) formed in this way. Part (31a) above area (20)
The peeling rate measurement results for each sample 1 to 17 are shown in which the thickness ta in the area (31b), the thickness jb in the other part (31b), and the thickness t of the SiN oxidation-resistant film (7) are changed. show. In the table of Figure 2, each sample 1 to 12
1. During ocos oxidation, ion implantation diffusion, and activation heat treatment, the SiO□ oxide film, for example, the buffer layer (32) explained in FIG. 1A, is removed and a new SiO□ base film (31) is formed. This is the case.

Samples 13 to 17 were obtained by first depositing a 5i02 base oxide film as explained in FIG. Peeling has occurred in both cases. On the other hand, in the case where the SiO□ base oxide film (7) is newly formed prior to LOGOS oxidation, diffusion of implanted impurity ions, and heat treatment for activation, peeling is avoided. However, in this case, the 5i02 base film (31
) is the portion (31a) above the impurity implantation region (20).
The larger the thickness of the SiN film, the more likely it is that peeling of the SiN film (7) will occur. In this case, the base oxide film (31
) Peeling can be prevented by increasing the height of the portion (31a). For example, if this dose is I
When it is about 1016 cm-”, the base layer is 5 iOz (3
The film thickness of 1a) is required to be 790 Å or more. Furthermore, if the thickness L of the SiN film (7) becomes large, it is likely to peel off, so it is desirable to reduce the thickness L to the minimum necessary. When increasing the thickness, for example, the 5i02 base film (31) is 1500 Å thick.
Peeling can be avoided by increasing the thickness below.

Figure 3 shows the relationship between the thickness of the SiO□ base film (31) and the peeling rate based on these samples. When the thickness of the SiN oxidation-resistant film (7) is 1000, the curve (32) shows the dose amount IXl016cm-2
When the number of SiN oxidation-resistant films (7) is 800, the curve (33) shows the dose amount of 4 x 10110l5'' and S
If 800 people use the iN oxidation-resistant film (7), the curve (34
) is the case where the dose is 4XIO"cm-2 and the SiN oxidation-resistant film (force is 1000 people), and the curve (35) is when the dose is 4XIO"cm-2 and the SiN oxidation-resistant film is 650 people. As is clear from the graphs, the peeling rate increases as the thickness of the SiO□ base film decreases.
It shows the dependence of the peeling rate on the thickness of the oxidation-resistant film.Curve (41) shows the dose when the dose is 1 x 10110 l6", and curve (42) shows the dose when the dose is 4 x 10"cm".
2, it is clear from this that as the thickness of the SiN oxidation-resistant film increases, the peeling rate increases, and as the dose increases, the peeling rate also increases.

As described above, in the present invention, after impurity ion implantation, the 5in2 oxide film is removed, a new SiO□ base film is formed, and an SiN oxidation-resistant film is formed on this. □This method takes advantage of the fact that when oxidizing the base film, the thickness L□ in this part (31a) becomes larger than in other parts due to the acceleration effect on the impurity implanted region by ion implantation, as shown in Fig. 5. shows the relationship of the 5i02 base oxide film to the oxidation time using the ion implantation concentration as a parameter, and the curve (5
1) is on the part where ion implantation is not done, that is, on the oxide film (
31) shows the film thickness at the part (31b), and the curve (5
2) (53) (54) and (55) respectively indicate the ion implantation dose I
XIO”cm-” 4 XIO”cm-” lX
10''cm-2, it can be seen that as the concentration increases, the speed-increasing effect increases.

In the above example, the case where the implanted impurity was phosphorus P was explained, but other impurities other than phosphorus P, such as B, As,
As mentioned above, it is known that Sb etc. have such a speed-up effect, and the present invention can be applied to the case where a deep impurity-introduced region is formed by implanting impurity ions other than Rarin. .

Furthermore, although the above-described example illustrates a case in which the first conductivity type is a p-type and the second conductivity type is an n-type, a configuration in which these conductivity types are opposite to each other may also be used.

In addition, in the above example, the present invention is applied to obtain an IIL semiconductor device, but in addition, various so-called plug-in regions, that is, deep impurity-introduced regions by deep ion implantation, are formed in various types of bipolar transistors, etc. The present invention can also be applied to a method of manufacturing a semiconductor device that includes a step of forming a thick thermal oxide film.

Furthermore, in the above example, the LOGOS is a so-called single LOGOS formed by one oxidation, but for example, after performing the first stage LOGOS, the oxide film formed by this is etched away and the recessed portion is formed. The present invention can also be applied to the case where a thick oxide film is formed by forming a second LOGOS in this recess.

〔Effect of the invention〕

As described above, according to the present invention, the formation of a thick oxide film (L
We performed ion implantation before the OGOS), and performed the impurity diffusion and activation treatment of the ion implanted region at the same time as the subsequent heat treatment when forming the thick oxide film, so that the thermal oxidation performed over a long period of time and at high temperatures can provide a sufficiently deep layer. A deep impurity introduced region (11) can be formed, and heat treatment for diffusion and activation treatment for forming this impurity introduced region (11) and heat treatment for forming a thick oxide film are performed in the same process. By doing so, it is possible to shorten working time, improve work efficiency, and thus improve productivity. In addition, despite this, since the silicon nitride SiN film as an oxidation-resistant mask (peeling due to force) can be effectively avoided, it is possible to obtain the intended semiconductor device with a high yield and high reliability.

[Brief explanation of drawings]

FIGS. 1A to 1G are cross-sectional views of each step of an example of the method for manufacturing a semiconductor device according to the present invention, FIG. 2 is a front view showing the measurement results of the peeling rate of the SiN film, and FIG. Figure 4 is a measurement curve diagram showing the relationship between thickness and SiN peeling rate.
A measurement curve diagram showing the dependence of iN peeling rate on the thickness of the SiN oxidation-resistant film. Figure 5 shows the relationship between SiO□ oxidation time and SiO□
Measurement curve diagram showing the relationship between film thickness and ion implantation dose,
6 and 7 are manufacturing process diagrams for each side of the conventional method, respectively, and FIG. 8 is a measurement curve diagram showing the peeling rate with respect to the dose of ion implantation. (5) is a semiconductor substrate, (7) is an oxidation-resistant film, (9) is a thick oxide film, (10) is an ion implantation mask, (11) is an impurity implantation region, (20) is an impurity implantation region, (31) is the underlying oxide film, and (31a) is its thick oxidized portion. Agent Hidemori Matsukuma SiN Thickness (A) Acid Ihi v1 Darkness (Minutes) Figure 5 Conventional Power 5 ( Figure Conventional Power I Water Production Process Date Figure 7)

Claims (1)

[Scope of Claim] A method for manufacturing a semiconductor device, comprising the steps of forming a thick oxide film in a selected portion, and forming a deep impurity-introduced region by ion implantation in the selected portion, comprising: A step of implanting impurity ions into a selected part of the surface of the substrate, followed by thermal oxidation treatment to form a new oxide film on the surface of the semiconductor substrate, and accelerated oxidation on the region where the ions were implanted. a step of forming a base oxide film in which an oxide film is thicker than other parts by forming a base oxide film, a step of forming an oxidation-resistant film on the base oxide film, a step of patterning at least the oxidation-resistant film, and a step of patterning at least the oxidation-resistant film; Using the oxide film as a mask, a thick oxide film is formed by thermal oxidation in the removed area, and at the same time, impurities are diffused from the ion-implanted region and activated to form a deep impurity-introduced region. 1. A method of manufacturing a semiconductor device, the method comprising: forming a semiconductor device.