JPH03113851U - - Google Patents
Info
- Publication number
- JPH03113851U JPH03113851U JP2328990U JP2328990U JPH03113851U JP H03113851 U JPH03113851 U JP H03113851U JP 2328990 U JP2328990 U JP 2328990U JP 2328990 U JP2328990 U JP 2328990U JP H03113851 U JPH03113851 U JP H03113851U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- rom
- circuit chip
- package
- built
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
Description
第１図は、この考案の一実施例に係るＲＯＭ内
蔵集積回路装置の外観斜視図、第２図は、同ＲＯ
Ｍ内蔵集積回路装置にアダプタを装着した状態を
示す斜視図、第３図は、同ＲＯＭ内蔵集積回路装
置の中央縦断面図、第４図は、従来のＲＯＭ内蔵
集積回路装置の外観斜視図である。
２……パツケージ、２ｄ……パツケージ上面、
３……ＩＣチツプ、４……リード、７……書き換
え用端子。
FIG. 1 is an external perspective view of an integrated circuit device with a built-in ROM according to an embodiment of the invention, and FIG.
FIG. 3 is a perspective view showing a state in which an adapter is attached to an integrated circuit device with a built-in ROM, FIG. 3 is a central vertical cross-sectional view of the same integrated circuit device with a built-in ROM, and FIG. be. 2...Package cage, 2d...Package cage top surface,
3...IC chip, 4...Lead, 7...Rewriting terminal.
Claims (1)
チツプを封止するパツケージと、前記集積回路チ
ツプに接続され、パツケージ外部に引き出される
リードとを備えてなるＲＯＭ内蔵集積回路装置に
おいて、 前記集積回路チツプに接続される、前記ＲＯＭ
の書き換え用の端子を、前記パツケージ上面に配
備したことを特徴とするＲＯＭ内蔵集積回路装置
。[Claims for Utility Model Registration] An integrated circuit with a built-in ROM, comprising an integrated circuit chip including a ROM, a package that seals the integrated circuit chip, and a lead connected to the integrated circuit chip and led out to the outside of the package. In the apparatus, the ROM is connected to the integrated circuit chip.
An integrated circuit device with a built-in ROM, characterized in that a terminal for rewriting the ROM is provided on the top surface of the package.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990023289U JP2509579Y2 (en) | 1990-03-08 | 1990-03-08 | Integrated circuit device with built-in ROM |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990023289U JP2509579Y2 (en) | 1990-03-08 | 1990-03-08 | Integrated circuit device with built-in ROM |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03113851U true JPH03113851U (en) | 1991-11-21 |
| JP2509579Y2 JP2509579Y2 (en) | 1996-09-04 |
Family
ID=31526279
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990023289U Expired - Lifetime JP2509579Y2 (en) | 1990-03-08 | 1990-03-08 | Integrated circuit device with built-in ROM |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2509579Y2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6278761U (en) * | 1985-11-06 | 1987-05-20 | ||
| JPS63147831U (en) * | 1987-03-18 | 1988-09-29 | ||
| JPH0186247U (en) * | 1987-11-28 | 1989-06-07 |
-
1990
- 1990-03-08 JP JP1990023289U patent/JP2509579Y2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6278761U (en) * | 1985-11-06 | 1987-05-20 | ||
| JPS63147831U (en) * | 1987-03-18 | 1988-09-29 | ||
| JPH0186247U (en) * | 1987-11-28 | 1989-06-07 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2509579Y2 (en) | 1996-09-04 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |