JPH03110864U - - Google Patents
Info
- Publication number
- JPH03110864U JPH03110864U JP1975090U JP1975090U JPH03110864U JP H03110864 U JPH03110864 U JP H03110864U JP 1975090 U JP1975090 U JP 1975090U JP 1975090 U JP1975090 U JP 1975090U JP H03110864 U JPH03110864 U JP H03110864U
- Authority
- JP
- Japan
- Prior art keywords
- led chips
- led lamp
- led
- circuit board
- approximately
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1975090U JPH03110864U (US06265458-20010724-C00056.png) | 1990-02-28 | 1990-02-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1975090U JPH03110864U (US06265458-20010724-C00056.png) | 1990-02-28 | 1990-02-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03110864U true JPH03110864U (US06265458-20010724-C00056.png) | 1991-11-13 |
Family
ID=31522854
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1975090U Pending JPH03110864U (US06265458-20010724-C00056.png) | 1990-02-28 | 1990-02-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03110864U (US06265458-20010724-C00056.png) |
-
1990
- 1990-02-28 JP JP1975090U patent/JPH03110864U/ja active Pending