JPH03101475U - - Google Patents
Info
- Publication number
- JPH03101475U JPH03101475U JP897390U JP897390U JPH03101475U JP H03101475 U JPH03101475 U JP H03101475U JP 897390 U JP897390 U JP 897390U JP 897390 U JP897390 U JP 897390U JP H03101475 U JPH03101475 U JP H03101475U
- Authority
- JP
- Japan
- Prior art keywords
- converter
- input
- reference voltage
- circuit
- digital oscilloscope
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000035945 sensitivity Effects 0.000 claims 2
- 238000006243 chemical reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Description
第１図は本考案の一実施例の回路構成図、第２
図は従来例を示すブロツク図。
１……入力接栓、２……アツテネータ、５……
ＤＡ変換器、８……フラツシユ型ＡＤ変換器。
Figure 1 is a circuit configuration diagram of one embodiment of the present invention, Figure 2 is a circuit diagram of an embodiment of the present invention.
The figure is a block diagram showing a conventional example. 1...Input connector, 2...Attenuator, 5...
DA converter, 8...Flash type AD converter.
Claims (1)
て、フラツシユＡＤ変換器の基準電圧を微調整す
ることにより、変換感度を可変する手段と、該Ａ
Ｄ変換器の中心電圧のずれをキヤンセルする比率
で該ＡＤ変換器駆動増幅器の基準電圧にトラツキ
ングしたオフセツト電圧を該ＡＤ変換器の前段回
路に加える手段を有することを特徴としたデイジ
タルオシロスコープの感度微調整回路。 ２ デイジタルオシロスコープにおいて、１つの
入力を信号入力とした、少なくとも２つの入力を
もつ加算増幅器とその出力を入力とするフラツシ
ユ型ＡＤ変換器と前記ＡＤ変換器の基準電圧を制
御するＤＡ変換器と前記加算器の他方の入力端に
前記加算増幅器の２倍分の前記ＡＤ変換器の基準
電圧なる電圧を加える回路網とにより構成される
ことを特徴とするデイジタルオシロスコープの感
度微調整回路。[Claims for Utility Model Registration] 1. In the input circuit of a digital oscilloscope, means for varying conversion sensitivity by finely adjusting the reference voltage of a flash AD converter;
A digital oscilloscope sensitivity finer comprising means for applying an offset voltage tracking a reference voltage of an AD converter driving amplifier to a circuit at the front stage of the AD converter at a rate that cancels a shift in the center voltage of the D converter. Adjustment circuit. 2. In a digital oscilloscope, a summing amplifier having at least two inputs with one input as a signal input, a flash type AD converter having the output thereof as an input, a DA converter controlling a reference voltage of the AD converter, and the above. A circuit network for applying a reference voltage of the AD converter twice that of the summing amplifier to the other input terminal of the adder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP897390U JPH03101475U (en) | 1990-02-02 | 1990-02-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP897390U JPH03101475U (en) | 1990-02-02 | 1990-02-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03101475U true JPH03101475U (en) | 1991-10-23 |
Family
ID=31512583
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP897390U Pending JPH03101475U (en) | 1990-02-02 | 1990-02-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03101475U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6885364B1 (en) | 1999-09-11 | 2005-04-26 | Sony Computer Entertainment Inc. | Control apparatus and outputting signal adjusting method therefor |
-
1990
- 1990-02-02 JP JP897390U patent/JPH03101475U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6885364B1 (en) | 1999-09-11 | 2005-04-26 | Sony Computer Entertainment Inc. | Control apparatus and outputting signal adjusting method therefor |
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