JPH0290683A - Thin film transistor and manufacture thereof - Google Patents

Thin film transistor and manufacture thereof

Info

Publication number
JPH0290683A
JPH0290683A JP24281088A JP24281088A JPH0290683A JP H0290683 A JPH0290683 A JP H0290683A JP 24281088 A JP24281088 A JP 24281088A JP 24281088 A JP24281088 A JP 24281088A JP H0290683 A JPH0290683 A JP H0290683A
Authority
JP
Japan
Prior art keywords
formed
region
impurity
gt
lt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24281088A
Inventor
Kazumasa Hasegawa
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP24281088A priority Critical patent/JPH0290683A/en
Publication of JPH0290683A publication Critical patent/JPH0290683A/en
Application status is Pending legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile

Abstract

PURPOSE:To enable the reduction of impurity mixing processes in number, an offset region in area, and a thin film transistor of this design in cost by a method wherein a channel region and an offset region are formed of the same impurity in the same concentration. CONSTITUTION:A semiconductor thin film 102 is formed on a substrate 101, and a gate insulating film 103 and a gate electrode 104 are formed. P<+>-regions or n<+>-regions are formed through an ion implantation method (I/I method) and made to serve as a source and a drain region 106 and 107. In this process, photoresist or the like is used as a mask material. A channel region and an offset region 108 are not doped with a p-type or an n-type conductivity type impurity after the forming process of the gate electrode 104 has been completed. Therefore, it is enough that an impurity mixing process is performed once at a minimum. Provided that p-type or n-type conductivity impurity contained in the channel region and the offset region 108 is 10<15>cm<-3> or less in concentration, the drain region 107 is remarkably improved in breakdown strength and the offset region 108 is largely reduced in size when a semiconductor thin film 102 is formed of polycrystalline Si.
JP24281088A 1988-09-28 1988-09-28 Thin film transistor and manufacture thereof Pending JPH0290683A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24281088A JPH0290683A (en) 1988-09-28 1988-09-28 Thin film transistor and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24281088A JPH0290683A (en) 1988-09-28 1988-09-28 Thin film transistor and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH0290683A true JPH0290683A (en) 1990-03-30

Family

ID=17094624

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24281088A Pending JPH0290683A (en) 1988-09-28 1988-09-28 Thin film transistor and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH0290683A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5112764A (en) * 1990-09-04 1992-05-12 North American Philips Corporation Method for the fabrication of low leakage polysilicon thin film transistors
EP0513590A2 (en) * 1991-05-08 1992-11-19 Seiko Epson Corporation Thin-film transistor and method for manufacturing it
US6013928A (en) * 1991-08-23 2000-01-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having interlayer insulating film and method for forming the same
US6236064B1 (en) * 1991-03-15 2001-05-22 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US6713783B1 (en) 1991-03-15 2004-03-30 Semiconductor Energy Laboratory Co., Ltd. Compensating electro-optical device including thin film transistors
US6984551B2 (en) 1993-01-18 2006-01-10 Semiconductor Energy Laboratory Co., Ltd. MIS semiconductor device and method of fabricating the same

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5112764A (en) * 1990-09-04 1992-05-12 North American Philips Corporation Method for the fabrication of low leakage polysilicon thin film transistors
US6236064B1 (en) * 1991-03-15 2001-05-22 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US6713783B1 (en) 1991-03-15 2004-03-30 Semiconductor Energy Laboratory Co., Ltd. Compensating electro-optical device including thin film transistors
US5583366A (en) * 1991-05-08 1996-12-10 Seiko Epson Corporation Active matrix panel
US5814539A (en) * 1991-05-08 1998-09-29 Seiko Epson Corporation Method of manufacturing an active matrix panel
US6136625A (en) * 1991-05-08 2000-10-24 Seiko Epson Corporation Method of manufacturing an active matrix panel
EP0513590A2 (en) * 1991-05-08 1992-11-19 Seiko Epson Corporation Thin-film transistor and method for manufacturing it
US5561075A (en) * 1991-05-08 1996-10-01 Seiko Epson Corporation Method of manufacturing an active matrix panel
US6013928A (en) * 1991-08-23 2000-01-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having interlayer insulating film and method for forming the same
US6984551B2 (en) 1993-01-18 2006-01-10 Semiconductor Energy Laboratory Co., Ltd. MIS semiconductor device and method of fabricating the same
US7351624B2 (en) 1993-01-18 2008-04-01 Semiconductor Energy Laboratory Co., Ltd. MIS semiconductor device and method of fabricating the same

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