JPH0282585A - Superconducting wiring - Google Patents

Superconducting wiring

Info

Publication number
JPH0282585A
JPH0282585A JP63234575A JP23457588A JPH0282585A JP H0282585 A JPH0282585 A JP H0282585A JP 63234575 A JP63234575 A JP 63234575A JP 23457588 A JP23457588 A JP 23457588A JP H0282585 A JPH0282585 A JP H0282585A
Authority
JP
Japan
Prior art keywords
film
superconducting
high temperature
substrate
epitaxial growth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63234575A
Other languages
Japanese (ja)
Inventor
Yukio Osaka
大坂 之雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Science and Technology Agency
Original Assignee
Research Development Corp of Japan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Research Development Corp of Japan filed Critical Research Development Corp of Japan
Priority to JP63234575A priority Critical patent/JPH0282585A/en
Publication of JPH0282585A publication Critical patent/JPH0282585A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To facilitate epitaxial growth of a high temperature superconducting film on an Si substrate by a method wherein, after a (Y2O3)x(ZrO2)1-x film (x<1) is builtup on the Si substrate by epitaxial growth, the high temperature superconducting film is builtup by epitaxial growth and formed into an electrode pattern. CONSTITUTION:A (Y2O3)x(ZrO2)1-x film (YSZ film) can be formed on an Si substrate by epitaxial growth performed by an electron beam evaporation method, a sol-gel method or the like. Moreover, a high temperature superconducting film can be builtup on the YSZ film by epitaxial growth. (x) of the (Y2O3)x(ZrO2)1-x YSZ film may be a value within a range of 0-1, more preferably 0-0.3. In order to form the electrode pattern, in the case of, for instance, SOI, the YSZ film is builtup on the Si substrate by epitaxial growth and an active device such as a transistor and the electrode pattern composed of the high temperature superconducting film can be formed on the YSZ film.

Description

【発明の詳細な説明】 (技術分野) この発明は、超電導配線に関するものである。[Detailed description of the invention] (Technical field) The present invention relates to superconducting wiring.

さらに詳しくは、この発明は、液体窒素温度において動
作する超LSIに有用なSi基板上の超電導配線とその
形成方法、さらにはこれを有する超LSIに関するもの
である。
More specifically, the present invention relates to a superconducting wiring on a Si substrate useful for an ultra-LSI operating at liquid nitrogen temperature, a method for forming the same, and an ultra-LSI having the same.

(背景技術) 近年、Si[LSIの発展は著しく、これにともなって
高密度に集積した超LSIの電極形成も増々難しくなっ
てきている。たとえば16MDRAMで試作されたMO
Sのデザインルールは0.5μmであり、今後さらに微
細化される傾向にあり、電極パターンもこれにより著し
く微細化されてきている。
(Background Art) In recent years, the development of Si[LSI] has been remarkable, and along with this, it has become increasingly difficult to form electrodes for highly densely integrated VLSIs. For example, MO prototyped with 16MDRAM
The design rule for S is 0.5 μm, and there is a trend toward further miniaturization in the future, and electrode patterns are also becoming significantly finer.

このような傾向は、電極抵抗の問題を所在化させており
、電極パターンが細くなる程この抵抗は増大し、印加電
圧の低下と、信号の伝播速度の遅れが発生し、大きな問
題となっている。このため、電極材料の低抵抗化は重要
な技術課題になっている。
This trend has led to the problem of electrode resistance, and as the electrode pattern becomes thinner, this resistance increases, causing a drop in applied voltage and a delay in signal propagation speed, which has become a major problem. There is. Therefore, reducing the resistance of electrode materials has become an important technical issue.

一方、1個の・チップに膨大な数の半導体を集積化する
につれて、超LSIにおいては放熱が動作速度を決定す
る重要な要因となってきている。また、Si材料固有の
移動度によって、MOSあるいはバイポーラトランジス
タの動作速度も室温では限界に来ており、冷却効果も含
めて77にの液体窒素温度で動作するSi超LSIの検
討が進められてもいる。実際、液体窒素温度動作のSt
−MOSトランジスタの動作速度(ゲート遅延時間)は
、室温に比較して10@程度の高速化が可能であり、次
世代の超高速LSIの一つとして注目されている。
On the other hand, as a huge number of semiconductors are integrated into a single chip, heat dissipation has become an important factor in determining the operating speed of VLSIs. Furthermore, due to the inherent mobility of Si materials, the operating speed of MOS or bipolar transistors has reached its limit at room temperature, and even though studies are underway on Si ultra-LSIs that can operate at liquid nitrogen temperatures of 77 degrees, including cooling effects. There is. In fact, St of liquid nitrogen temperature operation
-The operating speed (gate delay time) of a MOS transistor can be increased by about 10 @ compared to room temperature, and it is attracting attention as one of the next generation ultra-high speed LSIs.

しかしながら、問題は、77にの液体窒素温度において
安定で、かつ低抵抗な電極材料が見出され、しかも実際
に製造する技術として確立されていないことである。
However, the problem is that an electrode material that is stable and has low resistance at a liquid nitrogen temperature of 77°C has not been found, yet the technology for actually manufacturing it has not been established.

このような課題を解決するものとして近年注目されてい
る超電導材料がある。
There are superconducting materials that have been attracting attention in recent years as a solution to these problems.

Bat−y yF CuO7−a 、B i 5rCa
CuO1TISrCaCuOなどの高温超電導体は、電
気抵抗がゼロになる臨界温度が100〜125にと高く
、77にの液体窒素温度で使用するに充分なマージンを
持つものが開発されてきてもいる。
Bat-y yF CuO7-a, B i 5rCa
High-temperature superconductors such as CuO1TISrCaCuO have a critical temperature at which electrical resistance becomes zero, as high as 100 to 125°C, and some have been developed that have a sufficient margin for use at liquid nitrogen temperatures of 77°C.

しかしながら、これらの超電導材料は、Si基板上に薄
膜形成しなとしても、Slがこの超電導膜中に拡散し、
超電導を示さないという重大な欠陥があった。たとえば
、Si基板上に高温超電導膜を形成する方法として、S
lの拡散を抑制するためのバリア層の3102またはP
tMを介在させることが検討されているが、いまだに充
分な高温超電導膜の特性が得られていないのが実状であ
る。
However, in these superconducting materials, even if a thin film is not formed on a Si substrate, Sl diffuses into the superconducting film,
The major defect was that it did not exhibit superconductivity. For example, as a method for forming a high-temperature superconducting film on a Si substrate, S
3102 or P in the barrier layer to suppress the diffusion of l.
Although interposition of tM has been considered, the reality is that sufficient characteristics of a high-temperature superconducting film have not yet been obtained.

また、良好な超電導、特性を実現するためにはエピタキ
シャル成長が不可欠であることが見出されているが、実
際に単結晶をエピタキシャル成長させる技術が確立され
てもいない。
Furthermore, although it has been discovered that epitaxial growth is essential for achieving good superconductivity and characteristics, the technology for actually epitaxially growing a single crystal has not yet been established.

(発明の目的) この発明は、以上の通りの事情に鑑みてなされたもので
あり、従来不可能であったSi基板上への高温超を導膜
のエピタキシャル成長を可能とした新しい超電導配線と
その形成方法を、さらにはこの配線を有する液体窒素温
度で動作するr4LSIを提供することを目的としてい
る。
(Purpose of the Invention) This invention was made in view of the above-mentioned circumstances, and provides a new superconducting wiring and its superconducting wiring that makes it possible to epitaxially grow a conductive film on a Si substrate at a high temperature, which was previously impossible. The purpose of the present invention is to provide a fabrication method, and furthermore, to provide an r4LSI having this wiring and operating at liquid nitrogen temperature.

(発明の開示) この発明は、上記の目的を実現するものとして、液体窒
素温度で動作する超LSIにおいて、Si基板上に(Y
20s ) 、(ZrO2)、−3膜(x<1>をエピ
タキシャル成長させた後に高温超電導膜をエピタキシャ
ル成長させ、電極パターン形状に加工してなることを特
徴とする超電導配線、もしくは、液体窒素温度で動作す
る超LSIにおいて、Si基板上にLSIの能動素子を
形成し、(Y20s ) K  (ZrOt ) r−
t Jli (x<1 )をエピタキシャル成長させ、
電極接続部に穴明けを行った後に高温超電導膜をエピタ
キシャル成長させて4&極パターン形状に加工してなる
ことを特徴とする超電導配線を提供するものである。
(Disclosure of the Invention) To achieve the above object, the present invention provides a super LSI that operates at liquid nitrogen temperature.
20s), (ZrO2), -3 film (x<1>) is epitaxially grown, then a high temperature superconducting film is epitaxially grown and processed into an electrode pattern shape, or a superconducting wiring that operates at liquid nitrogen temperature. In the VLSI, active elements of the LSI are formed on a Si substrate, and (Y20s) K (ZrOt) r-
t Jli (x<1) is grown epitaxially,
The present invention provides a superconducting wiring characterized by forming a hole in an electrode connection portion, then epitaxially growing a high-temperature superconducting film and processing it into a 4&pole pattern shape.

この発明におけるSi基板上への (Y20s )−(Zro、)、−3膜1%(YSZI
jI)の形成は、電子ビーム蒸着法、あるいはゾル−ゲ
ル法等によってエピタキシャル成長により行うことがで
きる。しかも、このYSZp上には、高温超電導膜のエ
ピタキシャル成長が可能である。
(Y20s)-(Zro, ), -3 film 1% (YSZI) on the Si substrate in this invention.
jI) can be formed by epitaxial growth using an electron beam evaporation method, a sol-gel method, or the like. Furthermore, it is possible to epitaxially grow a high temperature superconducting film on this YSZp.

ここで用いている (Y20s ) x (Z r 02 ) t−*のY
B2膜としては、XがO〜1以下の値とすることができ
、特に好ましくは、x=O〜0.3とする。
The Y of (Y20s) x (Z r 02 ) t-* used here
For the B2 film, X can be set to a value of O to 1 or less, and particularly preferably, x=O to 0.3.

?liC[1パターンを形成する方法としては、膜v4
造に対応して、公知の手続を採用することができる。
? liC [The method for forming one pattern is film v4
Depending on the structure, publicly known procedures can be adopted.

たとえばSolの場合には、Sl基板上にYB2膜をエ
ピタキシャル成長させ、その上にトランジスタなどの能
動素子と高温超電導膜による電極パターンを形成するこ
とができる。
For example, in the case of Sol, a YB2 film can be epitaxially grown on a Sl substrate, and an electrode pattern made of active elements such as transistors and a high temperature superconducting film can be formed thereon.

また、通常の超LSIに適用する場合には、エピタキシ
ャル成長させたYB2膜を眉間絶縁膜として用い、電極
接続部のみを穴明は加工した後に、その上部に高温超電
導膜をエピタキシャル成長させ、電極パターン形状に加
工する多層配線も実現可能である。
In addition, when applied to normal VLSI, an epitaxially grown YB2 film is used as a glabella insulating film, and after drilling holes only in the electrode connection part, a high temperature superconducting film is epitaxially grown on top of it, and the electrode pattern shape is It is also possible to realize multilayer wiring that can be processed to

使用する高温超電導体としては、Ba−YCu−0,B
1−8r−Ca−Cu−0,Tl5r−Ca−Cu−0
等の適宜なものとすることができる。
The high temperature superconductors used include Ba-YCu-0, B
1-8r-Ca-Cu-0, Tl5r-Ca-Cu-0
It can be set as appropriate.

以下の実施例では、YB2膜と高温超電導膜の形成につ
いて主として説明する。もちろん、この発明は、以下の
例によって何ら限定されるものではない。
In the following examples, the formation of a YB2 film and a high temperature superconducting film will be mainly explained. Of course, this invention is not limited in any way by the following examples.

実施例1 <100)方位を持つSt基板上に、基板温度s o 
o ’c、酸素分圧6.7x 10−’Pa、製膜速度
5nn/n+inの条件で電子ビーム蒸着により(Y2
0s ) x  (Z r 02 ) l−にのYSZ
llfiを100〜200 rv成長させた。
Example 1 On a St substrate with <100) orientation, the substrate temperature s o
(Y2
0s ) x (Z r 02 ) YSZ in l-
llfi was grown for 100-200 rv.

ここで、Xを0〜0.4まで変化させ、YB2膜の結晶
性を評価した。第1図は得られなYSZMのX線回折パ
ターンであり、各々、 (a)  x=0.04 (b)  x = 0.09 の場合のものを示している。(a)においては、斜方晶
系YSZ(200)面のピークが強く出ているが、わず
かに斜方晶系YSZ (002)が存在している。(b
)においては、立方晶系YSz(200)面のピークの
みがあられれている。
Here, the crystallinity of the YB2 film was evaluated by varying X from 0 to 0.4. FIG. 1 shows the X-ray diffraction patterns of the obtained YSZM, respectively, for (a) x=0.04 and (b) x=0.09. In (a), the peak of orthorhombic system YSZ (200) plane appears strongly, but orthorhombic system YSZ (002) plane is slightly present. (b
), only the peak of the cubic YSz (200) plane is obscured.

表1には、Xを変化させた時のYSz膜の格子定数とS
t基板の格子定数とのミスマツチ率を示している。Xが
0〜0.3の範囲で、Si基板との格子定数のミスマツ
チ率は1%以下となっている。
Table 1 shows the lattice constant and S of the YSz film when X is changed.
It shows the mismatch rate with the lattice constant of the t-substrate. When X is in the range of 0 to 0.3, the lattice constant mismatch rate with the Si substrate is 1% or less.

このことから、x=O〜0.3のYSZMが良好なエピ
タキシャル成長を実現していることがわかる。
This shows that YSZM with x=O~0.3 achieves good epitaxial growth.

表  1 格子定数  ミスマツチ率 一因一  −一一工呈上 a 5.x    −0.2 c 5.16     0.8 9(立方晶)     5.13     0.220
 ()t    )         5.16   
       0.830 ()t    )    
     5.18           1.2(注
) 5.43 (S i格子定数)Xr「/1.5=5
.12(A) Y2O,含有率 −」uLX上− 4(斜方晶) 実施例2 実施例1と同様にして、St (100)基板上に、(
Y20s ) x  (Z r O2) +−xのx=
O1すなわちZrO2膜を100r+n+厚にエピタキ
シャル成長させた。
Table 1 Lattice constant Mismatch rate factor 1-11 Process a 5. x -0.2 c 5.16 0.8 9 (cubic crystal) 5.13 0.220
()t) 5.16
0.830 ()t)
5.18 1.2 (Note) 5.43 (S i lattice constant) Xr "/1.5=5
.. 12 (A) Y2O, content rate - on uLX - 4 (orthorhombic) Example 2 In the same manner as in Example 1, (
Y20s) x (Z r O2) +−x x=
An O1 or ZrO2 film was epitaxially grown to a thickness of 100r+n+.

次いで、B az yc u s 07−aのターゲッ
トを用いてA r +60%02の雰囲気ガス中、0.
67〜4、OPaの圧力で、基板温度600〜700℃
においてスパッタリングを行い、高温超電導膜を形成し
た。
Next, using a target of Baz yc us 07-a, 0.0.
67~4, OPa pressure, substrate temperature 600~700℃
Sputtering was performed to form a high-temperature superconducting film.

ターゲットのサイズは3インチφであり、rf電力15
0W、製膜速度2nl/n+inとした。
Target size is 3 inches φ and rf power 15
0W and a film forming rate of 2 nl/n+in.

得られた超電導膜の厚みは100〜300 n1Mであ
った。第2図は、得られた膜のXR回折パターンを示し
ている。(OOJ)のピークしか観測されていない。こ
れにより、面に垂直にC軸が配向した斜方晶系B at
 YCu s 07−# !IAのエピタキシャル成長
が確認できる。
The thickness of the obtained superconducting film was 100 to 300 n1M. FIG. 2 shows the XR diffraction pattern of the obtained film. Only the peak of (OOJ) was observed. This results in an orthorhombic system B at with the C axis oriented perpendicular to the plane.
YCus 07-#! Epitaxial growth of IA can be confirmed.

第3図は、この超電導膜の臨界温度(Tc)特性を示し
たものである。88にで電気抵抗が減少しはじめ、82
にで完全に電気抵抗がゼロとなる良好な超電導特性を示
した。
FIG. 3 shows the critical temperature (Tc) characteristics of this superconducting film. At 88, the electrical resistance begins to decrease, and at 82
It showed good superconducting properties with completely zero electrical resistance.

実施例3 実施例2と同様にしてB t 5rCaCuOの超電導
膜を形成し、T c = 98〜80にの超電導臨界温
度特性を得る。
Example 3 A superconducting film of B t 5rCaCuO is formed in the same manner as in Example 2, and a superconducting critical temperature characteristic of T c =98 to 80 is obtained.

実施例4 実施例1のYSZ膜としてx =0.05のエピタキシ
ャル膜を形成し、実施例2と同様にしてBa2Y Cu
 107−#超電導膜を形成する。
Example 4 An epitaxial film with x = 0.05 was formed as the YSZ film of Example 1, and Ba2Y Cu was formed in the same manner as Example 2.
107-# Form a superconducting film.

同様にして良好な特性が得られる。Good characteristics can be obtained in the same manner.

実施例5 実施例1または2に従って、Sl基板上にYSZ膜をエ
ピタキシャル成長させ、その上に、トランジスタ等の動
作素子と高温超電導膜による電極パターンを形成する。
Example 5 According to Example 1 or 2, a YSZ film is epitaxially grown on a Sl substrate, and thereon, operating elements such as transistors and electrode patterns made of high temperature superconducting films are formed.

これによりSol構造のflLsIを得る。As a result, flLsI of Sol structure is obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この発明におけるSl (100)基板上の
YSZ膜のX線回折パターンを示した回折図である。 第2図は、S l <100)/Zr0t上に形成した
B as YCu s 07−a膜のX線回折パターン
を示した回折図である。第3図は、この臨界温度特性を
示した相関図である。
FIG. 1 is a diffraction diagram showing an X-ray diffraction pattern of a YSZ film on a Sl (100) substrate in the present invention. FIG. 2 is a diffraction diagram showing an X-ray diffraction pattern of a B as YCu s 07-a film formed on S l <100)/Zr0t. FIG. 3 is a correlation diagram showing this critical temperature characteristic.

Claims (8)

【特許請求の範囲】[Claims] (1)液体窒素温度で動作する超LSIにおいて、Si
基板上に (Y_2O_3)_x(ZrO_2)_1_−_x膜(
X<1)をエピタキシャル成長させた後に高温超電導膜
をエピタキシャル成長させ、電極パターン形状に加工し
てなることを特徴とする超電導配線。
(1) In a VLSI that operates at liquid nitrogen temperature, Si
A (Y_2O_3)_x(ZrO_2)_1_-_x film (
A superconducting wiring characterized in that it is formed by epitaxially growing a high temperature superconducting film (
(2)請求項(1)記載の方法からなる超電導配線の形
成方法。
(2) A method for forming superconducting wiring comprising the method according to claim (1).
(3)液体窒素温度で動作する超LSIにおいて、Si
基板上にLSIの能動素子を形成し、(Y_2O_3)
_x(ZrO_2)_1_−_x膜(x<1)をエピタ
キシャル成長させ、電極接続部に穴明けを行つた後に高
温超電導膜をエピタキシャル成長させて電極パターン形
状に加工してなることを特徴とする超電導配線。
(3) In VLSI operating at liquid nitrogen temperature, Si
Form an LSI active element on the substrate, (Y_2O_3)
A superconducting wiring characterized by epitaxially growing a _x(ZrO_2)_1_-_x film (x<1), drilling a hole in an electrode connection part, and then epitaxially growing a high temperature superconducting film and processing it into an electrode pattern shape.
(4)請求項(3)記載の方法からなる超電導配線の形
成方法。
(4) A method for forming a superconducting interconnection comprising the method according to claim (3).
(5)請求項(1)または(3)を有する液体窒素温度
で動作する超LSI。
(5) A VLSI operating at liquid nitrogen temperature having claim (1) or (3).
(6)高温超電導膜がBa−Y−Cu、Bi−Sr−C
a−Cu、またはTi−Sr−Ca−Cu系の酸化物で
ある請求項(1)、(2)、(3)、(4)または(5
)記載の超電導配線、その形成方法、または超LSI。
(6) High temperature superconducting film is Ba-Y-Cu, Bi-Sr-C
Claims (1), (2), (3), (4) or (5) which are a-Cu or Ti-Sr-Ca-Cu based oxides.
), the superconducting wiring, the method for forming the same, or the super LSI.
(7)Si基板上に (Y_2O_3)_x(ZrO_2)_1_−_x膜(
X<1)をエピタキシャル成長させてなる積層体。
(7) (Y_2O_3)_x(ZrO_2)_1_-_x film (
A laminate formed by epitaxially growing X<1).
(8)請求項(7)記載の積層体の (Y_2O_3)_x(ZrO_2)_1_−_x膜の
上に高温超電導膜をエピタキシャル成長させてなる多層
膜。
(8) A multilayer film obtained by epitaxially growing a high temperature superconducting film on the (Y_2O_3)_x(ZrO_2)_1_-_x film of the laminate according to claim (7).
JP63234575A 1988-09-19 1988-09-19 Superconducting wiring Pending JPH0282585A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63234575A JPH0282585A (en) 1988-09-19 1988-09-19 Superconducting wiring

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63234575A JPH0282585A (en) 1988-09-19 1988-09-19 Superconducting wiring

Publications (1)

Publication Number Publication Date
JPH0282585A true JPH0282585A (en) 1990-03-23

Family

ID=16973164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63234575A Pending JPH0282585A (en) 1988-09-19 1988-09-19 Superconducting wiring

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0375204A (en) * 1989-08-18 1991-03-29 Sumitomo Cement Co Ltd Production of oxide superconductive film pattern
US5358925A (en) * 1990-04-18 1994-10-25 Board Of Trustees Of The Leland Stanford Junior University Silicon substrate having YSZ epitaxial barrier layer and an epitaxial superconducting layer
US5828080A (en) * 1994-08-17 1998-10-27 Tdk Corporation Oxide thin film, electronic device substrate and electronic device
JP2008277783A (en) * 2007-03-30 2008-11-13 Canon Inc Epitaxial film, piezoelectric element, ferroelectric element, manufacturing methods of them, and liquid discharge head
US8795815B2 (en) 2007-10-02 2014-08-05 Mitsubishi Electric Corporation Laminated structure

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6430117A (en) * 1987-07-24 1989-02-01 Furukawa Electric Co Ltd Formation of ceramic superconductor membrane
JPH01111718A (en) * 1987-10-23 1989-04-28 Matsushita Electric Ind Co Ltd Process for forming superconductive thin film
JPH01125957A (en) * 1987-11-11 1989-05-18 Semiconductor Energy Lab Co Ltd Superconductor device
JPH01152770A (en) * 1987-12-10 1989-06-15 Shimadzu Corp Substrate with superconducting thin-film
JPH0240992A (en) * 1988-08-01 1990-02-09 Mitsubishi Metal Corp Structure of superconductor wiring

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6430117A (en) * 1987-07-24 1989-02-01 Furukawa Electric Co Ltd Formation of ceramic superconductor membrane
JPH01111718A (en) * 1987-10-23 1989-04-28 Matsushita Electric Ind Co Ltd Process for forming superconductive thin film
JPH01125957A (en) * 1987-11-11 1989-05-18 Semiconductor Energy Lab Co Ltd Superconductor device
JPH01152770A (en) * 1987-12-10 1989-06-15 Shimadzu Corp Substrate with superconducting thin-film
JPH0240992A (en) * 1988-08-01 1990-02-09 Mitsubishi Metal Corp Structure of superconductor wiring

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0375204A (en) * 1989-08-18 1991-03-29 Sumitomo Cement Co Ltd Production of oxide superconductive film pattern
US5358925A (en) * 1990-04-18 1994-10-25 Board Of Trustees Of The Leland Stanford Junior University Silicon substrate having YSZ epitaxial barrier layer and an epitaxial superconducting layer
US5828080A (en) * 1994-08-17 1998-10-27 Tdk Corporation Oxide thin film, electronic device substrate and electronic device
JP2008277783A (en) * 2007-03-30 2008-11-13 Canon Inc Epitaxial film, piezoelectric element, ferroelectric element, manufacturing methods of them, and liquid discharge head
US8198199B2 (en) 2007-03-30 2012-06-12 Canon Kabushiki Kaisha Epitaxial film, piezoelectric element, ferroelectric element, manufacturing methods of the same, and liquid discharge head
US8795815B2 (en) 2007-10-02 2014-08-05 Mitsubishi Electric Corporation Laminated structure

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