JPH0265255A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0265255A
JPH0265255A JP63217023A JP21702388A JPH0265255A JP H0265255 A JPH0265255 A JP H0265255A JP 63217023 A JP63217023 A JP 63217023A JP 21702388 A JP21702388 A JP 21702388A JP H0265255 A JPH0265255 A JP H0265255A
Authority
JP
Japan
Prior art keywords
transistor region
side
drain
source
offset section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63217023A
Inventor
Kazuhiro Mizutani
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP63217023A priority Critical patent/JPH0265255A/en
Publication of JPH0265255A publication Critical patent/JPH0265255A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To enable an offset section to be large in breadth and to restrain a switching transistor from deteriorating in source-drain breakdown strength by a method wherein impurity is selectively introduced in an oblique direction against a substrate.
CONSTITUTION: A gate electrode 9 is built on the gate insulating film of a switching transistor region and a peripheral transistor region. And, a side wall 11 is provided to the side of the gate electrode of the switching transistor region and the peripheral transistor region, and a resist film 5d is formed covering a peripheral transistor region 4b which includes the gate electrode 9 and the side wall 11. Then, As+ is introduced in an oblique direction against a substrate 1 through, for instance, an As ion implantation method using the resist film 5d as a mask. By this setup, a drain diffusion layer 12a and a source diffusion layer 12b are formed so as to make the width of an offset section 10a on the drain side larger than that of an offset section 10b on the source side. Even if the side wall 11 becomes small in width with the integration, the width of the offset section 10a on the drain side can be larger than that of a conventional one, the source.drain breakdown strength can be prevented from deteriorating, and a phase can be safely cut off.
COPYRIGHT: (C)1990,JPO&Japio
JP63217023A 1988-08-31 1988-08-31 Manufacture of semiconductor device Pending JPH0265255A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63217023A JPH0265255A (en) 1988-08-31 1988-08-31 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63217023A JPH0265255A (en) 1988-08-31 1988-08-31 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0265255A true JPH0265255A (en) 1990-03-05

Family

ID=16697624

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63217023A Pending JPH0265255A (en) 1988-08-31 1988-08-31 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0265255A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5021355A (en) * 1989-05-22 1991-06-04 International Business Machines Corporation Method of fabricating cross-point lightly-doped drain-source trench transistor
US5217910A (en) * 1990-11-05 1993-06-08 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor device having sidewall spacers and oblique implantation
US5258319A (en) * 1988-02-19 1993-11-02 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a MOS type field effect transistor using an oblique ion implantation step
JPH07307389A (en) * 1994-05-07 1995-11-21 Samsung Electron Co Ltd Fuse element for semiconductor integrated circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5258319A (en) * 1988-02-19 1993-11-02 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a MOS type field effect transistor using an oblique ion implantation step
US5021355A (en) * 1989-05-22 1991-06-04 International Business Machines Corporation Method of fabricating cross-point lightly-doped drain-source trench transistor
US5217910A (en) * 1990-11-05 1993-06-08 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor device having sidewall spacers and oblique implantation
JPH07307389A (en) * 1994-05-07 1995-11-21 Samsung Electron Co Ltd Fuse element for semiconductor integrated circuit

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