JPH0263494U - - Google Patents
Info
- Publication number
- JPH0263494U JPH0263494U JP14227288U JP14227288U JPH0263494U JP H0263494 U JPH0263494 U JP H0263494U JP 14227288 U JP14227288 U JP 14227288U JP 14227288 U JP14227288 U JP 14227288U JP H0263494 U JPH0263494 U JP H0263494U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- correction
- outputs
- circuit
- pulse signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims 5
- 230000007704 transition Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Electromechanical Clocks (AREA)
Description
第1図は本考案の一実施例に係るアナログ時計
の修正回路の回路構成を示す図、第2図はタイム
チヤートである。
2……基準信号発生器、4……分周器、6……
修正スイツチ、8……切替回路、12……判別回
路、14……反転信号出力回路、16……修正速
度切替回路、18……切替ゲート回路、64……
シフトレジスタ、110……多相モータ、112
……指針機構。
FIG. 1 is a diagram showing the circuit configuration of an analog clock correction circuit according to an embodiment of the present invention, and FIG. 2 is a time chart. 2... Reference signal generator, 4... Frequency divider, 6...
Correction switch, 8...Switching circuit, 12...Discrimination circuit, 14...Inverted signal output circuit, 16...Correction speed switching circuit, 18...Switching gate circuit, 64...
Shift register, 110... Polyphase motor, 112
...Guideline mechanism.
Claims (1)
通常駆動パルス信号と修正用パルス信号を出力す
る分周器と、 修正スイツチと、 この修正スイツチが操作された時にのみ通常駆
動パルス信号に代えて修正用パルス信号を出力す
る切替回路と、 この切替回路からのパルス信号の発生に応答し
て複数の出力端より一定方向に出力信号の発生を
移行するとともにその移行方向が反転可能なシフ
トレジスタと、 このシフトレジスタからの出力信号により回転
駆動する多相モータと、 を有するアナログ時計において、 前記分周器が前記修正用パルス信号より高速な
修正用早送りパルス信号を出力するように構成さ
れ、さらに、 切替回路が、 前記修正スイツチの操作時間が予め設定された
時間以内の時は第1の検出信号を出力するととも
に設定時間以上の時は第2の検出信号を出力する
判別回路と、 この判別回路からの第1の検出信号の発生に応
答して前記シフトレジスタの出力信号の移行方向
を一定時間反転させる反転信号を出力する反転信
号出力回路と、 前記判別回路からの第2の検出信号の発生に応
答して一定時間第1の修正開始信号を出力した後
、第2の修正開始信号を出力する修正速度切替回
路と、 この修正速度切替回路からの第2の修正開始信
号および前記反転信号出力回路からの反転信号出
力時には前記シフトレジスタに前記分周器からの
修正用早送りパルス信号を出力するとともに前記
第1の修正用開始信号出力時には前記シフトレジ
スタに前記修正用パルス信号を出力し、さらにそ
れ以外の時は通常駆動パルス信号を前記シフトレ
ジスタに供給する切替ゲート回路と、 からなることを特徴とするアナログ時計の修正
回路。[Claims for Utility Model Registration] A reference signal generator that generates a reference signal; a frequency divider that divides the frequency of the reference signal from the reference signal generator and outputs a normal drive pulse signal and a correction pulse signal; a correction switch; a switching circuit that outputs a correction pulse signal in place of the normal drive pulse signal only when the correction switch is operated; an analog clock comprising: a shift register capable of shifting the generation of an output signal in a direction and reversing the direction of the shift; and a polyphase motor rotationally driven by an output signal from the shift register, wherein the frequency divider The switching circuit is configured to output a correction fast-forward pulse signal faster than the correction pulse signal, and further, when the operation time of the correction switch is within a preset time, the switching circuit outputs a first detection signal and outputs a first detection signal. a determination circuit that outputs a second detection signal when the set time is exceeded; and an inversion signal that inverts the transition direction of the output signal of the shift register for a certain period of time in response to generation of the first detection signal from the determination circuit. and a correction speed switching circuit that outputs a first correction start signal for a certain period of time in response to generation of a second detection signal from the discrimination circuit, and then outputs a second correction start signal. a circuit; when outputting a second correction start signal from the correction speed switching circuit and an inversion signal from the inversion signal output circuit, outputting a correction fast-forward pulse signal from the frequency divider to the shift register; a switching gate circuit that outputs the correction pulse signal to the shift register when a correction start signal is output, and further supplies a normal drive pulse signal to the shift register at other times. Clock correction circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14227288U JPH0516547Y2 (en) | 1988-10-31 | 1988-10-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14227288U JPH0516547Y2 (en) | 1988-10-31 | 1988-10-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0263494U true JPH0263494U (en) | 1990-05-11 |
JPH0516547Y2 JPH0516547Y2 (en) | 1993-04-30 |
Family
ID=31408081
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14227288U Expired - Lifetime JPH0516547Y2 (en) | 1988-10-31 | 1988-10-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0516547Y2 (en) |
-
1988
- 1988-10-31 JP JP14227288U patent/JPH0516547Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0516547Y2 (en) | 1993-04-30 |
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