JPH0263127A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enhance reliability by a method wherein a pad part is formed by laminating an Al-based wiring part and a stress relaxation layer of polysilicon, a silicide, a refractory metal, an insulating film, a polyimide or the like under a bump electrode in order to relax and absorb all stresses generated in the pad part. CONSTITUTION:A polysilicon film 4 and an MoSi2 film 5 are formed on a second field layer; an Al-based wiring part 6 is formed on the film. Since Young's modulus of this Mo polycide Iayer is high and a coefficient of thermal expansion of this layer is close to that of the Al wiring part, a mechanical stress and a thermal stress which are generated in processes after a bonding process are relaxed and absorbed; a lower layer is not influenced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to semiconductor devices. More specifically, it relates to a semiconductor device having a butt electrode in which a stress relaxation layer such as polysilicon, silicide, riflat metal, insulating film, polyimide film, etc. is laminated under the AL wiring and bump electrode. The object of the present invention is to provide a highly reliable semiconductor device by alleviating stress generated during bonding and resin sealing.

[Prior Art 1] FIG. 4 shows a cross section of a semiconductor device having a bat structure according to a conventional method.

A field oxide film (2) and a second field film (2) were formed on a semiconductor substrate, and an AL wiring layer (2) was directly formed. However, with this structure, mechanical stress during bonding,
Another disadvantage is that the stress caused by resin contraction during resin sealing cannot be absorbed, resulting in cracks and peeling of the insulating film or substrate under the AL wiring or bump electrodes, impairing the reliability of the semiconductor device. there were. Furthermore, S present in the AL wiring
Microcracks and voids were generated due to the shear force at the interface caused by the i-nodules and the difference in materials between the AL wiring and the insulating film.

[Problem to be Solved by the Invention 1] The object of the present invention is to eliminate these drawbacks and provide a highly reliable semiconductor device having a butt structure that alleviates and absorbs any stress occurring in the butt part. .

[Means to solve problems]

In order to solve the above-mentioned problems, the present invention provides AI-based wiring,
A butt part is formed under the bump electrode by laminating a stress relaxation layer such as polysilicon, silicide, refracted metal, insulating film, polyimide, etc. to relieve stress during bonding or resin sealing.

[Example] [Example 1] Figure 1 shows an example of the present invention.
Polysilicon film ■, MOS i
An x film (2) was formed, and an AL-based wiring (2) was formed on the film. ■
, ■ is one in which a Mo polycide electrode is also formed on the butt part using a mask;

The polycide layer has a high Young's modulus and a thermal expansion coefficient of AL.
Because it is close to the wiring, it relaxes and absorbs mechanical and thermal stress generated in processes after bonding, and does not affect the underlying layers.

[Embodiment 21] FIG. 2 shows another embodiment, in which reliability can be further improved.

A polysilicon film (2) is formed on the second field, followed by a Ti5i layer (2). Furthermore, a non-doped polysilicon [phase] for high resistivity is laminated, followed by a first AL-based wiring film (2), and finally a second AL-based wiring film (2). Here, Policycon may be non-doped or doped, and it is effective even without silicide.

A bat having such a laminated structure is more effective than the embodiment shown in FIG. 1, requires no additional steps, and can be easily formed using a mask pattern.

[Example 3] FIG. 3 shows another example.

A polysilicon film (2) is formed on the second field, and a glabellar film (2) is formed thereon. Furthermore, a non-doped polysilicon III [phase] is formed and covered with an interlayer film (2).
AL system (2) and second AL system wiring (2) are formed and completed. In this case, even if the insulating film is used, for example, a polyimide interlayer film or PS
G and the like indicate that existence as an interlayer film has the effect of relieving stress.

[Effect of the invention J As explained in the example, by forming the butt part by laminating stress relaxation layers, thermal and mechanical stress during bonding and resin sealing can be alleviated, resulting in high reliability. Accordingly, it is possible to provide a semiconductor device with high performance. Although not shown in the embodiments, it goes without saying that the same effect can be obtained in a semiconductor device having a bump structure, and that it is also effective in wiring other than the AL type, for example, the Cu type.

[Brief explanation of the drawing]

1 to 3 are schematic cross-sectional views of the semiconductor device of the present invention. FIG. 4 is a sectional view of a semiconductor device with a conventional structure. Field oxide film Second field oxide film Polysilicon film Mo5izli! AL-Cu wiring butt part passivation film Ti5iz film Non-doped polysilicon film 1st AL system wiring film Interlayer film Interlayer film Above Applicant Seiko Epson Corporation Agent Patent attorney Masaharu Kamiyanagi (1 other person) l... Board drawing (1) No change in content) Figure Figure Figure Procedure Amendment (Method) 1. Indication of the case 1988 Patent Application No. 214451 2. Name of the invention Semiconductor device Representative director Tsuneya Nakamura Contact information Extension 300-302 Date of 5° correction order November 29, 1988 6° Drawings subject to correction (Fig. 1, Fig. 2, Fig. 3)

Claims (2)

[Claims] (1) Substrate, insulating film, polysilicon film, silicide film,
A semiconductor device characterized by having a pad structure made of a laminated film that is a combination of a refracted metal film, an AL-based wiring film, and a bump electrode. (2) Under the AL wiring and bump electrodes, polysilicon,
2. The semiconductor device according to claim 1, further comprising a layered stress relaxation layer made of silicide, refracted metal, or the like.