JPH0252298B2 - - Google Patents

Info

Publication number
JPH0252298B2
JPH0252298B2 JP12225484A JP12225484A JPH0252298B2 JP H0252298 B2 JPH0252298 B2 JP H0252298B2 JP 12225484 A JP12225484 A JP 12225484A JP 12225484 A JP12225484 A JP 12225484A JP H0252298 B2 JPH0252298 B2 JP H0252298B2
Authority
JP
Japan
Prior art keywords
buffer memory
data
register
signal line
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP12225484A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61854A (ja
Inventor
Hosaku Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP12225484A priority Critical patent/JPS61854A/ja
Publication of JPS61854A publication Critical patent/JPS61854A/ja
Publication of JPH0252298B2 publication Critical patent/JPH0252298B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
JP12225484A 1984-06-14 1984-06-14 入出力制御装置 Granted JPS61854A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12225484A JPS61854A (ja) 1984-06-14 1984-06-14 入出力制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12225484A JPS61854A (ja) 1984-06-14 1984-06-14 入出力制御装置

Publications (2)

Publication Number Publication Date
JPS61854A JPS61854A (ja) 1986-01-06
JPH0252298B2 true JPH0252298B2 (cs) 1990-11-13

Family

ID=14831397

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12225484A Granted JPS61854A (ja) 1984-06-14 1984-06-14 入出力制御装置

Country Status (1)

Country Link
JP (1) JPS61854A (cs)

Also Published As

Publication number Publication date
JPS61854A (ja) 1986-01-06

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