JPH0241429U - - Google Patents
Info
- Publication number
- JPH0241429U JPH0241429U JP12050788U JP12050788U JPH0241429U JP H0241429 U JPH0241429 U JP H0241429U JP 12050788 U JP12050788 U JP 12050788U JP 12050788 U JP12050788 U JP 12050788U JP H0241429 U JPH0241429 U JP H0241429U
- Authority
- JP
- Japan
- Prior art keywords
- bent
- chip
- resin
- periphery
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 2
- 238000007789 sealing Methods 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
第1図は本考案の一実施例である樹脂封止型半
導体装置に使用するリードフレーム組立体を示す
平面図、第2図は上記リードフレーム組立体を樹
脂封止用金型内空間的に支持した状態の断面図、
第3図は上記リードフレーム組立体を使用して完
成した本考案の樹脂封止型半導体装置を示し、同
図aはその平面図、同図bはその縦断面図、第4
図は本考案の他の実施例を示すもので、同図aは
その平面図、同図bはその側面図、第5図a,b
は、それぞれさらに本考案の他の実施例を示す平
面図、第6図および第7図は従来の樹脂封止型半
導体装置を示す断面図である。
10…リードフレーム、11…連結部、12,
13…リード、14…チツプ搭載部、15,35
,45,55…折り曲げ部、16a,16b,3
6,46,56…ピン受け部、17…半導体チツ
プ、18…金属細線、19…樹脂封止用金型、2
2…キヤビテイ、25…支持ピン、28,30…
樹脂封止部。
FIG. 1 is a plan view showing a lead frame assembly used in a resin-sealed semiconductor device, which is an embodiment of the present invention, and FIG. A cross-sectional view of the supported state,
FIG. 3 shows a resin-sealed semiconductor device of the present invention completed using the above lead frame assembly; FIG.
The figures show other embodiments of the present invention, in which figure a is a plan view, figure b is a side view, and figures 5 a and b.
6 and 7 are plan views showing other embodiments of the present invention, respectively, and FIGS. 6 and 7 are cross-sectional views showing conventional resin-sealed semiconductor devices. 10...Lead frame, 11...Connection part, 12,
13... Lead, 14... Chip mounting section, 15, 35
, 45, 55...Bending portion, 16a, 16b, 3
6, 46, 56... Pin receiving part, 17... Semiconductor chip, 18... Metal thin wire, 19... Resin sealing mold, 2
2...Cavity, 25...Support pin, 28, 30...
Resin sealing part.
Claims (1)
部を有し、このリード部の1つにはチツプ載置部
が設けられ、このチツプ載置部上に半導体チツプ
が載置・固着され、その半導体チツプの上面から
は他のリードに金属細線で接続されたリードフレ
ーム組立体を備え、このリードフレーム組立体を
金型のキヤビテイ内に支持して樹脂封止される樹
脂封止型半導体装置において、前記チツプ載置部
の周縁に折り曲げ部を形成し、かつ、この折り曲
げ部に、前記キヤビテイ内で前記チツプ載置部を
空間的に支持するために、前記キヤビテイ内に進
退可能に設けた支持ピンを受けるピン受部を形成
したことを特徴とする樹脂封止型半導体装置。 2 上記チツプ載置部の周縁に設けた折り曲げ部
は、上記チツプ載置部の1側全部が折り曲げられ
た折り曲げ部であることを特徴とする請求項第1
項記載の樹脂封止型半導体装置。 3 上記チツプ載置部の周縁に設けた折り曲げ部
は、上記チツプ載置部の1側の一部が折り曲げら
れた折り曲げ部であることを特徴とする請求項第
1項記載の樹脂封止型半導体装置。 4 上記チツプ載置部の周縁に設けた折り曲げ部
は、上記チツプ載置部の1側で、かつ、互いに対
向するように設けた1対の折り曲げ部であること
を特徴とする請求項第1項記載の樹脂封止型半導
体装置。 5 上記チツプ載置部の周縁に設けた折り曲げ部
は、幅方向の側面の中間に互いに対向するように
設けた1対の折り曲げ部であることを特徴とする
請求項第1項記載の樹脂封止型半導体装置。[Claims for Utility Model Registration] 1. It has a plurality of lead portions extending in the same direction from the connecting portion, one of the lead portions is provided with a chip placement portion, and a semiconductor is placed on the chip placement portion. A chip is mounted and fixed, and a lead frame assembly is connected from the top surface of the semiconductor chip to other leads with thin metal wires.This lead frame assembly is supported in the cavity of a mold and sealed with resin. In the resin-sealed semiconductor device, a bent portion is formed at the periphery of the chip mounting portion, and the bent portion is provided with the bent portion in order to spatially support the chip mounting portion within the cavity. A resin-sealed semiconductor device comprising a pin receiving portion for receiving a support pin that is movably provided in a cavity. 2. Claim 1, wherein the bent portion provided on the periphery of the chip placing portion is a bent portion in which one entire side of the chip placing portion is bent.
The resin-sealed semiconductor device described in 1. 3. The resin-sealed mold according to claim 1, wherein the bent portion provided on the periphery of the chip placement portion is a bent portion in which a portion of one side of the chip placement portion is bent. Semiconductor equipment. 4. Claim 1, wherein the bent portions provided on the periphery of the chip placement portion are a pair of bent portions provided on one side of the chip placement portion and facing each other. The resin-sealed semiconductor device described in 1. 5. The resin seal according to claim 1, wherein the bent portions provided on the periphery of the chip placement portion are a pair of bent portions provided in the middle of the side surfaces in the width direction so as to face each other. Stop type semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12050788U JPH0241429U (en) | 1988-09-14 | 1988-09-14 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12050788U JPH0241429U (en) | 1988-09-14 | 1988-09-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0241429U true JPH0241429U (en) | 1990-03-22 |
Family
ID=31366679
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12050788U Pending JPH0241429U (en) | 1988-09-14 | 1988-09-14 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0241429U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60223135A (en) * | 1984-04-19 | 1985-11-07 | Nec Corp | Resin seal type semiconductor device |
JPS6249242B2 (en) * | 1979-12-17 | 1987-10-19 | Earth Chemical Co |
-
1988
- 1988-09-14 JP JP12050788U patent/JPH0241429U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6249242B2 (en) * | 1979-12-17 | 1987-10-19 | Earth Chemical Co | |
JPS60223135A (en) * | 1984-04-19 | 1985-11-07 | Nec Corp | Resin seal type semiconductor device |
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