JPH0241092A - Television receiver - Google Patents

Abstract

PURPOSE:To prevent undesired copy by sending data to a circuit to be controlled having a memory section and an operation section from a control circuit via an optical fiber and fetching the data for the vertical blanking period. CONSTITUTION:A control circuit 20 sends a data HDATA to circuits 14-16, 18, 19 to be controlled having memory sections 14M-16M, 18M, 19M and an operating section via an optical fiber F1, the HDATA is stored in the memory section and the stored HDATA is transferred from the memory section to the operation section for the vertical blanking period. Thus, undesired radiation is prevented in advance to transfer the HDATA, the data transfer speed is improved and since the data is transferred even at a period other than the vertical blanking period, the data transfer efficiency is improved.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

A: Industrial field of application B: Outline of the invention C: Conventional technology (Figs. 3 to 4) D: Problems to be solved by the invention (Fig. 3) E: Means for solving the problems (Fig. 1) ) F action (Figure 1) G example (Figures 1 to 2) (G1) First example (Figure 1) (G2) Second example (Figure 2) (G3) Others Embodiment H Effects of the Invention A Industrial Field of Application The present invention relates to a television device, and in particular to a television receiver, a video tape recorder, a video disk player, etc., which is adapted to signal process a video signal having a synchronizing signal. This is suitable for use in electronic equipment (hereinafter referred to as television equipment).

B. Summary of the Invention The present invention allows data to be efficiently transferred (
Can be transferred.

C. Prior Art Conventionally, in television receivers, etc., data is transferred from a control circuit configured with a microcomputer to a controlled circuit during the vertical blanking period TVIIL to prevent deterioration in the quality of displayed images. The display image, etc., is adjusted accordingly (Japanese Utility Model Publication No. 60-74378).
.

That is, in FIG. 3, ■ indicates a television receiver as a whole, and a control circuit 2 and controlled circuits 3 and 4, which are, for example, a video signal processing circuit and an audio signal processing circuit, are connected via pull-up resistors 5 and 6. Power line VC
It is connected to a two-wire bus BS such that it is connected to C.

The control circuit 2 has oven collector transistors 2A and 2B connected to the bus BS, and transmits predetermined data DATA to the bus BS via the transistors 2A and 2B.
It is designed to output to .

At this time, as shown in FIG.
(Fig. 4 (A)), the relevant data DATA (Fig. 4 (B)) is output, so that even if unnecessary radiation from the bus BS is mixed into the video signal, the displayed image It is made so that it is not displayed on top.

On the other hand, the controlled circuits 3 and 4 transfer the data DATA output to the bus BS to the buffer circuit 3C.

The data is received via 3D, 4C, and 4D, and image quality such as hue and brightness, as well as volume, etc., are switched based on the data DATA.

Furthermore, the controlled circuits 3 and 4 are open collector transistors 3A connected to the bus BS similarly to the control circuit 2.
and 3B, 4A, and 4B, and based on the data DATA sent from the control circuit 2, the vertical retrace period Tvl
During the L period, predetermined data is output to the bus BS.

On the other hand, the control circuit 2 transfers the data output from the controlled circuits 3 and 4 to the bus BS to the buffer circuits 2C and 2D.
The data is received from the controlled circuits 3 and 4 as necessary.

D Problems to be solved by the invention By the way, when the bus BS is wired into a television receiver, capacitances C1 and C2 are formed between the bus BS and the ground, so that the bus BS has a time constant. .

In this case, if the resistance value of pull-up resistors 5 and 6 is R1, and the capacitance of capacitors C1 and C2 is C, then the count-off frequency f of bus BS is limited to the frequency expressed by the following equation with the relevant time constant. This makes it difficult to transfer data with a high clock frequency.

Therefore, in television receivers, by transmitting data at a clock frequency of approximately 100 (kHz), data waveform distortion is prevented and data is reliably transmitted.

However, when transferring data with a clock frequency of 100 (kHz), the vertical blanking period T□
, is approximately 1.2 (msec), the data that can be transferred during this period TvllL is limited to 6 bytes at most.

Therefore, this type of television receiver has the problem of low data transfer efficiency. For example, even if you try to change the image quality by operating the controls, the television receiver will respond and the image quality will not actually change. It took time.

One way to solve this problem is to configure the bus with shielded wires to reduce unnecessary radiation and allow data to be transferred even during periods other than the vertical retrace period TvlL. .

However, when the bus is constructed of shielded wires, the capacitances C1 and C2 increase accordingly, which inevitably reduces the transfer speed, but rather reduces the transfer efficiency.

The present invention has been made in consideration of the above points, and it is an object of the present invention to propose a television device that can efficiently transfer data.

E Means for Solving the Problem In order to solve this problem, in the present invention, the controlled circuits 14, 15, 16, 18, and 19 having the memory sections 14M, 15M, 16M, 18M, and 19M and the operation section ,
Data HDA from the control circuit 20 via the optical fiber F1
Transfer TA to memory sections 14M, 15M, 16M, 18
Data HDATA is stored in M519M, and data HDATA stored in memory sections 14M, 115M, 16M, 18MS 19M is transferred from memory sections 14M, 15M, 16M, 18M, and 19M to the operating section during the vertical retrace period.

By transferring the data HDATA via the F-acting optical fiber F1, unnecessary radiation can be prevented and the data HDATA can be transferred efficiently.
can be transferred.

G example An embodiment of the present invention will be described in detail below with reference to the drawings.

(G1) First Embodiment In FIG. 1, 10 indicates a television receiver as a whole, and a received signal obtained from an antenna 11 is supplied to a tuner circuit 12.

The intermediate frequency amplification circuit 13 receives the television signal selected by the tuner circuit 12, provides the resulting video signal Sv to the synchronization signal separation circuit 14 and the video signal processing circuit 15, and converts the audio signal SA into an audio signal. It is applied to the processing circuit 16.

The synchronization signal separation circuit 14, the video signal processing circuit 15, and the audio signal processing circuit 16 are connected to the control circuit 20 through optical fibers F1 and F2, similar to the polarization circuit 18 and the color signal processing circuit 19, and are connected to the control circuit 20 through optical fibers F1 and F2. The operating state is switched based on the optical data HDATA transferred via F2.

That is, the synchronization signal separation circuit 14 has a light receiving element (not shown) configured to receive the optical data HD AT A outputted to the optical fiber F1, and extracts data from the serial data obtained through the light receiving element. The data sent to the synchronization signal separation circuit 14 is stored in the buffer memory circuit 14M.

Furthermore, the synchronization signal separation circuit 14 is configured to take in the data accumulated in the buffer memory circuit 14M at the timing of the vertical synchronization signal (2), and thereby the control circuit 20
The optical data H transferred from to the buffer memory circuit 14M
DATA is converted into parallel data and transferred from the buffer memory circuit 14M to the operating section of the synchronization signal separation circuit 14.

In this way, by transferring data from the control circuit 20 to the synchronization signal separation circuit 14 via the optical fiber F1, it is possible to transfer data while preventing unnecessary radiation.

Therefore, the data transfer speed can be increased and data can be transferred even during periods other than the vertical retrace period, and the data transfer efficiency can be improved accordingly.

Furthermore, in this embodiment, the data transferred from the control circuit 20 is temporarily stored in the buffer memory circuit 14M, and then converted into parallel data to generate the vertical synchronization signal (2). By transmitting the data to the operating section of the synchronizing signal separating circuit 14 at the timing of , the synchronizing signal separating circuit 1
It is possible to switch between the four operating states, thereby effectively avoiding disturbances in the displayed image due to switching of the operating states.

That is, the synchronization signal separation circuit 14 separates the synchronization signal from the video signal Sv, receives the synchronization signal input to the external input terminal of the television receiver, and performs synchronization based on the data obtained from the buffer memory circuit 14M. The separated synchronization signal or the synchronization signal input to the external input terminal is selected and output to the polarization circuit 18.

Furthermore, the synchronization signal separation circuit 14 selects the vertical synchronization signal (■) from the synchronization-separated synchronization signal or the synchronization signal input to the external input terminal, and selects the vertical synchronization signal (2) from the synchronization separated synchronization signal or the synchronization signal input to the external input terminal, and selects the vertical synchronization signal , is output to the color signal processing circuit 19 and the control circuit 20.

Furthermore, the synchronization signal separation circuit L4 includes a light emitting element (not shown).
The control circuit 20 transmits the optical data HDATA via the optical fiber F2 by driving the light emitting element based on the data obtained from the buffer memory circuit 14M.
Transfer to.

On the other hand, the polarization circuit 18 includes a buffer memory circuit 18M like the synchronization signal separation circuit 14, and the optical fiber F
The optical data HDATA transferred from the optical data HDATA obtained through 1 to the polarization circuit 18 is stored in the buffer memory circuit 18M, and the vertical synchronization signal V,
At timing 3, the stored data is taken into the operating section.

Furthermore, based on the captured data, the polarization circuit 18
By driving the polarization system of the cathode ray tube 22, the convergence of the cathode ray tube 22 is adjusted and, if necessary, data is transferred to the control circuit 20 via the optical fiber F2.

Thus, in the polarization circuit 1, data is transferred via the optical fiber F1, and the data is temporarily stored in the buffer memory circuit 18M and then transferred to the operating section at the timing of the vertical synchronization signal V. In addition, the convergence characteristics of the displayed image can be switched during the vertical retrace period, thereby effectively avoiding disturbances in the displayed image caused by the switching.

On the other hand, the video signal processing circuit 15 stores the data transferred to the video signal processing circuit 15 from the data obtained via the optical fiber F1 in the buffer memory circuit 15M, as in the case of the polarization circuit 1. The data is taken into the operating section at the timing of the vertical synchronization signal VD output from the synchronization signal separation circuit 14.

Furthermore, the video signal processing circuit 15 switches the brightness, hue, etc. of the display image displayed on the cathode ray tube 22 via the color signal processing circuit 19 based on the captured data, and transmits data related to the switching to the optical fiber F2. It is designed to be sent to

Similarly, the color signal processing circuit 19 stores the data transferred to the color signal processing circuit 19 from the data obtained via the optical fiber F1 in the buffer memory circuit 19M, and at the same time stores the data transferred to the color signal processing circuit 19 from the data obtained via the optical fiber F1. Data is taken into the operating section.

Further, the color signal processing circuit 19 switches the input between the color signal 5clI inputted from the external input terminal of the television device and the color signal outputted from the video signal processing circuit 15 based on the captured data. According to
The display image on the cathode ray tube 22 is switched, and data related to the switching is sent to the optical fiber F2.

(Thus, in the video signal processing circuit 15 and the color signal processing circuit 19, the data is transferred via the optical fiber Fl, and the data is temporarily stored in the buffer memory circuits 15M and 19M, respectively, to generate the vertical synchronization signal VD. By transferring the data to the operating section at the timing of Disturbances in displayed images due to switching can be effectively avoided.

On the other hand, the audio signal processing circuit 16 stores the data transferred to the audio signal processing circuit 16 from the data obtained via the optical fiber Fl in the buffer memory circuit 16M, and at the timing of the vertical synchronization signal VD. The data is taken into the operating section, thereby improving the data transfer efficiency and switching the volume and sound quality of the audio signal output from the speaker 23.

On the other hand, the control circuit 20 has a microcomputer configuration having a memory circuit 24 made of non-volatile memory, and the data stored in the memory circuit 24 and the controls provided on the operation panel of the television receiver are stored in the control circuit 20. 25
In response to the operations of A, 25B, and 25C, predetermined data is output to the optical fiber F1.

Furthermore, the control circuit 20 has a buffer memory circuit 20M, and sequentially stores data obtained through the optical fiber F2 in the buffer memory circuit 20M, and also takes in the data into the control section at the timing of the vertical synchronization signal VD. The signal is transmitted from the synchronization signal separation circuit 14, the video signal processing circuit 15, the audio signal processing circuit 16, the polarization circuit 18, and the color signal processing circuit 19, which are controlled circuits, thus effectively avoiding disturbance of the displayed image. data can be imported efficiently.

Thus, the optical fibers F1 and F2 are connected to the optical data HDA
A bus HBS for transferring TA is configured.

In the above configuration, from the control circuit 20 to the optical fiber F1
The optical data HDATA sent to the synchronization signal separation circuit 14, video signal processing circuit 15, audio signal processing circuit 16, polarization circuit 18, and color signal processing circuit 19, which are controlled circuits of the control circuit 20, is Controlled circuit 14.
15.16.After being stored in the buffer memory circuits 14M, 15M, 16M, 18M and 19M provided in 18 and 19, the vertical synchronization signal ■. The data is transferred to the operating unit at the timing of , thereby effectively avoiding deterioration of image quality and transferring the data with high transfer efficiency. Based on the transferred data, the controlled circuits 14, 15, 16, 18 and 19 changes the operation.

According to the above configuration, in addition to transferring data via an optical fiber, the transferred data is temporarily stored in the buffer memory circuit and transferred to the operating section at the timing of the vertical synchronization signal, thereby effectively reducing image quality deterioration. It is possible to transfer data at a high speed while avoiding this, and thus it is possible to transfer data with high transfer efficiency.

(G2) Second Embodiment In FIG. 2, parts corresponding to those in FIG. 1 are denoted by the same reference numerals.
The present invention is applied to a television receiver 33 in which a tuner section 31 and a monitor section 32 are configured separately.

That is, in the tuner section 31 and the monitor section 32,
Memory circuits 33 and 34 each consisting of a non-volatile memory
The control circuits 36 and 37 are connected to each other and have a microcomputer configuration, and the control circuits 36 and 37 are connected by optical fibers F3 and F4 to mutually transfer optical data.

The control circuit 36 is configured to transfer data to the tuner circuit 39 in response to the data stored in the memory circuit 34 and the operations of the operators 37A, 37B, and 37C provided on the operation panel of the tuner section 31. As a result, the local oscillation frequency of the tuner circuit 39 is switched to select a desired television signal, and the video signal Sv and audio signal SA are sent to the monitor section 32.

Furthermore, the control circuit 36 transfers data to the control circuit 37 of the monitor section 32 via the optical fiber F3, thereby switching the operation of the monitor section 32.

That is, the control circuit 37 sequentially stores the data obtained through the optical fiber F3 in the buffer memory circuit 37M, and also takes in the stored data into the control section at the timing of the vertical synchronization signal V. Data is transferred from the control circuit 36 to the control circuit 37 with high transfer efficiency while effectively avoiding image disturbance.

Furthermore, the control circuit 37 operates based on the data transferred from the control circuit 36 and the data stored in the memory circuit 35, the synchronization signal separation circuit 14, the video signal processing circuit 15, the audio Optical data is sent to the signal processing circuit 16, polarization circuit 18, and color signal processing circuit 19, thereby switching the operation of the monitor section 32.

Furthermore, the control circuit 37 controls the controlled circuits 14.15.16.
The optical data transferred from the optical fibers 18 and 19 via the optical fiber F2 is transferred to the control circuit 36 via the optical fiber F4.

The control circuit 36 sequentially stores the optical data transferred via the optical fiber 14 in a built-in buffer memory circuit 36M, and controls the stored data at the timing of the vertical synchronization signal VD obtained from the monitor unit 32. The data is thereby transferred from the control circuit 37 to the control circuit 36 with high transfer efficiency while effectively avoiding disturbances in the displayed image.

According to the above configuration, the tuner section 31 and the monitor section 32
Even in the television receiver 33, which is configured separately, data can be transferred via an optical fiber and the transferred data can be captured at the timing of the vertical synchronization signal v0, thereby achieving the same effect as in the first embodiment. effect can be obtained.

(G3) Other embodiments In the above embodiments, the case where optical data is mutually transferred between the control circuit and the controlled circuit is described.
The present invention is not limited to this, but data is transferred from the control circuit to the controlled circuit using an optical fiber, and a bus is wired from the controlled circuit to the control circuit in the same manner as in the past, and data is transferred during the vertical retrace period. It can be widely used in cases where

Furthermore, in the above-described embodiment, a case has been described in which the data once stored in the buffer memory circuit is transferred to the operating section at the timing of the vertical synchronization signal, but the present invention is not limited to the timing of the vertical synchronization signal; The data may be transferred to the operating section during the retrace period.

Further, in the above-described embodiment, the case where the present invention is applied to a television receiver has been described, but the present invention is not limited to this, and the present invention is applicable to video tape recorders, video disk players, etc., which perform signal processing on video signals containing synchronization signals. The present invention can be widely applied to a television device configured to do so, when data is transferred between the television devices, and when data is transferred between the television device and other electronic equipment.

H Effects of the Invention As described above, according to the present invention, deterioration in image quality can be prevented by transmitting data via an optical fiber and transmitting the transferred data to the operating section during the vertical retrace period. It is possible to effectively transfer data at a high speed and obtain a television device with high data transfer efficiency.

20M, 36M...Buffer memory circuit, 15
...Video signal processing circuit, 16...Audio signal processing circuit, 18...Polarization circuit, 1
9...Color signal processing circuit, Fl, F2, F3, F
4...Optical fiber.

Claims (1)

[Claims] Data is transferred from a control circuit to a controlled circuit having a memory section and an operating section via an optical fiber, and the data is stored in the memory section, and the data stored in the memory section is is transferred from the memory section to the operating section during a vertical retrace period.