JPH0240936A - Package of semiconductor device - Google Patents
Package of semiconductor deviceInfo
- Publication number
- JPH0240936A JPH0240936A JP63191631A JP19163188A JPH0240936A JP H0240936 A JPH0240936 A JP H0240936A JP 63191631 A JP63191631 A JP 63191631A JP 19163188 A JP19163188 A JP 19163188A JP H0240936 A JPH0240936 A JP H0240936A
- Authority
- JP
- Japan
- Prior art keywords
- lid
- substrate
- package
- side wall
- adhesive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 239000000853 adhesive Substances 0.000 claims abstract description 32
- 230000001070 adhesive effect Effects 0.000 claims description 27
- 239000000758 substrate Substances 0.000 abstract description 30
- 238000009429 electrical wiring Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000005219 brazing Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007730 finishing process Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置のパッケージに関し、特に半導体素
子を搭載したパッケージ本体を蓋で封止した構成のパッ
ケージに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a package for a semiconductor device, and more particularly to a package in which a package body on which a semiconductor element is mounted is sealed with a lid.
従来、半導体装置のパッケージとして、アルミニナセラ
ミックでパッケージ本体を形成し、このパッケージ本体
に半導体素子を搭載した上で、パッケージ本体の上部開
口を蓋で封止する構成のものが用いられている。このパ
ッケージ本体は、第３図に示すように粉末状のアルミナ
をバインダと混合してシート状にした複数枚の基板１１
〜１５を重ねて圧着、焼成、めっき、仕上げの工程で一
体化して形成している。ここで、１１は半導体素子搭載
面１１ａを有する基板、１２は表面に電気的配線１２ａ
が形成されて半導体素子とパッケージ外部端子を電気的
に接続するための基板、１３は蓋との接着部を行う基板
、１４及び１５は接着部の側壁になる基板である。Conventionally, as a package for a semiconductor device, a package is used in which a package body is formed of alumina ceramic, a semiconductor element is mounted on the package body, and an upper opening of the package body is sealed with a lid. As shown in FIG. 3, this package body consists of a plurality of substrates 11 made of sheet-like powdered alumina mixed with a binder.
~15 are stacked and integrated through the processes of crimping, firing, plating, and finishing. Here, 11 is a substrate having a semiconductor element mounting surface 11a, and 12 is an electrical wiring 12a on the surface.
13 is a substrate for forming a bonding portion with the lid, and 14 and 15 are substrates forming side walls of the bonding portion.
そして、このように形成したパッケージ本体１は、第４
図に示すように半導体素子２を基板１１の搭載面１１ａ
に搭載し、この素子と電気的配線１２ａとをボンディン
グワイヤ３で電気接続した上で、蓋４を被せ、接着剤５
で接着封止している。The package main body 1 formed in this way has a fourth
As shown in the figure, the semiconductor element 2 is mounted on the mounting surface 11a of the substrate 11.
After electrically connecting this element and the electrical wiring 12a with the bonding wire 3, a lid 4 is placed on the element, and an adhesive 5 is applied.
It is sealed with adhesive.
接着剤５には、低融点ガラス、金属ろう材、樹脂等が用
いられる。但し、金属ろう材を用いる場合には、接着部
にはメタライズを設け、その上にニッケルめっきや金め
つきを施している。なお、６は外部リードである。As the adhesive 5, low melting point glass, metal brazing material, resin, etc. are used. However, when using a metal brazing material, metallization is provided at the bonded portion, and nickel plating or gold plating is applied thereon. Note that 6 is an external lead.
（発明が解決しようとする課題〕
上述した従来のパッケージは、基板１４．１５の側壁は
蓋４の位置決め用としての機能を有しているため、側壁
は同一立面でかつＭ４の外形寸法よりも微小寸法だけ大
きくなるように形成している。このため、接着剤５を用
いて１４を接着したときに、蓋５を接着する際の圧力に
よって接着剤５が蓋と基板１４．１５の側壁との間から
押し出され、蓋５や基板１５の表面上に突出されてしま
うことがある。このように、接着剤５が突出されると、
外形不良が生じるだけでなく、外形寸法的に不良となる
ことが多く、また取扱いにより突出部がハンドリング関
係の装置と干渉し、装置の動作を妨げたり、接着剤に低
融点ガラスを用いた場合では突出部に欠けたり、その衝
撃で接着剤５にクラックを生じることがある。(Problems to be Solved by the Invention) In the conventional package described above, since the side walls of the substrates 14 and 15 have a function for positioning the lid 4, the side walls are on the same elevation and are smaller than the external dimensions of M4. For this reason, when the adhesive 5 is used to bond 14, the pressure applied when bonding the lid 5 causes the adhesive 5 to bond between the lid and the side walls of the substrate 14 and 15. If the adhesive 5 is pushed out in this way, it may be pushed out from between the lid 5 and the surface of the substrate 15.
Not only does it have a defective external shape, but it often has a defective external dimension, and when handled, the protruding parts interfere with handling-related equipment and impede the operation of the equipment, and when low-melting glass is used as an adhesive. In this case, the protrusion may be chipped or the adhesive 5 may crack due to the impact.
この接着剤５の突出を防止するためには、基板１４．１
５を厚くして側壁を高くすることが考えられるが、これ
ではパッケージ全体が厚くなる。In order to prevent this adhesive 5 from protruding, the substrate 14.1
It is conceivable to make the sidewalls taller by increasing the thickness of 5, but this would make the entire package thicker.
また、蓋を厚くした場合には、同様にパッケージが厚く
なるとともに、基板１５上に接着剤が突出することは防
止できず、上述した問題を完全には解消できない。した
がって、従来では接着剤の量。Further, if the lid is made thicker, the package becomes thicker as well, and it is not possible to prevent the adhesive from protruding onto the substrate 15, so that the above-mentioned problem cannot be completely solved. Therefore, traditionally the amount of adhesive.
蓋の外形、蓋を取着する際の圧力１強度等の条件を調整
する必要があり、製造を困難かつ煩雑なものにする原因
となっている。It is necessary to adjust conditions such as the external shape of the lid and the pressure intensity when attaching the lid, which makes manufacturing difficult and complicated.
本発明は接着剤の突出を防止して、製造の容易化を可能
とする半導体装置のパッケージを提供することを目的と
している。SUMMARY OF THE INVENTION An object of the present invention is to provide a package for a semiconductor device that can be manufactured easily by preventing adhesive from protruding.
本発明の半導体装置のパッケージは、半導体素子を搭載
するパッケージ本体の上部開口には蓋を接着する際の位
置決めとなる側壁を形成し、かつこの側壁には接着剤が
流入可能な凹部を形成している。In the semiconductor device package of the present invention, a side wall is formed in the upper opening of the package main body in which the semiconductor element is mounted, which is used for positioning when bonding the lid, and a recess is formed in this side wall to allow adhesive to flow therein. ing.
上述した構成では、蓋を封止する際の接着剤を凹部内に
流れ込ませることにより、接着剤がパッケージ本体や蓋
の上方に突出することを防止する。In the above configuration, the adhesive used to seal the lid is allowed to flow into the recess, thereby preventing the adhesive from protruding above the package body and the lid.
次に、本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の第１実施例の要部の断面図である。図
において、１はパッケージ本体であり、第３図に示した
ように、粉末状のアルミナをバインダと混合してシート
状にした複数枚の基板１１〜１５を重ねて圧着、焼成、
めっき、仕上げの工程で一体化して形成している。ここ
で、１１は半導体素子搭載面１１ａを有する基板、１２
は表面に電気的配線１２ａが形成されて半導体素子とパ
ッケージ外部端子を電気的に接続するための基板。FIG. 1 is a sectional view of essential parts of a first embodiment of the present invention. In the figure, 1 is the package body, and as shown in FIG.
It is formed integrally during the plating and finishing processes. Here, 11 is a substrate having a semiconductor element mounting surface 11a, 12
1 is a substrate on which electrical wiring 12a is formed to electrically connect the semiconductor element and the external terminals of the package.
１３は蓋との接着部を行う基板、１４及び１５は接着部
の側壁になる基板である。そして、この実施例では基板
１４の内側に形成される側壁が基板１５の側壁よりも幾
分内側に凹むように構成し、接着部としての基板１４の
内側に沿った位置に凹部１４ａを構成している。Reference numeral 13 designates a substrate that forms a bonding portion with the lid, and 14 and 15 designate substrates that become side walls of the bonding portion. In this embodiment, the side wall formed on the inside of the substrate 14 is configured to be recessed somewhat inward from the side wall of the substrate 15, and a recess 14a is formed at a position along the inside of the substrate 14 as a bonding part. ing.
なお、基板１４．１５の厚さは、設計値で０．３８閣と
し、蓋４の厚さは設計値で０．５ｍ＋、蓋４の外側面と
基板１５との隙間を０．３ｍ、蓋４の外側面と基板１４
との隙間を０．６鴫に設定している。The thickness of the board 14.15 is a designed value of 0.38mm, the thickness of the lid 4 is a designed value of 0.5m+, the gap between the outer surface of the lid 4 and the board 15 is 0.3m, and the thickness of the lid 4 is 0.5m+ as a design value. 4 and the substrate 14
The gap between the two is set to 0.6 mm.
このように形成したパッケージ本体１は、半導体素子２
を基板１１の搭載面１１ａに搭載し、この素子と電気的
配線１２ａとをボンディングワイヤ３で電気接続した上
で、蓋４を被せ、接着剤５で接着封止している。このと
き、このパッケージ構造では、蓋４を封止した際に、Ｍ
４と基板１４゜１５との間で挟まれた接着剤５は、その
一部が基板１４の凹部１４ａ内に流れ込むため、パッケ
ージ本体１の上面に向けて突出されることはない。The package body 1 formed in this way has a semiconductor element 2
is mounted on the mounting surface 11a of the substrate 11, this element and the electrical wiring 12a are electrically connected with the bonding wire 3, and then the lid 4 is covered and the element is adhesively sealed with the adhesive 5. At this time, in this package structure, when the lid 4 is sealed, M
A portion of the adhesive 5 sandwiched between the adhesive 4 and the substrate 14 and the substrate 14 flows into the recess 14a of the substrate 14, so that it does not protrude toward the upper surface of the package body 1.
これにより、接着剤が突出されることによる種々の問題
を解消することが可能となる。This makes it possible to eliminate various problems caused by the adhesive being protruded.
なお、これまでと同様の寸法で形成された基板１５の側
壁面により、蓋４の位置決めを行なうことができるのは
言うまでもない、またパッケージ本体や蓋の厚さを大き
くすることもない。It goes without saying that the lid 4 can be positioned using the side wall surface of the substrate 15, which is formed with the same dimensions as before, and the thickness of the package body and lid does not need to be increased.
第２図は本発明の第２実施例の要部断面図であり、第１
図と同一部分には同一符号を付しである。FIG. 2 is a sectional view of a main part of a second embodiment of the present invention, and FIG.
The same parts as in the figures are given the same reference numerals.
この実施例では、基板１４の側壁の寸法を従来と同じと
し、基板１５の側壁を外側に後退させてここに凹部１５
ａを形成している。In this embodiment, the dimensions of the side wall of the substrate 14 are the same as those of the conventional one, and the side wall of the substrate 15 is recessed outward so that a recess 15 is formed therein.
It forms a.
この構成でも、蓋４を取着した際に接着剤５は凹部１５
ａ内に流れ込むことにより、パッケージ本体１の上面へ
の突出を防止することができる。Even in this configuration, when the lid 4 is attached, the adhesive 5 is applied to the recess 15.
By flowing into the inside a, protrusion to the upper surface of the package body 1 can be prevented.
なお、この実施例では接着剤５の流れを上方から確認で
きる利点がある。Note that this embodiment has the advantage that the flow of the adhesive 5 can be checked from above.
〔発明の効果］
以上説明したように本発明は、パッケージ本体の上部開
口に、蓋を接着する際の位置決めとなる側壁を形成し、
かつこの側壁には接着剤が流入可能な凹部を形成してい
るので、蓋を封止する際の接着剤を凹部内に流れ込ませ
ることにより、接着剤がパッケージ本体や蓋の上方に突
出することを防止でき、接着剤の突出による種々の問題
を解消できる効果がある。[Effects of the Invention] As explained above, the present invention forms a side wall in the upper opening of the package body for positioning when bonding the lid,
In addition, since this side wall has a recess into which the adhesive can flow, by allowing the adhesive used to seal the lid to flow into the recess, the adhesive will not protrude above the package body or lid. This has the effect of eliminating various problems caused by adhesive protrusion.
第１図は本発明の第１実施例の要部の断面図、第２図は
本発明の第２実施例の要部の断面図、第３図はパッケー
ジ本体の部分分解斜視図、第４図は従来のパッケージの
一部の断面図である。
１・・・パッケージ本体、２・・・半導体素子、３・・
・ボンディングワイヤ、４・・・蓋、５・・・外部リー
ド、１１〜１５・・・基板、１４ａ、１５ａ・・・凹部
。
第１図
第２図FIG. 1 is a sectional view of the main parts of the first embodiment of the present invention, FIG. 2 is a sectional view of the main parts of the second embodiment of the invention, FIG. 3 is a partially exploded perspective view of the package body, and FIG. The figure is a cross-sectional view of a part of a conventional package. 1...Package body, 2...Semiconductor element, 3...
- Bonding wire, 4... Lid, 5... External lead, 11-15... Substrate, 14a, 15a... Recessed part. Figure 1 Figure 2
Claims (1)
ケージ本体の上部開口に接着剤で取着して前記半導体素
子を封止する蓋とで構成され、前記パッケージ本体の上
部開口には蓋を接着する際の位置決めとなる側壁を形成
し、かつこの側壁には接着剤が流入可能な凹部を形成し
たことを特徴とする半導体装置のパッケージ。1. Consists of a package body on which a semiconductor element is mounted, and a lid that is attached to the upper opening of the package body with an adhesive to seal the semiconductor element, and the lid is glued to the upper opening of the package body. 1. A package for a semiconductor device, characterized in that a side wall is formed for positioning, and a recess into which an adhesive can flow is formed in the side wall.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63191631A JPH0240936A (en) | 1988-07-30 | 1988-07-30 | Package of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63191631A JPH0240936A (en) | 1988-07-30 | 1988-07-30 | Package of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0240936A true JPH0240936A (en) | 1990-02-09 |
Family
ID=16277864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63191631A Pending JPH0240936A (en) | 1988-07-30 | 1988-07-30 | Package of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0240936A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5524605A (en) * | 1995-02-27 | 1996-06-11 | Toyotomi Co., Ltd. | Cooking burner |
| US20110109713A1 (en) * | 2009-11-12 | 2011-05-12 | Ricoh Company, Ltd. | Optical device, optical scanning device, image forming apparatus, and manufacturing method of optical device |
| WO2019150633A1 (en) * | 2018-01-31 | 2019-08-08 | オリンパス株式会社 | Insertion device |
| WO2019150621A1 (en) * | 2018-01-31 | 2019-08-08 | オリンパス株式会社 | Tip member of insertion device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6364046B2 (en) * | 1981-12-16 | 1988-12-09 |
-
1988
- 1988-07-30 JP JP63191631A patent/JPH0240936A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6364046B2 (en) * | 1981-12-16 | 1988-12-09 |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5524605A (en) * | 1995-02-27 | 1996-06-11 | Toyotomi Co., Ltd. | Cooking burner |
| US20110109713A1 (en) * | 2009-11-12 | 2011-05-12 | Ricoh Company, Ltd. | Optical device, optical scanning device, image forming apparatus, and manufacturing method of optical device |
| JP2011124541A (en) * | 2009-11-12 | 2011-06-23 | Ricoh Co Ltd | Optical device, optical scanner, apparatus for forming image, and method of manufacturing optical device |
| US8421838B2 (en) * | 2009-11-12 | 2013-04-16 | Ricoh Company, Ltd. | Optical device, optical scanning device, image forming apparatus, and manufacturing method of optical device |
| WO2019150633A1 (en) * | 2018-01-31 | 2019-08-08 | オリンパス株式会社 | Insertion device |
| WO2019150621A1 (en) * | 2018-01-31 | 2019-08-08 | オリンパス株式会社 | Tip member of insertion device |
| CN111629647A (en) * | 2018-01-31 | 2020-09-04 | 奥林巴斯株式会社 | Insertion device |
| CN111655114A (en) * | 2018-01-31 | 2020-09-11 | 奥林巴斯株式会社 | Front end part of insertion device |
| JPWO2019150633A1 (en) * | 2018-01-31 | 2020-12-03 | オリンパス株式会社 | Insert device |
| JPWO2019150621A1 (en) * | 2018-01-31 | 2020-12-10 | オリンパス株式会社 | Inserting device, tip member and lid member of inserting device |
| US11266301B2 (en) | 2018-01-31 | 2022-03-08 | Olympus Corporation | Inserting apparatus |
| CN111629647B (en) * | 2018-01-31 | 2023-12-05 | 奥林巴斯株式会社 | Insertion device |
| US11877724B2 (en) | 2018-01-31 | 2024-01-23 | Olympus Corporation | Insertion apparatus, and distal end member and lid member of insertion apparatus |
| CN111655114B (en) * | 2018-01-31 | 2024-03-19 | 奥林巴斯株式会社 | Insertion device, front end member of insertion device, and cover member |
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