JPH0237085B2 - - Google Patents
Info
- Publication number
- JPH0237085B2 JPH0237085B2 JP56208563A JP20856381A JPH0237085B2 JP H0237085 B2 JPH0237085 B2 JP H0237085B2 JP 56208563 A JP56208563 A JP 56208563A JP 20856381 A JP20856381 A JP 20856381A JP H0237085 B2 JPH0237085 B2 JP H0237085B2
- Authority
- JP
- Japan
- Prior art keywords
- polysilicon layer
- protrusion
- annealing
- main body
- polysilicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 31
- 229920005591 polysilicon Polymers 0.000 claims description 31
- 238000000137 annealing Methods 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 description 5
- 238000005224 laser annealing Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000002474 experimental method Methods 0.000 description 3
- 238000010894 electron beam technology Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
Description
本発明は、近年急速に発展してきているレーザ
アニールやエレクトロンビームアニールなどのエ
ネルギービームアニールを用いた半導体装置の製
造方法に関する。
近年、ポリシリコン層にエネルギービームアニ
ールを施して簡単な半導体装置を作るといつた報
告例が散見される。これらの例で製造されている
半導体装置は全て単純な矩形や正方形に近いもの
であり、実際にSOSなどで実用にされている複雑
な形状の半導体装置は報告されていない。
本発明者らは、実際用いられている様な複雑な
形状を有した島状のポリシリコン層に対するエネ
ルギービームアニール実験を各種のポリシリコン
パターン、種々のアニール条件（ビーム出力、走
査速度、温度など）で行なつた結果、次のような
結論を得た。即ち、エネルギービームアニール法
特に島状ポリシリコン層のアニールにおいては、
ポリシリコン層を溶融させる最適条件があり、こ
の条件を越えると、ポリシリコン層の一部が飛散
してしまう。
第１図はポリシリコン層に対するレーザアニー
ルの前後の状態を示すものである。まる、同図ａ
に示す様に、SiO2等の絶縁膜（図示せず）上に
ポリシリコン層１１を形成する。このポリシリコ
ン層１１は片持ち突起部１２、両持ち突起部１３
及び本体部となる直長部１４が形成されている。
次にレーザ光を方向１５の様にポリシリコン層の
上を順次走査させる。レーザ走査後のポリシリコ
ン層１１の形状を第１図ｂに示す。同ｂ図より明
らかな様に、片持ち突起部１２は飛散して原形が
ほとんどなくなつているが、両持ち突起部１３は
ほとんどそのまま残つている。これはポリシリコ
ン層１１を溶融するレーザ光をこのような微小な
突起１２にあてると、その部分で入力過剰となり
飛散してしまうためと考えられる。
以下、本発明に係る詳細な実施例を述べる。
実施例 １
第２図ａに示す様に、絶縁膜（図示せず）上に
ポリシリコン層のパターン２０を形成する。この
パターン２０には主体となるポリシリコン層２１
及び片持ち突起部２２が形成されており、それぞ
れのパターン巾は１２ａ，ｂとなつている。次
に、レーザ光によりポリシリコン層をアニールし
た。レーザにはAr連続発振を用い、走査速度100
mm／sec、横送り巾10μｍ、レーザスポツト径20μ
ｍ、基板温度350℃とした。尚、ポリシリコン層
２０はLPCVD法により厚さ5000Åの酸化膜上に
厚さ4500Åに形成されている。この結果を表１に
示した、同表中で〇印は主体となるポリシリコン
層２１と片持ち突起部２２共にアニールされてい
ることを示し、×印は突起部２２が飛散している
ことを、△印は主体となるポリシリコン層２１の
アニールが不十分であることを示している。
The present invention relates to a method of manufacturing a semiconductor device using energy beam annealing such as laser annealing or electron beam annealing, which has been rapidly developed in recent years. In recent years, there have been a number of reports about the fabrication of simple semiconductor devices by applying energy beam annealing to polysilicon layers. The semiconductor devices manufactured in these examples are all close to simple rectangles or squares, and there have been no reports of semiconductor devices with complex shapes that are actually used in SOS and the like. The present inventors carried out energy beam annealing experiments on island-shaped polysilicon layers with complex shapes, such as those used in practice, using various polysilicon patterns and various annealing conditions (beam output, scanning speed, temperature, etc.). ), the following conclusions were obtained. That is, in the energy beam annealing method, especially in annealing an island-like polysilicon layer,
There are optimal conditions for melting the polysilicon layer, and if these conditions are exceeded, part of the polysilicon layer will scatter. FIG. 1 shows the state before and after laser annealing the polysilicon layer. Maru, same figure a
As shown in FIG. 2, a polysilicon layer 11 is formed on an insulating film (not shown) such as SiO 2 . This polysilicon layer 11 has a cantilever protrusion 12 and a double-end protrusion 13.
A straight portion 14 serving as a main body portion is formed.
Next, the laser beam is sequentially scanned over the polysilicon layer in a direction 15. The shape of the polysilicon layer 11 after laser scanning is shown in FIG. 1b. As is clear from Figure b, the cantilever protrusion 12 has been scattered and has almost lost its original shape, but the double-end protrusion 13 has remained almost intact. This is thought to be because when the laser beam that melts the polysilicon layer 11 is applied to such a minute protrusion 12, the input becomes excessive at that portion and the laser beam scatters. Detailed embodiments of the present invention will be described below. Example 1 As shown in FIG. 2a, a pattern 20 of a polysilicon layer is formed on an insulating film (not shown). This pattern 20 has a main polysilicon layer 21.
and cantilever protrusions 22 are formed, each having a pattern width of 12a and 12b. Next, the polysilicon layer was annealed using laser light. The laser uses Ar continuous oscillation, and the scanning speed is 100
mm/sec, horizontal feed width 10μm, laser spot diameter 20μm
m, and the substrate temperature was 350°C. Note that the polysilicon layer 20 is formed to a thickness of 4500 Å on an oxide film of 5000 Å thick by the LPCVD method. The results are shown in Table 1. In the table, the ○ mark indicates that both the main polysilicon layer 21 and the cantilever protrusion 22 have been annealed, and the x mark indicates that the protrusion 22 has been scattered. The △ mark indicates that the main polysilicon layer 21 is not sufficiently annealed.
【表】
同表から、ａ＝2bを境界にして飛散状態が変
化することが分る。ここで、本実施例ではレーザ
アニールを用いた例を示したが、エレクトロンビ
ームを用いても同様のことが云える。
実施例 ２
実施例１における島状に残したポリシリコン層
にSiイオンを1016／cm2注入し、アモルフアス化
し、同様の実験を行つたが、全く同じ結果が得ら
れた。
実施例 ３
第２図ｂに示す様に、パターン巾ａのポリシリ
コン層２３とパターン巾b1，b2を有する片持ち突
起部２４，２５を有するポリシリコン層２０′を
形成し、実施例１と同様の実験を行つた。この結
果を表２に示す。同表からも明らかな様に、b1，
b2がａよりも大きいとき、一部間隔ｃが極めて小
さいときを除いて都合よくアニールされているこ
とがわかる。
尚、〇△×の意味については表１と同じであ
る。[Table] From the same table, it can be seen that the scattering state changes with a = 2b as the boundary. Here, although an example using laser annealing is shown in this embodiment, the same can be said even if an electron beam is used. Example 2 A similar experiment was carried out by implanting Si ions at 10 16 /cm 2 into the island-shaped polysilicon layer left in Example 1 to make it amorphous, and the same results were obtained. Example 3 As shown in FIG. 2b, a polysilicon layer 23 having a pattern width a and a polysilicon layer 20' having cantilever protrusions 24 and 25 having pattern widths b 1 and b 2 are formed. An experiment similar to 1 was conducted. The results are shown in Table 2. As is clear from the same table, b 1 ,
It can be seen that when b 2 is larger than a, the annealing is convenient except when the partial spacing c is extremely small. Note that the meanings of 〇△× are the same as in Table 1.
【表】【table】
【表】
以上説明した様に、本発明に係る半導体装置の
製造方法ではポリシリコン層の片持ち突起部のパ
ターン巾を主体となるポリシリコン層パターン巾
の1/2以上になる様に絶縁膜上に形成した後、エ
ネルギービームによりアニールするので、ポリシ
リコン層の飛散とほとんどなくすことが可能とな
り、製造歩留上極めて有用なものである。[Table] As explained above, in the method for manufacturing a semiconductor device according to the present invention, the pattern width of the cantilever protrusion of the polysilicon layer is set to be 1/2 or more of the pattern width of the main polysilicon layer. Since the polysilicon layer is formed on top and then annealed using an energy beam, it is possible to almost eliminate scattering of the polysilicon layer, which is extremely useful in terms of manufacturing yield.
第１図ａ，ｂはポリシリコン層をレーザアニー
ルする工程を示した上面図、第２図ａ，ｂは本発
明に係る実施例を説明する為に用いたポリシリコ
ンのパターン図を示すものである。
２０，２０′，２０″……ポリシリコン層、２
２，２４，２５……片持ち突起部、２１，２３，
２５……主体となるポリシリコン層、２６……両
持ち突起部。
Figures 1a and b are top views showing the process of laser annealing a polysilicon layer, and Figures 2a and b are diagrams of polysilicon patterns used to explain the embodiments of the present invention. be. 20, 20', 20''...polysilicon layer, 2
2, 24, 25...cantilever protrusion, 21, 23,
25...Main polysilicon layer, 26...Both supported protrusion.
Claims (1)
この本体部から前記本体部のエネルギービームの
走査方向と垂直な方向に突出したポリシリコンよ
りなる突起部を、前記突起部の前記走査方向の巾
が前記本体部の前記走査方向と垂直方向の巾の1/
２よりも大きくなるように形成し、前記エネルギ
ービームを前記本体部及び突起部に走査してアニ
ールすることを特徴とする半導体装置の製造方
法。1. On an insulating film, a main body made of polysilicon and a protrusion made of polysilicon protruding from the main body in a direction perpendicular to the scanning direction of the energy beam of the main body, the width of the protrusion in the scanning direction is 1/ of the width of the main body in the direction perpendicular to the scanning direction.
2, and the energy beam is scanned over the main body portion and the protrusion portion to perform annealing.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20856381A JPS58108732A (en) | 1981-12-22 | 1981-12-22 | Manufacture of semiconductor device |
| US06/660,255 US4563227A (en) | 1981-12-08 | 1984-10-12 | Method for manufacturing a semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20856381A JPS58108732A (en) | 1981-12-22 | 1981-12-22 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58108732A JPS58108732A (en) | 1983-06-28 |
| JPH0237085B2 true JPH0237085B2 (en) | 1990-08-22 |
Family
ID=16558251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20856381A Granted JPS58108732A (en) | 1981-12-08 | 1981-12-22 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58108732A (en) |
-
1981
- 1981-12-22 JP JP20856381A patent/JPS58108732A/en active Granted
Non-Patent Citations (1)
| Title |
|---|
| J.APPL PHYS * |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58108732A (en) | 1983-06-28 |
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