JPH02300870A - Picture processing device - Google Patents

Abstract

PURPOSE:To quickly and surely recognize a graphic with a small memory capacity by extracting feature data related to recessed parts of a graphic and recognizing the graphic based on this feature data. CONSTITUTION:Recessed part feature data of a picture is extracted by a picture processing part 300, and the degree of abstract of this data is higher than that of picture element data. That is, the recessed part chord length or the like is higher-order data though picture element data is 0th-order data, and picture data is inputted to the neural layer of the first stage but data of the recessed part chord length or the like is inputted to the neural layer of the succeeding stage in a neural network. Feature data related to recessed parts of the graphic is inputted to a prescribed neural layer of a graphic recognizing means 100 to perform the graphic recognition. The graphic recognizing means 100 has a required minimum number of neurons for graphic recognition to perform the graphic recognition with a small memory capacity. Thus, desired recognition processing is efficiently and surely executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing apparatus that is configured by a so-called neural network and that recognizes a figure using feature data regarding concave portions of the figure.

[Prior Art] For example, in character recognition, the presence of recesses and holes is a deciding factor in character recognition, and the unevenness of a figure is an important feature of the figure. The minimum convex figure that contains a figure is called a convex hull,
Concavities and holes are extracted from the shape obtained by removing the original shape from the convex hull, which is important for the analysis of the shape. It should be noted that the feature values indicating the shape of the concave portion include quadrature, concave chord length, concave arc length, and quadruple.

On the other hand, image processing devices based on the concept of neural networks are expected to be able to recognize a variety of images and achieve a high recognition rate due to the learning function or associative function of the neural network. The neural network is based on the neuron model shown in Figure 2 (
(hereinafter referred to as neurons) 1 are arranged in parallel and arranged in a layered manner as shown in FIG. In neuron 1, data DI+ input from the outside or from another neuron;
DI2, DI3, . . . each mouth 1n has a weight W2,
W2, W3, . . . W, l are multiplied, and the sum total thereof is compared with the threshold value θ. Various methods are possible for this comparison, but for example, when this sum is equal to or greater than the threshold 8, the output data DO becomes "1", and this sum is equal to the threshold θ.
It is determined that the output data DO becomes "0" when it is smaller.

The layer consisting of neuron 1, that is, the neural layer, is
Usually, a plurality of such neural layers are provided, and input data for a conventional image processing apparatus equipped with such neural layers is input to the first neural layer. Further, pixel data of a figure is generally given as this input data.

[Problem to be solved by the invention]

However, in such an image processing device, in order to perform the desired recognition processing from all pixel data, a huge number of neurons are required, and it is difficult to realize a practical device. The very act of inputting pixel data into a neural network is completely separate from biological system processing.

Furthermore, conventionally, there has been no established concept regarding the relationship between the configuration of a neural network and data to be processed, and it has been difficult to configure an image processing apparatus that reliably executes desired recognition processing.

The present invention was devised to solve these conventional problems, and an object of the present invention is to provide an image processing device that can efficiently and reliably execute desired recognition processing.

(Means for Solving the Problems) An image processing apparatus according to the present invention includes a graphic data output means for extracting feature data regarding a concave part of a graphic, and a graphic data output means connected to the graphic data output means, which applies a predetermined weight to the input data. Neurons are provided in parallel that output data according to the comparison result between the sum of products multiplied by the threshold value and the threshold value.
The present invention is characterized in that it has a neural layer having a layered structure according to the abstraction level of the feature data, and means for recognizing a figure based on this feature data.

[Effect]

Characteristic data regarding the concave portion of the figure is input to a predetermined neural layer of the figure recognition means, and figure recognition is performed.

The figure recognition means has the minimum number of neurons necessary for figure recognition, and performs figure recognition quickly and reliably with a small amount of memory.

(Example〕 The present invention will be explained below based on illustrated embodiments.

FIG. 1 shows a schematic configuration of an image processing device.

This image processing device includes an image input section 200 and an image processing section 3.
00, a recognition unit 100, and a system memory 400, which are interconnected through a system bus B and are also connected to a CPU 500. Image input section 2
00 includes an input device such as an image scanner and Ilo, and Ilo includes a data compression means, a memory for data retention, etc. as appropriate. The image processing unit 300 is the processing unit 3
10, and a frame memory 330 for holding images, and an image input section 340 is provided therein as desired. The recognition unit 100 includes an image processing unit 300 as will be described in detail later.
It performs figure recognition based on the extracted data obtained in , and has a multi-layer neural layer made up of neurons and a memory that stores the output data of this neural layer.

FIG. 4 shows a processing unit 310 in the image processing unit 300. The processing unit 310 transfers data selectively fetched from the frame memory 330 via the multiplexer 311 to the neighboring processing unit 312 via the local bus LB. ing. The neighborhood processing unit 312 holds data in units of predetermined neighborhood areas (for example, 3×3), and inputs these data in parallel to the calculation unit 320. The calculation section 320 has a numerical calculation section 321 and a state calculation section 325 , and the output of the neighborhood processing section 312 is input to the numerical calculation section 321 . The numerical calculation unit 321 is formed by sequentially connecting a multiplication unit 322, a selector 323, and an integration unit 324, and performs differentiation and other operator processing and inter-image calculations in the numerical calculation unit 321. In numerical calculations, for example, the density of each pixel is multiplied by a multiplier and then integrated numerically, but based on the inventor's knowledge that the same pixel is never multiplied by a multiplier with a different absolute value, A multiplication section 322 is arranged at the front stage. As a result, the number of kernels in the multiplication section can be set to a minimum value equal to the number of simultaneously processed pixels, and the number of gates in the subsequent separator 323 and integration section 324 is also reduced accordingly. Therefore, the numerical calculation section 321 can have maximum functionality with a small circuit, and the processing speed can be increased.

The data in the numerical calculation section 321 is led to the state calculation section 325, and the state calculation section 325 performs the following judgment or calculation on pixels within a predetermined neighborhood area.

i) Whether or not the center pixel is the pixel to be processed.

1i) Is there a pixel with a density different from that of the central pixel in the vicinity of 8?

1ii) Whether each pixel in the 8 neighborhoods is the same as the central pixel6iv
) Each number of TFDHs for Euler number calculation.

■) Degree of match with a predetermined pattern.

■) Others.

In this way, by performing the numerical calculations and the state calculations in parallel and in separate circuits, it is possible to improve the efficiency and speed of each circuit. Further, the output of the state calculation unit 325 is itself a valid feature quantity, or is valid data for extracting a feature quantity.

The output of the state calculation section 325 is inputted to the conversion section 313, and feature quantities are further obtained through processing such as feature extraction, integration, and comparison.

The conversion section 313 is constructed by connecting a light arithmetic section such as a full adder to a branch of the output of a high speed memory such as a static RAM, and feeding back the output of this light arithmetic section to the data input of the high speed memory.

With such a configuration, it is possible to repeatedly perform the same operation on the same data, and to perform complex operations such as data integration and data successive approximation at high speed in a small-scale circuit.

The outputs of the calculation section 320 and the conversion section 313 are on the output side.

The frame memory 331 is connected to the frame memory 331 through the local bus LB.
(memory 330 allocated to the output side).

The local bus LB on the output side further includes a sequential processing unit 31.
4 is connected, and sequential processing such as labeling and thinning is performed in this sequential processing section. The sequential processing unit 314 includes a line memory, a latch, and a logic unit, and performs sequential processing while referring to the processed density of the raster immediately before the pixel to be processed.

Such a processing section can obtain extremely diverse feature amounts at high speed, and can supply valuable feature amounts to the recognition section 100. Note that if a dual port memory is adopted as the frame memo U 330, data can be successively output and written at extremely high speed.

Next, the configuration of the recognition unit 100 will be explained based on FIG. 5.

The recognition unit 100 processes data input via the system bus B or from an input system directly connected to the recognition unit 100, that is, the image processing unit 300, and stores the processing results in the data memory 110 as final output data. Output.

A neural network is constructed in the recognition unit 100. As described above, the output data DO from each neuron of the neural network becomes "1" when the sum of the products of input data and weights is equal to or greater than the threshold value 0, and It is determined that when this sum is smaller than the threshold value θ, it becomes "0". That is, DO=f((Σ(W, XDl, )−θ)
(1), where f is a normalization function.

The recognition unit 100 has an output data generation unit 120 that performs an association function in a neural network, and the output data generation unit 120 calculates a linear threshold function (ΣW, A, −〇) for each neuron. . Each part of the output data generation section 120 is controlled by CP (J50Q).

The multiplication of W and Ai is performed in the multiplication circuit lPt121 in the output data generation section 120. W, A, every time
The calculation results are sequentially input to the integration circuit 122, and ΣW, A
, are calculated. The integration circuit 122 is the addition circuit 10
A flip-flop 105 is connected to 4 in a feedback manner,
After the addition result is temporarily held in the flip-flop 105, integration is performed by adding the next inputs of W and A and the held addition result. The calculation result of ΣW, A is input to the threshold processing unit 123, and the calculation of (ΣW, A, -θ) is performed. Furthermore, in the threshold processing unit 123, (
The calculation results of ΣW, A, -θ) are subjected to processing such as normalization, and are used as output data. The calculation result of (ΣW, A, -θ) is input to the data memory 11O via the buffer 106.

Since weight data and input or output data are input in parallel to the multiplication circuit 121, it has two input lines, and the buffer 106 is connected to one of the input lines. Used as a bidirectional input/output line. The buffer 106 becomes high impedance when data is transferred from the data memory 110 to the multiplication circuit 121.

Regarding the data of each neural layer, zero-order input data and weights of the first neural layer are manually input for the first layer, and primary output data and weights of the second neural layer are input for the 2N-th layer. That is, the output of the nth neural layer (0th order output data) becomes the input of the (n+1)th neural layer. In the data memory 11O, weight data is stored in a synaptic weight area 111, and input/output data is stored in an input/output data area 112. In addition, the threshold value of each neuron that should be set in the threshold processing unit 123 is determined by the data memory 110 or the system memory 1.
01, and is transferred to the threshold processing unit 123 before starting calculation for each neuron.

Next, a description will be given of how the image processing unit 300 calculates the features related to the concave portions of a figure, that is, the concave features.

FIG. 6 shows a figure including recesses A, B, C, D, and E (indicated by hatching), and a horizontal rectangle R circumscribing this figure is drawn. This horizontal rectangle R divides the boundary pixels of the figure into four quadrants. In Figure 6, the boundary pixels facing the left vertex of the horizontal rectangle are placed in quadrant I.
, the boundary pixel group facing the lower left vertex is quadrant 2, the boundary pixel group facing the lower right vertex is quadrant 2, and the boundary pixel group facing the upper right vertex is quadrant 2.

These quadrants provide useful information for detecting recesses.

A table as shown in FIG. 7 is created in which boundary pixels are arranged in chain order, including this quadrant information.

This table contains information as to whether the boundary pixel is an envelope point (in Figure 7, envelope points are indicated by an O mark, and non-envelope points are indicated by an X mark), the X coordinate, the X coordinate, and the chain code. It becomes more.

8(a) to 8(d) show the relationship between each quadrant and the chain code. FIG. )
Figure 8(c) shows the chain code that pixels other than the concave part can have in quadrant ■, and Figure 8(d) shows the chain code that pixels other than the concave part can have in quadrant ■. The chain code that can be taken by the pixel of is shown. In other words, in quadrant ■, the chain code is 4 to 6.
When a value other than
In quadrant (2), chain codes other than 2 to 4 reveal the presence of recesses.

However, there are cases where it is not possible to determine the presence of a recess using only one chain code, and in such a case, the following process is performed.

In Fig. 9, when the adjacent envelope points P+ and Pz are known, the slope of the straight line l connecting P and P2 (l in Fig. 9 has an inclination of 5/7 = 0.714, an inclination angle of θ-35, 5 degrees), the boundary pixels are sequentially tracked from one envelope point, for example, P, toward P2.

Here, the distance d between each boundary pixel and the straight line is given as an integrated value of the distance M change Δd based on the chain code of each pixel. In the case of FIG. 9, the relationship between the chain cord and the distance change Δd is as shown in Table 1.

Table 1 In Table 1, the distances of pixels located inside the figure from the straight line are taken as positive, and the distances of pixels located on the column side are taken as negative.

Boundary pixel Pb between envelope point P+P= in FIG. 9, ~Pbt4
If the integrated value of the distance when tracking from the P1 side is calculated based on Table 1, Table 2 is obtained.

Table 2 As is clear from Table 2, Pb, , and Pbz are located inside the figure from straight line 2, but since the distance d from the straight line is at most 0.466, they are generally not determined as concavities and are considered boundaries. For the first time in pixel Pb, the distance d2 is 1,135 and r
lJ and generally turns out to be a recess here.

Along with tracking this boundary pixel, Pb, ~Pb? , and if it is not a four-part part, the count value is invalidated, and if it is a concave part, the count value up to that point is invalidated, and if the count is performed up to the boundary pixel immediately before the next envelope point P, the concave arc length is calculated. is calculated.

When it is found that there are four parts between the envelope points P, P, the distance between the two envelope points is calculated from the X coordinates of the envelope points P, P, and the concave chord length is calculated. The following quadruple is calculated from the concave chord length, concave arc length, and perimeter length.

Quadruple − concave arc length / (perimeter length × concave chord length) In the determination of concave portions as described above, the distance d≧1 was used as a condition for the presence of a concave portion, but considering noise etc., conditions such as d > 2 may be set as appropriate. Can be set.

In the above processing, the table in FIG. 7 is read in sequence, the table in FIG. 7 is read in sequence while taking the integrated value of distance changes, and the conditions in FIG. 8 are determined while taking the integrated value of distance changes. Then, the integrated value reaches a predetermined value, or the 8th
When the conditions shown in the figure are not met, it is determined that there are four copies. If the boundary pixels are counted along with this boundary pixel tracking, the concave arc length can be determined at the same time, and the concave chord length can be calculated by calculating the distance between the envelope points after confirming the existence of the concave portion.

A conceivable method for calculating the feature amount regarding the concave portion is to once form a convex hull, and then subtract the original figure from this convex hull to generate a figure of only the concave portion.

However, as mentioned above, there is no guarantee that an accurate convex closure will be obtained by simply connecting the envelope points with a straight line.

The applicant of the present application has already filed a patent application regarding the formation of this strict convex hull in Japanese Patent Application No. 61-266719.

Such retained fat indicates the distinctive features of the shape of the figure, and can also represent the impression given to the visual system of the living body. Therefore, extremely effective data is provided to the recognition unit 100 in figure recognition such as character recognition in which recurrent features are considered important, and efficient recognition processing is possible. When the pixel data itself is used as input data like in a conventional neural network,
It requires a huge number of neurons, and it is often impossible to perform sufficient recognition processing depending on the suitability of the learning method.

Next, a description will be given of a neural network I-work that performs figure recognition based on figure pixel data and recurrent feature data.

The neural network is constructed in the recognition unit 100 (FIG. 1), and has a layered structure corresponding to the abstraction level of the feature data obtained from the concentration co-occurrence matrix, as will be described later.

Although the processing content actually executed by a neural network is extremely complex, assuming that an extremely simple logical operation is executed, the first
Examples will be described and the first basic idea of the invention will be explained.

Part 10 (a), (b), and (c) are the learning results A・(
B+C) This shows the neural node work that led to the execution of the logical operation in (2). 10(a) and (b) show comparative examples;
Figure (C) shows a first embodiment of the neural network.

In FIG. 10(a), the number 23 of all combinations of three data A, B, C in the data group 10 is provided in the first stage neural layer 20, and neurons 21 to 2 are provided in the first stage, and the number 23 = 8 neurons 21 to 2 are provided.
In the second stage neural layer 30, first stage neurons 21~
28 shows a configuration in which one neuron 31 is provided to calculate the OR (m-arithmetic sum) of 28 outputs. In the figure, the numerical value "000" added above the neurons 21 to 28 indicates a bit pattern consisting of data A, B, and C, and these neurons output "1" when this bit pattern is input. " is output. In this neural network, the number of neurons is 9, the number of synapses and the number of input paths connected to neurons is 32, the efficiency of neurons and synapses is extremely low, the required memory capacity is large, and the processing time is also large. It is.

Figure 10(b) expands (2) 2 as follows, and A-
B + A-C (3) This is an example in which the calculation is simplified, and the first neural layer 20 includes neurons 21 for processing the calculation of A-B.
．． A neuron 22 is provided for processing the calculation of A-C. The second stage neural layer 30 includes neurons 21.
It has a neuron 31 that calculates the OR of the outputs of 22.

In the neuron 21, the weights W, ~W3 for data A, , B, and C are, for example, W, -1, W2=1, W:
l = 0, A W + + B W z + CW 3≧2
At the time of (4), an output "1" is output. Therefore, in this case, the threshold value θ-2 is set. Similarly, in the neuron 22, the values are W4-1, W, -0, W6-1, and θ-2. On the other hand, in neuron 3I, they are W7-1, W6-1, and θ-1.

In the neural network shown in Figure 10(b), the number of neurons is 3, the number of synapses is 8, and the number of neurons in Figure 10(a) is 8.
), the neuron efficiency and synaptic efficiency are significantly improved. However, as described below, according to the present invention, these efficiencies are further improved.

FIG. 1C shows a first embodiment of the neural network of the present invention, and this configuration has an initial neural layer 20 and a second neural layer 30, and the initial neural layer 20 contains data B. , C are input, and data A is directly input to the second stage neural layer 30. In the first neural layer 20,
One neuron 21 is provided to perform the calculation of (B10), and the second stage neural layer 30 includes A(B+
One neuron 31 is provided for performing the calculation of C). For example, the neuron 21 has a weight W1=1, W2-
1, set to θ-1, BW, +CWZ≧1
When (5), an output "1" is output. On the other hand, the neuron 31 is set to, for example, W3-1, W4=1, θ-2, and if the output of the neuron 21 is Yl, then Y I
When W z +A W 4≧2 (6), the output r1. Output. In this example, the number of neurons is 2 and the number of synapses is 4, and the neuron efficiency and synapse efficiency are significantly improved compared to the comparative example shown in FIG. 10(b).

Here, the first basic idea of the present invention will be explained.

Paying attention to equation (2) again, data B and C1 are connected by one operator r+(OR)J, and data A is connected by the operator "×(AND)J" for the operation result. .Therefore, originally data B, , C and data A
are not things that should be evaluated in the same dimension, and if we dare to evaluate them in the same dimension, Figure 10 (a) and (b)
) results in a decrease in efficiency, as shown in the comparative example.

Here, it is assumed that the processing content of the neuron is as follows (only the evaluation of force expressions).

ΣW, A, -θ (7) (However,
W: Weight, A: Input, θ: Threshold) Then, it is assumed that the degree of abstraction can be defined for each data, and this degree of abstraction is called "degree."

This order is defined as the order of the output data increasing by one order relative to the input data of one neuron.

Further, it is defined that data connected by one operator have the same degree.

According to this definition, in the case of equation (2), data B,
C is of the same order, and data A is one order higher than that. Here, if "0" is given as the order of data B and C, the order of the data is "1".

Considering the relationship between the order of this data and the hierarchy of the neural layer, in FIG. 10(c), only 0th order data is input to the neural layer 20, and only 1st order data is input to the neural layer 30. has been done. Therefore, it is clear that the neural layers 20, 30 can be associated with the order of the input data, and hereinafter the same order as the input data will be defined for the neural layer as well.

Then, the neuron efficiency and synaptic efficiency are optimized by classifying the data group to be input into the neural network according to its degree and inputting the data of each degree to the neural layer of the corresponding degree.

Furthermore, as explained in relation to FIGS. 10(a) and (b), it is also possible to process high-order data by reducing it to a lower order, and in this case, neuron efficiency and synaptic efficiency decrease. . Therefore, the degree of each data should be based on the highest possible degree of that data.

Note that one data may be used for multiple orders, such as (A+B)・B, and in this case, 1
One piece of data may be input to multiple neural layers.

As an example to more clearly explain the abstraction, which is the original meaning of the degree, FIGS. 11(a) to 11(C) show a configuration for determining the end points of a figure.

There are various ways to consider the end points of a figure, but here,
In the 3x3 convolution (Fig. 11(a)), when any of the patterns shown in Fig. 11(b) (t) to (viii) occurs, the central pixel (Fig. 11(a)
It is assumed that pixel E) of ) is an end point.

This end point is judged as an "end point" when any one of the pixels A-D, F-I other than the center pixel has a figure density (for example, "1") and the center pixel E has a figure density; ``There is no end point'' when .

For example, the neural network for this judgment is
The neural network is constructed as shown in FIG. 1(C), and this figure shows a second embodiment of the neural network. This neural network has a first stage neural layer 20 having eight neurons 21 to 28 and a second stage neural layer 30 having one neuron 31, and has pixels A-D, F
~I(7) data is manually input to the first-stage neural layer 20, and the cheetah of pixel E is manually input to the second-stage neural layer 30.

Neurons 21 to 28 of the first stage neural layer determine that only B, only C, and so on are figure pixels "1", and neuron 31 of the second stage neural layer 30 determines that each of neurons 21 to 28 has a figure pixel "1". Either one is rlJ
and when E is the figure pixel "1", the output r
Output lJ.

If each pixel data A to D and F to ■ is considered as zero-order data, the output of the neuron 31 becomes second-order data. Therefore, when the data of each pixel is considered as zero-order data, it can be seen that the end point data can be handled as secondary data.

The image processing unit 300 outputs various data such as the number of groups, order, Euler number, texture features, etc.
The order of these data should be considered and input directly to the optimal neural layer.

In this embodiment, the concave feature data of the image is
Extracted at 00. This concave feature data is highly abstract compared to pixel data. In other words, while pixel data is zero-order data, concave chord length, etc. are higher-order data, and in the neural network, pixel data is input to the first stage 2J--ral layer, and data such as concave chord length is input to the neural network. should be input to the subsequent neural layer.

FIG. 12(a) shows a third embodiment of the neural network. In this embodiment, the neural network has a data group IO and a neural layer 20.90, and the layer 90 outputs output data to the recognition unit 100. This is the output layer.

Data group 10 is the first group of data 1m12.13
...and the second group's data 14.15.16...
・Consists of. That is, the data in the data group IO is classified into two types, a first group and a second group, according to their order.

Neural layer 20 is neuron 2L22.23...
・The output layer 90 has neurons 91.92
．． It has 93... Each neuron of neural layer 20 is connected to each neuron of output layer 90.

The first group of data 11, 12, 13... are input to each neuron of the neural layer 20, and the second group of data 14, 15, 16... is input to each neuron of the output layer 90. .

Each neuron of the neural layer 20 is configured, for example, as described above (
1) As shown in the formula, the sum of each input data multiplied by a weight is compared with the threshold value j~, and according to the result of this comparison, the output data r1. Or output roi. Each neuron in the output layer 90 is connected to the neural layer 20
Data for each neuron and the second group 14.15
．． 1G... are multiplied by their respective weights, and depending on the result of comparing this sum with a threshold, data of "1" or "0" is outputted, similar to the neurons of the neural layer 20.

For example, in the data 11, 12, 13, etc. of the first group, the pixel is "l" (for example, black) or "0" (for example, white)
The second group of data 14, 15, 16, . . . is high-order data indicating the characteristics of the image.

Thus, in the third embodiment, the first group of data, ie, low-order data, is input to the neurons of the neural layer 20, and the second group of data, ie, high-order data, is input to the neurons of the output layer 90. .

Therefore, the neurons in the neural layer 20 perform lower-order processing, for example, processing on the data of the pixel itself, and the neurons in the output layer 90 perform higher-order processing, such as processing on various properties of pixels, etc. .

In this way, in the third embodiment, high-order data is input directly to the output layer 90 and not to the neural layer 20, so the number of synapses, that is, the number of connections between input elements and neurons or between neurons is reduced. However, the number of neurons also decreases. As the number of synapses decreases, the number of operations required for neurons decreases, so
The calculation speed increases and the number of weight data decreases, so
The memory capacity is also small. Furthermore, when the number of neurons is reduced, the number of threshold values is also reduced, which reduces the memory capacity, reduces the number of calculations, and increases the calculation speed. According to this embodiment, high-speed arithmetic processing can be performed with a small memory capacity, and a highly efficient image processing device can be obtained with a simple circuit.

FIG. 12(b) shows a fourth embodiment of the neural network, and the image processing device in this embodiment has three groups of input data 10, a neural layer 20.
30 and an output layer 90.

The input data group IO is the first group of data 11.12
．． 13... and the second group's data 14.15.1
6...and the third group's data 17.18.19.
...and is provided. That is, unlike the third embodiment, the input data group is classified into three types. The first neural layer 20 has neurons 21,22,23... and the second neural layer 30 has neurons 31.
It has 32.33... The output layer 90 has neurons 91, 92, 93, . . . . Each neuron of the first neural layer 20 is connected to each neuron of the second neural layer 30, and each neuron of the second neural layer 30 is connected to each neuron of the output layer 90, respectively.

The first group of data 11, 12, 13... are applied to each of the first neural layers 20, and the second group of data 14, 15, 16... are applied to each of the second neural layers 30. Data 17 of the third group is added to the neuron.
．． 18, 19... are connected to each neuron of the output layer 90, respectively.

As in the third embodiment, each two-neelon is, for example, -g (
1) According to the formula, output data "1" or "0" is output according to each input data. The first group of data 11.12.13... is zero-order data, the second group of data 14.15.1G... is first-order data, and the third group of data 17.18.19... is This is secondary data. That is, high-order data is input to the second neural layer 30, and even higher-order data is input to the output I/ear 90.

In this fourth embodiment, as in the third embodiment, the number of synapses decreases, and the number of Nino and Ron also decreases. Therefore, the same effects as in the third embodiment can be obtained.

FIGS. 13(a) and 13(b) show a fifth embodiment of the neural network together with a comparative example, and this example shows a case where input data is processed according to the logical operation (AeB) e(CeD). Here, e indicates "exclusive OR J, and A, B, C, and D are digital values of "1" or r□, and the result of this logical operation is also "1.
” or as a digital value of “0”.

FIG. 13(a) shows a comparative example, and this device 1 has an input data group 10 for passing input data, first and second neural layers 20, 30, and an output layer 90. The input data group 10 is input data A, B, C, D.
Consisting of The first neural layer 20 has 4 neurons 21.22.23.24 and the second neural layer 30 has 4 neurons 31.32.33.34
has. Each data A-D is input to each neuron of the first neural layer 20, and each neuron of the first neural layer 20 is connected to each neuron of the second neural layer 30, respectively. On the other hand, the output layer 90 has one neuron 91, and each neuron of the second neural layer 20 is connected to this neuron 91, respectively.

In the first neural layer 20, each neuron 2
1 has a weight and a threshold by which each input data is multiplied, and according to equation (1) above, when the sum of the products of each input data and the weight is greater than or equal to the threshold, output data "1" is output, and this sum When is smaller than the threshold value θ, output data “O” is output.

Similarly, the neurons 22, 23, and 24 output "IJ" or "0" according to each input data. Similarly, in the second neural layer 30, each neuron outputs "1" or "0" depending on the input data.

Similarly, the neurons 91 of the output layer 90 output data of "1" or "0" according to the output data from the neurons of the second neural layer 30.

Now, the result of the logical operation (AeB) e(CeD) is, when data A and B do not match and C and D match, and when A and B match and C and D do not match,
1”. In other cases, it is "0". Therefore, in FIG. 13(a), each neuron is configured as follows.

In the first neural layer 20, neurons 21
, 22.23.24 are respectively "0IXXJ,'l
0XXJ, rxxol", rXXlo", outputs "1", and otherwise outputs "O". Here, rX
XJ means ignore the data. On the other hand, in the second neural layer 30, the neuron 31 outputs "1" when only the neuron 2' of the first neural layer 20 outputs "1", and otherwise outputs "1".
0" is output. Further, the neuron 32 outputs "1" when only the neuron 22 of the first neural 1/ear 20 outputs "1", and outputs "0" at other times. Similarly, when only the neuron 23 of the first neural layer 20 outputs "1", the neuron 33 outputs "1".
Further, the neuron 34 outputs "1" when only the neuron 24 of the first neural layer 20 outputs "1". On the other hand, the neuron 91 of the output layer 9o outputs "1" when at least one neuron of the second neural layer 30 outputs "1".

Therefore, if the input data of A, B, C, D is a bit pattern of rooolJ, the first neural layer 2
0, only neuron 23 outputs "1", and the other neurons 21, 22, 24 output "0". As a result, the neuron 33 in the second neural layer 30 outputs "1", and the neuron 91 in the output layer 90 outputs rlJ. Similarly, A and B
,C,D are roolo, ,roioo, ``1000
", rlllo", rlloIJ, rloll", '0
In the case of IIIJ, one of the neurons in the second neural layer 30 outputs "1", and the neuron 91 of the output layer 90 outputs "1".

FIG. 13(b) shows a fifth embodiment of a neural network, this device having an input data set 10, first, second and third neural layers 20, 30, 40 and an output layer 90. The input data group 10 consists of input data A, B, C, and D. first neural layer 20
has 4 neurons 21.22.23.24, the second neural layer 30 has 2 neurons 31.32, and the third neural layer 40 has 2 neurons 41.4.
2. The output layer 90 has one neuron 91.

Data A to D of the input data group are input to each neuron of the first neural layer 20, and each neuron of the first neural layer 20 is connected to each neuron of the second neural layer 30, respectively. Each neuron of the second neural layer 30 is connected to each neuron of the third neural layer 40, and each neuron of the third neural layer 40 is connected to a neuron of the output layer 90.

Each neuron in each neural layer 20, 30, 40 and output layer 90 is set to "1" or "0" depending on the input data, as in the case of FIG. 13(a).
Output.

In the first neural layer 20, neurons 21
．． 22.23.24, when A, B, and CSD are expressed as 4-bit patterns, they are respectively "0IXXJ, rloxx
J, rxxol”, rXXlo”, outputs “1”,
Otherwise, "OJ" is output. On the other hand, in the second neural layer 30, the neuron 31 outputs "I".
When outputting J, output ``E'', otherwise output ``0''. Further, when the neuron 23 or 24 of the first neural layer 20 outputs "1", the neuron 32 outputs r1. is output, and "0" is output otherwise. In the third neural layer 40, the neuron 41 outputs "1" when only the neuron 32 of the second neural layer 30 outputs "1", and otherwise [0
" is output. Further, the neuron 42 outputs "1" when only the neuron 3I of the second neural layer 30 outputs "l", and outputs "0" at other times. On the other hand, the neurons 91 of the output layer 90 indicate that at least one of the neurons of the third neural layer 40 is "1".
”, outputs “1”.

Therefore, if the input data of A, BlC, . " is output. As a result, only the neuron 32 in the second neural layer 30 outputs "1", and the neuron 42 in the third neural layer 40 outputs "1". Therefore, neurons 91 of output layer 90
outputs rlJ. Similarly, A, B, C, and D are
0010'',roloo,,rtoooJ,rl 1
1 0J, rllol ko, rlo
llJ, “0111”, in the second neural layer 30, any neuron is “1”
As a result, one of the neurons in the third neural layer 40 outputs [1j, and one of the neurons in the fourth neural layer 40 outputs rl. Therefore, the output layer 90
The neuron 91 outputs "1".

As can be easily understood from FIG. 13(a), in the comparative example, the number of synapses is 36, and the number of two-neelons is 10.
It is. On the other hand, in this embodiment, FIG.
), the number of synapses is 30 and the number of neurons is IO. Shikashite, logical operation (,113
B) It is understood that when input data is processed by e(CeD), 36 synapses were required in the comparative example, but only 30 synapses are required according to the present example.

That is, according to this embodiment, the number of synapses is reduced by about 20%, and the same effects as described in the above embodiments can be obtained. In other words, by increasing the number of neural layers and setting the number of neurons in the neural layer constructed on the output layer 90 side to be equal to or less than the number of neurons in the preceding neural layer, the number of synapses can be reduced, and the number of synapses can be reduced. The memory capacity of the processing device can be reduced and the calculation speed can be improved.

Figures 14 (a) and (b) show the sixth embodiment of the neural network together with a comparative example. In this example, input data is subjected to logical operations ((AeB) e(C69D)) eE (8). Indicates when to process.

FIG. 14(a) shows a comparative example, where the input data group 10 is 5
The first layer 20 has 15 neurons, and the output layer 90 has 1 neuron. In the comparative example, each term obtained by expanding the above equation (8) is input to each neuron of the neural layer 20. Therefore, all data is processed as zero-order data.

On the other hand, Fig. 14(b)! - A sixth embodiment of a neural network is shown, and this configuration includes an input data group 10 and a first, second, third and fourth neural layer 20.
．． 30, 40, 50, and an output layer 90. First neural layer 20 and second neural layer 3
0 performs processing according to (AeB) and (CeD), respectively, and the third Niera/[/L/Year 40 performs processing according to ((AeB)
Perform processing according to e(ID)l. Then, by the fourth neural layer 50 and the output layer 90, ((A
eB) @ (CeD)) The final result by eE is determined.

As can be understood from the comparison between FIG. 14(a) and FIG. 14(b), in the comparative example, the number of synapses is 80 and the number of neurons is 16, whereas in the present example, the number of synapses is 32, and the number of neurons is 10. According to this embodiment, the number of synapses is reduced by about 40%, and the number of neurons is reduced by about 60%. Therefore, in this embodiment as well, effects similar to those described in each of the above embodiments can be obtained.

As can be understood from the above description, in the present invention, the layered structure consisting of the input data group, neural layer, and output layer has the order required for image processing,
The input data needs to be optimally configured according to the order of the input data, and the input data is input into a layer that matches the layer structure.

Note that the degree here means the degree of abstraction of data or processing content, as described above.

Now, in order for a neuron to perform the processing described above, the weights must be determined to appropriate values through learning. Therefore, in this embodiment, the weights are changed exponentially over time, as will be described later. There are three methods for modifying the weights, as disclosed in Japanese Patent Application No. 63-297541, and these will be referred to herein as Mode (2), Mode (2), and Mode (2), respectively.

In mode I, as shown in FIG. 15, the weight of a neuron is modified based on the output of that neuron. This correction method is effective when the target value of the output of each layer is clear. Now, when the neuron produces an output in response to a certain input, and the output matches the target value or is sufficiently close to the target value, the relationship between the input and output at that time should be strengthened. This corresponds to increasing the weight of synapses given significant input. In mode ■, the target value of the output of each neuron is known in advance, so the output of each neuron is compared with the target value, and when the two match or are sufficiently close, e.g.
In the case of value input, the weight of the synapse to which "1" is input is increased.

As shown in FIG. 16, mode (2) is one in which the weights of the neurons are modified based on the evaluation results of the final output. This correction method is effective when determining the processing content of the image processing apparatus from a global perspective. As an evaluation method in this mode, evaluation of the Hamming distance or Vitagoras distance between the final output of the output layer and the target value, or sensitive evaluation is possible. As a result of this evaluation, if the output matches or is sufficiently close to the target value, the input-output relationship at that time should be strengthened, and at that time, for example, the weight of each synapse to which [■] is input is increased.

Mode (2) is a weight modification method for a type of learning in which inputs are memorized as they are, and strengthens the relationship between the input and the output that originally occurred for that input. That is, the 15th
In the configuration shown in the figure, the weight of the synapse to which "1" is input is increased in Nico and -Ron, which output "1" in response to that input.

In modifying the weights in this manner, the inventors first assumed that changes in the weights of neurons were changes in the membrane potential of neurons in the living body. In other words, if the weights are set similar to the membrane potential in biological nerve cells, it is thought that the learning efficiency in the image processing device will be extremely high, similar to that in biological brain cells. And also, if the weights show a similar change to the membrane potential, then the change is similar to the general RL C
It is thought to be expressed by an exponential function like a circuit. Therefore, the weight W is, as shown in FIG. 17, W−±exp(
t) It is expressed as (9). However, t represents the learning time in each neuron, that is, the number of learning times.

(9) In 2, if the synapse is excitatory type, the sign becomes 10, and the weight W starts from O and increases rapidly at first, as shown by the solid line ■, and the weight changes as time passes from the start of learning. The amount decreases to the maximum value W. approach. On the other hand, if the synapse is of the inhibitory type, the sign becomes -, and the weight W starts from O, as shown by the solid line J, and gradually decreases as time passes from the start of learning. The amount of change becomes smaller and approaches the minimum value W.

Immediately after the start of learning, there is not much data correlation for that synapse, so the weight W at this time is set small;
Thereafter, as the data correlation increases, the weight W rapidly increases, which speeds up the convergence due to learning. On the other hand, if learning has progressed and the weight W has already become large, that synapse has sufficient data correlation in the learning up to that point. Therefore, if the weight W is changed unnecessarily, it will simply cause oscillation and impede the convergence in learning, but since the weight W is set so that it hardly changes, sufficient convergence can be achieved. can get.

Conventionally, inhibitory and excitatory neurons have been considered as the output characteristics of neurons, and in order to optimally place them in an image processing device, a detailed study that takes into account the processing content is required. The connections between type neurons and excitatory type neurons are complex. However, according to this embodiment, by simply selecting the sign of the weight W as 10 or - as a characteristic of one synapse, it is possible to arbitrarily realize an inhibitory type or an excitatory type. Therefore, the circuit configuration is simplified and the circuit is free. The degree increases. It has been well known since Rosenblatt (1958, Rosenblat, t'The perce) that the presence of inhibitory neurons improves the separability of data.
ptron: a probabilistic
model for information
organization and organization in
the brain''.

Psychological Review 65:
386-408).

According to this embodiment, the efficiency of learning in the image processing device is improved, and the purest output data can be quickly converged and stabilized. Furthermore, as described in 1.L, suppressive and excitatory characteristics can be obtained by simply changing the positive or negative sign of the weight W, increasing the degree of freedom in the circuit of the image processing device.

Note that the temporal change in the weight W does not necessarily need to be determined exactly as an exponential function, and may be approximated by, for example, a polygonal line.

Next, seventh to ninth embodiments of the neural network will be described, and the second basic idea of the present invention will be explained.

FIG. 18(a) shows a seventh embodiment of the neural network of the present invention, in which the learning result (A+B)
This figure shows the two-way network that was used to execute the logical operations.

This configuration has one neural layer 20, and this neural layer 20 is provided with the same number of neurons 21 and 22 as the number of data, that is, two neurons. Data A and B are input to each neuron 21 and 22, respectively. Each neuron 21, 22 has a weight Wi at a connection portion with the input path of each data, that is, a synapse, and a threshold value θ. The weight W changes due to learning, and the neuron comes to perform a predetermined process. In this embodiment, as a result of learning, only one neuron 21 processes the logical operation (A+B), and the other neuron 22 does not substantially act. That is, the neuron 21 has, for example, W, -1,
w2-1 and θ-1 are set, and when AW, +BW2≧1, output data “1” is output. -Kani J, -Ron 22 are set to, for example, W3 = O, W- = Q, θ-1, so that A W3 + B W4 < 1 always, never exceeding the threshold θ, and the output data "0"
Output.

Thus, the neuron 21 outputs output data rl when at least one of data A and B is rl, and the neural network of this embodiment performs a logical operation (A+B).
Execute.

FIG. 18(b) shows the eighth embodiment.
It shows the neural network that has come to execute the logical operation of the learning result (AeB). This configuration is 2
The first neural layer 20 is provided with neurons 21.22,
In addition, the second row of neurons 304 is neuron 31.32.
is provided. Data A and B are input to neurons 21 and 22 of the neural layer 20 at the first stage.

The logical operation (,IB) is expanded as (AB+AB),
In the neural layer 20, neurons 21 (A
Processing B) is performed, and the neuron 22 performs processing (AE). That is, the neuron 21 is, for example, W+ -1,
When W2=1 and θ-1 are set, and A W 1 + B W z≧1, output data “l” is output. On the other hand, the neuron 22 is set to, for example, W, -1, W4--1, θ-1, and when AW, +BW, ≧1, the output data r1. Output.

The neurons 31 of the neural layer 30 are (XB+A
Perform the process B), for example, W, -1, W6-1, θ-1
If the output of neuron 21 is Y9 and the output of neuron 22 is Y2, then Y+ Ws +'Yz Wb
When ≧1, output “1”. On the other hand, neuron 32 does not substantially function.

Therefore, the neuron 31 outputs output data "1" when only one of the data A and B is "1", and both of them output "1".
” or r□, output data “0” is output, and the neural network of this embodiment executes a logical operation (AeB).

FIG. 18(C) shows a ninth embodiment, and this embodiment shows a neural network that has come to execute the logical operation of (A + B) C as a result of learning. This configuration is 2
The first neural layer 20 is provided with Nigo, -ron 21, 22, and 23, and the subsequent neuron 30 is provided with a neuron 31.
．． 32.33 are provided. First stage neural layer 2
Data AXB and C are input to neurons 21, 22, and 23 of 0.

In the neural layer 20, the neurons 21 are (A
+B) is performed, the neuron 22 does not substantially act, and the neuron 23 outputs the input data C as is. That is, the Futami-Ron 21 is, for example, Wl-1, W2-
1, W3 = O, o-1, and when A W l + B Wz + CWz≧1, output data rl is output. On the other hand, in the neuron 22, the weights Wl, Ws, W& are set to O, and the threshold value θ is set to 1, so that the neuron 22 does not substantially act. Further, the neuron 23 has, for example, a weight W7-0, Ws =O,
, W9 = i, θ-1, and A W? + B Ws + When CW9≧1, output data “1” is output, and in other cases, output data “0” is output.

The neuron 31 of the neural layer 30 performs (A+B)C processing based on the output data of the near 1-ron 2L 23 of the neural layer 20, for example, W, -1, Wl.
2=O, Wl3-1, θ-2, neuron 2
If the output of 1 is Yl, the output of neuron 22 is Y2, and the output of neuron 23 is Y3, then Y+ Wll + YZ Wl2 + Y:l Wl3
≧2, output data r1. Output. On the other hand, neurons 32 and 33 have virtually no effect.

Thus, the neuron 31 outputs the output data "1" when at least one of the data A and B is "1" and the data C is [1], and the neural network of this embodiment performs the logical operation (A+B ) Execute C.

The second basic idea of the present invention will now be explained.

In the seventh embodiment, data A and B are one operator r+
(OR)J, and this logical operation (A+
B) is performed by one neural layer 20.

In the eighth embodiment, data A and B are "e(EX-O
R), and this logical operation (AfE9
B) is expanded as (AB+AE).

And in the first stage neural layer 20, AB and AH
is executed, that is, a logical operation on the operator rx (AND) is executed. Next, in the second stage neural layer 30, (AB+AB), that is, the operator r
+ A logical operation on (OR)J is performed. Thus, the logical operations in the eighth embodiment are executed by two neural layers.

In the ninth embodiment, data A and B are one operator r+
(OR)J, and this logical operation is executed by the neural layer 20 at the first stage. Data C is the operator rx (AND) for the logical operation result.
J, and this logical operation (A+B)C is executed by the second stage neural layer 30. Thus, the logical operations in the ninth embodiment are executed by two neural layers.

In this way, when the processing content of the neural network is expressed by the logical operators rANDJ and "OR," the number of neural layers increases depending on the number of logical operators or the configuration of the logical operations.

Note that the order of each data is as described above, and according to its definition, for example, in the eighth embodiment that performs a logical operation (AeB), if data A and B are of order 0, each neuron of the first stage neural layer 20 At 21 and 22, AB and AH processing are executed, and the primary output data is input to the neurons of the second stage neural layer 30. Then, in the second stage neural layer 30, (
AB+AB) processing is executed and secondary output data is output. That is, the final output data is quadratic, and the logical operation (AeB) is considered to be processed by the number obtained by subtracting the degree of the input data from the degree of the final output data, that is, by two neural layers.

The inventors can determine the number of neural layers by determining how high the order of the final output data is with respect to the input data.
The number of layers in /ear was estimated to be the number obtained by subtracting the degree of human data from the degree of final output data. This is the second basic idea of the present invention. As mentioned above, the degree is the abstraction level of data, and is determined by the properties of the data.

For example, in figure recognition, pixel data is 0th order, and in the case of recurrent feature data, quadrature, concave arc length, concave chord length, and quadruple data are of higher order. When performing figure recognition, it is sufficient to provide as many neural layers as the order of the data minus the order of the pixel data.

Furthermore, when obtaining end point data from pixel data, it is sufficient to take into consideration the degree of end point data, that is, the degree of abstraction, and provide neural layers equal to the number obtained by subtracting the degree of pixel data from the degree of end point data. An embodiment in this case will be described later with reference to FIGS. 20 and 21.

FIG. 19 shows a tenth embodiment of the neural network, and this example shows the result of learning, input data A,
A case is shown in which B, C, and D are processed according to logical operation (19B) e (CeD). Note that A, B
, C and D are digital values of "1" or "0", and the result of this logical operation will also be explained as being output as a digital value of 'IJ' or "0".

This example uses four neural layers 20.30.4
0.90, and the final stage neural layer 90 is an output layer that outputs final output data. The first neural layer 20 has 4 neurons 21.22.23
．． Similarly, the second neural layer 30 has four neurons 31, 32.33.34, and the third neural layer 40 has four neurons 41.42.4.
3.44, the output layer 90 has four neurons 919
2.93.94. Each data A to D is input to each neuron of the first neural layer 20, respectively. Note that each neuron is connected to each neuron in the adjacent neural layer, but for the sake of simplicity, lines that are not substantially related to the action are omitted from the diagram.

Each neuron has a weight W by which the input data is multiplied and a threshold θ, and according to the above equation (1), when the sum of the products of each input data and the weight is greater than or equal to the threshold, the output data “
l'', and when this sum is smaller than the threshold θ, output data roj is output.

The logical operation (AeB) is expanded as (AB+AB), and in the neural layer 20, the neuron 21
), and the neuron 22 processes (AJ). The logical operation (CeD) is expanded to (CD+Cl5), the neuron 23 processes (CD), and the neuron 24 processes (CI5).

That is, the neuron 21, for example, Wz+-1, W2□
-1, Wzz=O, W24=0, θ-1, AW2. 10BW2□+CW 2 :I +D W 24
When ≧1, the output data “1go” is output. Neuron 2
2 is, for example, W25-1, W26=I, Wzt=0
, W z s-0, θ-1, and output data "1" when AWz5+ BWza+ CWzt+ DWzs≧1. Similarly, the weight W8 and threshold value θ of neurons 23 and 24 are determined.

The neurons 31 of the neural layer 30 are (AB+,
13) is performed, for example, Wt+=1, W.

−1, Wzy−0, Wffa=O1θ−1,
Letting the outputs of neurons 21, 22, 23, and 24 be L, M, and N, respectively, KWIshiL W : I Z + M W s s +
N W: When l a≧1, output data “l” is output. Similarly, two! -1] 733 processes (CD+Cr5) and outputs output data "1" when at least one of the outputs of the neuron 23 and 24 is "1". Note that the weights W and B of the neurons 32 and 34 are set to 0, and these neurons do not substantially act.

Therefore, neuron 31 outputs the result of (AeB), and neuron 33 outputs the result of (COD>).

The outputs of neurons 31, 32, 33, and 34 are E
, F, G, and H, the neuron 41 of the neural layer 40 processes (EC), and the neuron 4
3 performs the processing of (EC). That is, neuron 41
For example, Wa, ==1, W4□-0, W43
= 1, W < 4 = set to O1θ-1, E W a l+ F W a□ 10G W a 1+H
When W 4 a≧1, output data “1” is output. Similarly, the neurons 43 are, for example, W4s-1, W46-
0, W47--1, Wa, l-0, θ-1, E W 4 S + FW 46 + G W a
7 + HW 4 When B≧1, output data “l” is output. Each weight W, of neurons 42, 44 is set to 0, and these neurons have virtually no effect.

The neuron 91 of the output layer 90 is (E c +EC
), for example, W, , -i, W 9 z =
01W9:l-1, Wqa=O2θ-1, and the outputs of neurons 41, 42, 43, and 44 are set to P, respectively.

Assuming Q, R, and S, P W91 +QWqt +RW93+S W94≧1
When , the output data "Output 1. Neuron 92.
93.94 has virtually no effect. If the purpose of use is thus limited and the number of output data is clear, neurons that do not substantially function can be omitted.

Therefore, the neuron 91 outputs the result of (EeG), that is, the ((jBD)(D) result of (AeB).

The order of the output data in the logical operations (A69B) and (([D) is given by the operator [e(EX-O
R) Since J is replaced by two operators rANDJ and ORJ, each is 2. Therefore, the order of the output data in the logical operation (A69B) e (CeD) is 4, and this logical operation It is reliably processed by a four-layer neural layer with the same number of neurons (four).

FIGS. 20 and 21 show a neural network for determining the end points of a figure.

Here, how to understand the end points of a figure is as follows:
It is assumed that when any of the patterns shown in FIG. 11(b) (i) to (viii) occurs, the central pixel (pixel E in FIG. 11(a)) is an end point. This end point determination is performed if any one of the pixels A-D, F-I other than the center pixel has a figure density (
For example, if the center pixel E is a figure density, it is an "end point"; otherwise, it is a "J" with no end point.

A neural network for this determination is constructed, for example, as shown in FIG. 20, which shows an eleventh embodiment of the present invention. This neural network consists of a first neural layer 20 with nine neurons 21-29.
, a second neural layer 30 having nine neurons 31-39, and an output layer 90 having nine neurons 91-99. The data of pixels A to I are input to the first neural layer 20.

The neuron 21 of the first neural layer 20 outputs output data "1" when only the pixel A among the pixels A-1 excluding the pixel E is "1".

Similarly, neuron 22.23.24.25.26.2
7.28 are pixels B and C5DSF, respectively.

When only one of G, H, and T is rl, output data is “1”
Output. Therefore, when any one of pixels A-D and F-I is "1", one of Nico and -ron 21-28 outputs output data "1". On the other hand, neuron 2
9 outputs the data of pixel E as is.

The neuron 31 of the second neural layer 30 outputs the output data "1" when the outputs of the neurons 21 and 29 are "l", that is, when the pixels A and E are rlJ, respectively.
Output. Similarly, neurons 32 to 3B are connected to pixel B
When and E are "1", when pixels C and E are "1", when pixel R and E are rlJ, pixel F,! :, When E is "1", when pixels G and E are "1", when pixels 11 and E are "1", when pixels ■ and E are "1", the output data is "1", respectively. Output. Note that the neuron 39 is not substantially involved in this end point determination process.

The neuron 91 of the output layer 90 outputs the output data "1" when at least one of the neurons 31 to 3 of the second layer 30 outputs the output data "1", that is, as shown in FIG.
When any of the patterns (i) to (viii) of b) occurs, output data "1" is output. At this time, the central pixel E is determined to be an end point. Furthermore, New Ron 9
2 to 99 are not substantially involved in this end point determination process.

Here, if each pixel data A to I is considered as zero-order data, the output of the neuron 91 is third-order data, and three-stage logical operations are performed in the end point determination process. In other words, in the neural layer 20, the logical product (for example, in the neuron 21, (AIINcI5FGHT)) is used to determine whether only one of A to D and F to ■ is "1".
is taken. In the neural layer 30, A-D, F
-1 is "1", and E is rl,
A logical AND (for example, in the neuron 31, (AECDFGHT - E)) is performed to determine whether or not. In the neural layer 90, E is "1" and A
A logical OR is determined that either one of -D and F-I is rl.

Regarding this end point determination process, neural layer 3
0, E is "1" and any one of A to D, F to It is also possible to perform judgment processing. However, if the difference in order between the output data and the input data is 3, the endpoint determination process can be performed reliably by providing at most three neural layers.

FIG. 21 shows a twelfth embodiment of the invention. The neural network in this example consists of 9 neurons 2
A first neural layer 20 having neurons 1-29, a second neural layer 30 having nine neurons 31-39, and an output layer 90 having nine neurons 91-99. Data for pixel A=1 is input to the first neural layer 20.

The neuron 21 of the first neural layer 20 outputs output data "1" when eight or more of the pixels A to D and F to ■ are "l". The neuron 22 has pixels A to D.
, F-1"- is "1", output data "l" is output. Similarly, neuron 23.24.2
5.26.27.28 are pixels A=D, F~, respectively.
Output data "1" is output when 6 or more, 5 or more, 4 or more, 3 or more of (2), 2 or more, and 1 or more are "1". Neuron 29 outputs the data of pixel E as is.

The neuron 31 of the second neural layer 30 outputs the output data "1" when only the neuron 28 among the neurons 21 to 2B of the neural layer 20 outputs "1". That is, the neuron 31 outputs the output data "1". -D
, , only one of F to I outputs [110 o'clock, output data rl]. The neuron 32 outputs the data of the pixel E as is. Note that the neurons 33 to 39 are not substantially involved in this end point determination process.

The neurons 91 of the output layer 90 are the neurons 31 .
A logical product is performed to determine whether both pixels 32 output "1", and only one of pixels A-D and F-1 outputs "1".
1” and E is “1”, the output data r1
．． Output. Note that the neurons 92 to 99 are not substantially involved in this end point determination process.

Therefore, in this embodiment, end point data is determined by three neural layers.

In the seventh to twelfth embodiments described above, the order of data is the number of processes performed on the data, and each process is performed by a respective neural layer. Here, as an example of the processing content, the logical operators rAND, , rOR
J, rNAND, , rNORJ, rEX-ORJ
and rEX-NORJ, etc., it must be converted to rANDj or "OR". This is “E
This is because X-OR, etc. cannot be processed by one neural layer.

Note that the processing content is not limited to what is expressed by logical operators, but is determined by the nature of the output data.

As described above, according to each of the above embodiments, features related to concavities are extracted strictly and efficiently from the figure to be processed, and the feature amounts are input to the recognition unit, so high-accuracy recognition can be achieved with a minimum number of neurons. Processing is possible. Furthermore, since the recognition unit itself has a layered structure and data input configuration depending on the abstraction level of the data, it is possible to reliably execute desired recognition processing with an extremely efficient configuration. This enables highly accurate figure recognition or character recognition, and enables highly accurate quality control such as, for example, checking stamps or inspecting wiring chips on printed wiring boards or the like.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to obtain an image processing device that can perform high-speed and more reliable graphic recognition with a small memory capacity.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an image processing device to which an embodiment of the present invention is applied, Fig. 2 is a conceptual diagram showing a general neuron model, and Fig. 3 is a v &amp; vision diagram showing a general neuron model. , FIG. 4 is a block diagram showing the processing section, FIG. 5 is a block diagram showing the recognition section, FIG. 6 is a conceptual diagram showing a figure with a concave part, and FIG. 7 is a block diagram showing the boundary pixel data of the figure to be processed. A diagram of the arranged tables, Figure 8 is a conceptual diagram showing the chain code that is a condition for four-part determination, Figure 9 is a conceptual diagram showing the boundary part of a figure including a concave part, and Figure 10 (a) shows a comparative example. Conceptual diagram, Figure 10(b)
is a conceptual diagram showing another comparative example, FIG. 10(C) is a conceptual diagram showing the first embodiment of the neural network, FIG. 11(a) is a diagram showing 3x3 convolution in graphic processing, FIG. (b) is a diagram showing the state of figure density of each pixel, Figure 11 (c) is a conceptual diagram showing the second embodiment of the neural network, and Figure 12 (a) is a diagram showing the third embodiment of the neural network. Conceptual diagram, Figure 12(b) is a conceptual diagram showing the fourth embodiment of the neural network, Figure 13(a) is a conceptual diagram showing a comparative example, Figure 13(b)
14(a) is a conceptual diagram showing the fifth embodiment of the neural network, FIG. 14(a) is a conceptual diagram showing a comparative example, and FIG. 14(b) is a conceptual diagram showing the fifth embodiment of the neural network.
is a conceptual diagram showing the sixth embodiment of the neural network, Figure 15 is a conceptual diagram of a neural network that learns mode ■, Figure 16 is a conceptual diagram of a neural network that learns mode H, and Figure 17 is a weight diagram. Graph showing the temporal change in Figure 18 (
Figure 18(a) is a conceptual diagram showing the seventh embodiment of the neural network, Figure 18(b) is a conceptual diagram showing the eighth embodiment of the neural network, and Figure 18(c) is the ninth embodiment of the neural network.
Figure 19 is a conceptual diagram showing the 10th embodiment of the neural network; Figure 20 is the conceptual diagram showing the 11th embodiment of the neural network; Figure 21 is the 12th embodiment of the neural network. FIG. 20.30.40.50.90...Neural layer 21-24.31-34.41.42 91-93...Neuron 100...Recognition section (figure recognition means) 200...Input section 300 ...Image processing unit (graphic data output means)

Claims (1)

[Claims] (1) A graphic data output means for extracting feature data regarding the concave part of a figure; and data connected to this graphic data output means and corresponding to a comparison result between the sum of inputted data multiplied by a predetermined weight and a threshold value. What is claimed is: 1. An image processing device comprising: neurons that output the above-mentioned feature data provided in parallel; a neural layer having a layered structure corresponding to the abstraction level of the feature data; and means for recognizing a figure based on the feature data.