JPH0229276B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an interframe vector quantizer that performs high-efficiency encoding of an image signal by utilizing correlation in successive screens. . [Prior Art] This type of interframe vector quantizer that has been proposed in the past has been constructed as shown in FIGS. 1, 2, 3, and 4. A specific configuration example of a conventional interframe encoding device will be described below with reference to the drawings. FIG. 1 shows an encoder. In the figure, 1 is a digitized image signal, 2 is a raster/block scan conversion unit that blocks the first image signal sequence 1 arranged in the raster scanning direction for each plurality of samples, and 3 is a blocked image. A signal sequence, 4 is a subtracter, 5 is a prediction error signal sequence of a blocked image signal, 6 is a motion estimation vector quantization encoder, 7 is a vector quantization encoding output, 8
is a vector quantization decoder, 9 is a vector quantization decoding output, that is, a reproduced prediction error signal sequence, 10 is an adder, 11 is a block of the reproduced image signal sequence, 12 is a frame memory, and 13 is one frame period. 14 is a transmission buffer, 15 is a feedback control signal, and 16 is an encoder. This is the output. Further, FIG. 2 shows in detail an example of the configuration of the vector quantization encoder 6. In the figure, 17 is an average value separation circuit, 18 is an amplitude normalization circuit, 19 is an inter-frame difference of a block of an image signal sequence normalized by amplitude after separating the average value, and 20 is an average value separation circuit 17. 21 is the amplitude calculated by the amplitude normalization circuit 18, 22 is the average value 20 and the amplitude 21, and the blocked image signal sequence currently being processed is: a motion detection circuit that determines whether a significant change has occurred in a block of the image signal sequence corresponding to the same position one frame period before; 23 is the determination result of the motion detection circuit 22;
4 is a code table address counter, 25 is a code table index, 26 is an output vector code table memory, 27 is a code table output vector, 28 is a distortion calculation circuit, 29 is a minimum distortion detection circuit, and 30 is the minimum distortion. Signal indicating,
31 is a transmission latch. Further, FIG. 3 shows in detail an example of the configuration of the vector quantization decoder 8. In the figure, 32 is a receiving latch, 33 is an amplitude reproduction circuit, and 34 is an average value reproduction circuit. Further, FIG. 4 shows an example of the configuration of the decoder. 35 in the diagram
36 is a receiving buffer, 36 is a block/raster scan converter which performs the inverse processing of the raster/block scan converter 2, and 37 is a reproduced image signal sequence. Next, the operation will be explained. First, the general operation of the encoder will be explained along FIG. 1. Basically, the concept of interframe DPCM method is used. The digitized image signal sequence 1 can be thought of as a square grid sample group on the screen, but the input is given in the order of the raster scanning direction. In the raster/block scan converter 2,
The image signal sequence 1 is divided into blocks as shown in FIG. 5, and each block is output as a unit. Now, the fth
A certain blocked image signal sequence 3 in a frame is expressed as a signal source vector S _f ={S ₁ , S ₂ ,...,
S _k } _f . FIG. 5 shows an example where K=4. Furthermore, the difference 5 between the signal source vector 3 calculated by the subtracter 4 and the block 13 of the predicted signal sequence is ε _f , and the difference 5 is formed by the vector quantization encoder 6 and the vector quantization decoder 8. Block 9 of the reproduced difference signal series is ε^ _f , block 11 of the reproduced image signal series is S^ _f , and the frame memory 12 is
Assuming that the predicted signal sequence 13 obtained as the output of is P _f , the rough operation of the encoder shown in FIG. 1 is expressed by the following equation. ε _f = S _f − P _f where Q represents a vector quantization error and Z ^-f represents a delay of one frame period caused by the frame memory 12. Therefore, P _f is the block S of the image signal sequence at the same position in the f-1th frame one frame period before the signal source vector 3.
It is equal to the reproduction signal sequence S _{f -1 of f-1} . Vector quantization encoded output 7 obtained in the process of the above processing
is the difference between the signal source vector 3 and the block 13 of the predicted signal sequence, that is, the block ε _f of the prediction error signal.
5 is data compressed by a vector quantization encoder 6, and the output 7 is sent to the transmission buffer 14.
and is output to the transmission path as the encoder output 16. Next, the vector quantization encoder 6 and the vector quantization decoder 8 are shown in FIGS. 2 and 3.
The operation will be explained. Vector quantization considers a block composed of K samples (K: plurality) as an input vector in a K-dimensional signal space, and calculates in advance that the distortion with the input vector is the minimum overall based on the probability distribution density of the input vector. From a set of output vectors prepared so that . On the decoding side, the output vector corresponding to the index can be read out from the set, which is also provided on the decoding side. Now, what is given as an input vector is a block of prediction error signal ε _f = {ε ₁ ,
ε ₂ ,..., ε _k }f(5). The block ε _f 5 is
In the average value separation circuit 17, the average value μ20 calculated by the following formula μ=K ^-11 _k 〓 ^j=1 ε _j ...(2) is subtracted, and in the amplitude normalization circuit 18, the following formula σ= _K ^-1 _k 〓 ^j=1 |ε _j −μ| ...( ₃ ) Normalized by the amplitude σ21 calculated by
X _k }19 is formed. In _other words _, etc. are possible. By performing the mean value separation normalization process, the input vectors can be randomly distributed within a certain limited range of the K-dimensional signal space, and the efficiency of vector quantization is improved.
When performing the same processing, a set of output vectors must also be prepared based on the distribution of the input vectors that have been subjected to average value separation and normalization processing, and after reading the output vectors on the decoding side, amplitude reproduction, average value reproduction, etc. It is necessary to perform inverse processing of mean value separation normalization. Of course, vector quantization without performing the same processing may also be used. In the code table memory 26, a mean value separated normalized output vector is prepared in advance based on the probability distribution density of the mean value separated normalized input vector so that the distortion with the mean value separated normalized input vector is minimized overall. is written. Now, when the average value separated normalized input vector Value-separated normalized output vector y τ = {yi ₁ , yτ ₂ ,...,
yτx} (τ is an index) 27. In the distortion calculation circuit 28, the mean value separated normalized input vector X19 and the mean value separated normalized output vector y τ27
Calculate the distortion with. There are several possible distortion calculation methods, including the following: d strain
As ( X , y τ), The minimum distortion detection circuit 29 sequentially calculates d( X ,
The strobe signal 30 is output when yτ) is smaller than the past minimum distortion. At the same time, latch 31 captures index 25. At the stage when the code table address counter 24 has output all the indexes once, the latch 31 stores the index i of the mean-separated normalized output vector that produces the minimum distortion with respect to the mean-separated normalized input vector. . The index, average value μ20, and amplitude σ21 are vector quantized encoded outputs, and data compression is further performed using the correlation between consecutive screens. Since the input vector is a blocked prediction error signal, the distribution is centered around the zero vector. Therefore, by setting a certain threshold value, treating input vectors close to zero vectors as zero vectors, and not transmitting the index, average value, and amplitude, the amount of data can be greatly reduced. The motion detection circuit 22 uses the average value μ20
and the amplitude σ21 as input, determine whether the block of the prediction error signal sequence can be regarded as a zero vector, that is, 1
Determine whether a significant change (movement) has occurred in the block compared to the previous frame period.
As a method, for example, the threshold value is set to Tθ, and if μTθ and σTθ, there is no movement, and if μ>Tθ or σ>Tθ, it is determined that there is movement. Therefore, the latch 31 outputs only a signal indicating "no motion" if the motion detection result 23 is a "no motion" code, and outputs only a signal indicating "no motion".
If the code is, in addition to the signal indicating "movement", the index is 25, the average value is 20, and the amplitude is 21.
are output as vector quantization encoded outputs 7, respectively. The transmission buffer 14 monitors the amount of information to be transmitted, and controls the threshold value Tθ using the feedback control signal 15. This allows the amount of information to be transmitted to be controlled. In the vector quantization decoder 8, when the latch 32 receives the vector quantization encoded output 7 and receives a "motion" signal,
Mean value separated normalized output vector y τ2 from code table memory 26 according to index i25
7 is read out, the amplitude reproduction circuit 33 multiplies the amplitude by 21, the average value reproduction circuit 34 adds the average value 20, and outputs an output vector, that is, a reproduced prediction error signal sequence ε^ _f 9. That is, ε^ _j = σ・yτ _j + μ (j=1, 2,..., K) ...(7) When the "no movement" signal is received, the latch 31
Outputs 0 as the average value 20 and amplitude 21 from
At this time, the output vector becomes a zero vector. Next, the operation of the decoder will be explained with reference to FIG. Receive buffer 34 receives encoder output 16 and decodes vector quantized encoded output signal 7. The vector quantization decoder 8 decodes the output vector, that is, the prediction error signal sequence ε _f 9 as described above,
The block S^ _f 11 of the reproduced image signal sequence is reproduced by the adder 10 and the frame memory 12 as shown in the following equation. However, Q represents a vector quantization error, and Z ^-f represents a delay of one frame period. The block/raster converter 36 converts the reproduced image signal sequence into blocks.
By scanning converting S^ _f 11 in the raster scanning direction, a reproduced image signal sequence 37 is obtained. The inter-frame vector quantizer that has been proposed in the past is based on the above configuration, so when the image changes drastically, the threshold value Tθ increases to stabilize the amount of information to be transmitted. As a result, some blocks may remain in areas that have changed from the previous screen, resulting in disadvantages such as the boundaries of the blocks being conspicuous. [Summary of the Invention] This invention was made to eliminate the drawbacks of the conventionally proposed methods as described above, and uses tree search vector quantization in the vector quantization section.
In other words, by variable control of the number of stages, the number of stages can be variably controlled to prevent unnatural reproduced images even when the image changes rapidly, even if the amount of data to be transmitted is controlled by feedback. The purpose is to provide a vector quantizer. [Embodiment of the Invention] An embodiment of the invention will be described below with reference to the drawings. First, consider a binary tree as shown in FIG.
The root of the tree corresponds to a K-dimensional signal space R ^k , and each node corresponds to a space obtained by dividing R ^k in stages. A representative point is determined for each representative point, and the representative point is K.
dimensional output vector. The output vectors of each stage are generated based on the distribution of the input vectors so that distortion relaxation between the input and output vectors is minimized. That is, the stepwise division described above is performed based on the distribution of input vectors in R ^k . When an input vector is given, from the first stage to the final stage, if the distortion with the output vector corresponding to the two branching nodes is compared and the branch with the smaller distortion is selected, it corresponds to the terminal node. The output vector is selected. If the final stage is the nth stage, the terminal node is
2 ⁿ pieces. FIG. 6 shows an example where n=3. The above is tree search vector quantization (TSVQ:
This is an explanation of Tree Search Vector Quantization). FIG. 7 shows an example of the configuration of an encoder according to the present invention. In the figure, 1 is a digitized image signal sequence, 2 is a raster/block scan converter, 3 is a block image signal, 4 is a subtracter, 5 is a prediction error signal block, and 38 is a block based on the above-mentioned principle. The TSVQ encoder based on 39 is
TSVQ encoded output, 40 is TSVQ decoder, 4
1 is a TSVQ decoding output, 10 is an adder, 42 is a block of reproduced image signals, 12 is a frame memory, 43 is a block of predicted signals obtained as the output of the frame memory 12, 44 is a transmission buffer, and 45 is a feedback control. The signal 46 is the encoder output. Further, FIG. 8 shows a detailed example of the configuration of the TSVQ encoder 38.
In the figure, 47 is a limiter that measures the distance between the input vector and the origin and quantizes it to a zero vector if the distance is less than a predetermined threshold, and 48 is the limiter 47.
a zero vector detection signal output when an input vector is quantized into a zero vector, 49 is an encoding control unit, 50 is a first stage TSVQ encoder, 51
is the output vector index at the stage of searching up to the first stage 50 of the TSVQ encoder, and 52 is the
The second stage of the TSVQ encoder, 53 is the output vector index up to the stage searched up to the second stage 52 of the TSVQ encoder, and 54 is the third stage of the TSVQ encoder.
Stage 55 is the output vector index at the stage of searching up to the third stage 54 of the TSVQ encoder. Further, FIG. 9 shows an example of the configuration of the second stage 52 of the TSVQ encoder in more detail.
In the figure, 56 is a second stage output vector code table memory, 57 is a parallel distortion calculation circuit, 58 is a distortion comparison circuit, 59 is a signal representing the comparison result in the distortion comparison circuit 58, and 60 is an index register. Further, FIG. 10 shows the TSVQ decoder 40
This shows an example of the configuration. In the figure, 61 is an index latch, 62 is an output vector index, and 63 is an output vector code table memory. Further, FIG. 11 shows an example of the configuration of a decoder according to the present invention. In the figure, 64 is a reception buffer, and 65 is a reproduced image signal sequence. Next, the operation will be explained. First, the operation of the encoder will be explained. The digitized image signal sequence 1 is samples given in order in the raster scanning direction. The raster/block scan converter 2 converts the image signal series into K
(K is a plurality of blocks), and scan conversion is performed in the order in which each block is a unit. Now, the blocked image signal sequence 3 in the f-th frame
is expressed as a signal source vector S _f ={S ₁ , S ₂ , ..., S _k } _f . Furthermore, the difference 5 between the signal source vector 3 calculated by the subtracter 4 and the block 43 of the predicted signal is ε _f , and the TSVQ decoding output formed by the TSVQ encoder 38 and the TSVQ decoder 39, That is, block 41 of the reproduced prediction error signal is expressed as ε^ _f ,
If the block 42 of the reproduced image signal is S^ _f , and the block 43 of the predicted signal obtained as the block of the reproduced image signal delayed by one frame period by the frame memory 12 _{is Pf} , the code shown in FIG. 7 is obtained. The basic operation of the converter is expressed by the following equation. However, Q represents a vector quantization error, and Z ^-t represents a delay of one frame period due to the frame memory 12. Basically, it is a DPCM method between frames. TSVQ encoded output 39 is sent to transmission buffer 44
and is output to the transmission line as an encoded output 46. The transmission buffer 44 monitors the amount of transmitted information and uses the feedback control signal 45 to
The amount of encoded data in the TSVQ encoder 38 is controlled. Regarding control, the TSVQ encoder and TSVQ decoder as well as Figures 8, 9, and 1
This will be explained along with Figure 0. Now, a set Y of output vectors having a binary tree structure as shown in FIG. 6 has been obtained. In Y, the vectors belonging to each stage are generated in advance based on the distribution of the input vectors so that distortion relaxation for the input vectors is minimized. Tree search vector quantization is a process of comparing distortions between two paired output vectors and input vectors in each stage, and determining the pair to be compared in the next stage. The three-stage distortion comparison of the tree shown in FIG. 6 corresponds to the first stage 50 of the TSVQ encoder, the second stage 52 of the TSVQ encoder, and the third stage 54 of the TSVQ encoder in FIG. Now, block ε of the prediction error signal given as the input vector
It is _f5 . The limiter 47 calculates the distortion between the input vector 5 and the origin (zero vector), and if the distortion is less than a predetermined threshold value, the input vector 5 is regarded as a zero vector and outputs a zero vector detection signal 48. That is , if the distortion between the threshold Tθ, the input vector ε _f and the zero vector o is expressed by d ( ε _f , o ), then if d ( ε _f , o ) Tθ then ε _f → o ……(10) If the distortion is greater than the threshold, the input vector 5 is sent to the TSVQ encoder first stage 50. Although various definitions of distortion can be considered, a few examples are shown below. Generally, if the distortion of vector a and vector b is d( a , b ), then d( a , b ) is max|a _j −b _j | etc. However, a =
{a ₁ , a ₂ , ..., a _k }, b = {b ₁ , b ₂ , ..., b _k } Here, the input vector 5 that is not considered as a zero vector is input to the first to third stages of the TSVQ encoder. The tree search vector is quantized in the stage. In each stage, distortion is calculated between the pair of output vectors specified by the distortion comparison results up to the previous stage and the input vector, the one with the smaller distortion is determined, and that information is added to the comparison results up to the previous stage. After that, send it to the next stage. Since there is only one pair of output vectors in the first stage, the comparison results up to the previous stages are not necessary or do not exist. If the distortion comparison result in the first stage is i ₁ 51, then in the second stage the distortion between the pair of output vectors determined by i ₁ and the input vector is calculated, and the distortion comparison result is added to i ₁ . to form i ₂ . In the third stage, i ₂ and input vector ε
Given f, it outputs index _i3 . For example, if you select the technique on the left as shown in Figure 6, 0,
Assuming that 1 is assigned when the technique on the right is selected, i ₁ , i ₂ , and i ₃ are 1-digit, 2-digit, and 3-digit 2, respectively.
It becomes a base number sequence and corresponds to the index of the output vector. In the encoder according to the present invention, the number of stages of tree search vector quantization is variably controlled by the feedback control signal 45, and variable length encoding is performed. That is, the encoding control unit 49 outputs a feedback control signal 45, a zero vector detection signal 48,
The index i ₁ 51, index i ₂ 53, and index i ₃ 55 are input, and if the input vector is considered to be a zero vector, a code corresponding to the zero vector is encoded. If the input vector is not considered to be a zero vector, one of i ₁ , i ₂ , and i ₃ is encoded as an output vector index based on the feedback control signal 45. In other words, when there is no margin in the transmission path, which is a successive approximation of the input vector at each stage, the output of the stage closest to the first stage is encoded, and when there is margin in the transmission path, the output of the final stage is encoded. The closer to the first stage, the smaller the amount of output information, so the amount of information to be encoded can be controlled as described above. FIG. 9 shows an example of the configuration of the second stage 52 of the TSVQ encoder. The second stage output vector code table memory 56 stores output vectors corresponding to the second stage of the output vector set Y, and outputs the pair of output vectors specified by the index 51 of the previous stage. The parallel distortion calculation circuit 57 calculates the distortion between the input vector 5 and the output vector pair, and the distortion comparison circuit 58
Compare the two and send the comparison result to signal 5.
Output as 9. As mentioned in the explanation of the limiter 47, there are several possible distortion calculation methods. The index register 60 adds the second stage distortion comparison result to the previous stage index 51 and outputs the second stage index 53. The operations of the first and third stages are almost the same. The difference is that an output vector group corresponding to each stage is written in each output vector code table memory, and that the first stage does not have an index up to the previous stage. The output vector code table memory 63 included in the TSVQ decoder 40 stores all output vectors and zero vectors belonging to the output vector set Y. The index latch 61 decodes the zero vector code or output vector index based on the TSVQ encoded output 39, and extracts the TSVQ decoded output 41 from the output vector code table memory 63.
Read out. Next, the operation of the decoder according to the present invention will be explained with reference to FIG. A receive buffer 64 receives the encoder output 46;
Decode the TSVQ encoded output 39. TSVQ decoder 40 decodes the output vector as described above,
The block S^ _f of the reproduced image signal sequence is reproduced by the adder 10 and the frame memory 12 as shown in the following equation. where Q is the vector quantization error, Z ^-t is the delay of one frame period caused by the frame memory 12, and ε^ _f is the block of the reproduced prediction error signal obtained as the output vector. Block/
The raster conversion section 36 scan-converts the block S^ _f 42 of the reproduced image signal in the raster scanning direction to obtain a reproduced image signal series 65. In this explanation, three-stage tree search vector quantization is taken as an example, but it goes without saying that other stages (generally, there are multiple stages) may be used. [Effects of the Invention] As described above, according to the present invention, since the amount of data is controlled by variable control of the number of stages for tree search vector quantization, even when an image changes rapidly, In this way, a more natural reproduced image can be provided without creating an unnatural reproduced image by increasing the portion in which the signal of the previous frame is retained. Although the present invention can be widely applied to television transmission, it is not particularly limited to interframe coding, but can also be applied as a successive approximation vector quantizer that can control the amount of data.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an encoder of a conventionally proposed interframe vector quantizer; Fig. 2 is a block diagram of a vector quantization encoder of a conventionally proposed interframe vector quantizer; Figure 3 is a block diagram of a vector quantization decoding unit of a conventionally proposed interframe vector quantizer, Figure 4 is a block diagram of a decoder of a conventionally proposed interframe vector quantizer, and Figure 5 is a block diagram of a decoder of a conventionally proposed interframe vector quantizer. FIG. 6 is an explanatory diagram explaining blocking of an image signal sequence. FIG. 6 is an explanatory diagram explaining tree search vector quantization. FIG. FIG. 8 is a block diagram of an embodiment of the TSVQ encoder in the sequential near-vector quantizer according to the present invention, and FIG. 9 is a block diagram of an embodiment of the TSVQ encoder in the sequential near-close vector quantizer according to the invention FIG. 10 is a block diagram of an embodiment of the second stage of the TSVQ encoder.
FIG. 11 is a block diagram of an embodiment of a TSVQ decoder. FIG. 11 is a block diagram of an embodiment of a decoder in a sequential near-vector quantizer according to the present invention. In the figure, 1 and 3 are image signal sequences, 2 is a raster/block scan converter, 4 is a subtracter, 5 is a prediction error signal sequence block, 6 is a motion estimation vector quantization encoder, and 7 is a vector quantization encoder. encoded output, 8 is a vector quantization decoder, 9 is a vector quantization encoded output, 10 is an adder, 11 is a block of reproduced image signal sequence, 12 is a frame memory, 13 is a block of predicted signal sequence, 14 is the transmission buffer, 1
5 is a feedback control signal, 16 is an encoder output signal, 17 is an average value separation circuit, 18 is an amplitude normalization circuit, 19 is an average value separation normalization input vector,
20 is an average value, 21 is an amplitude, 22 is a motion detection unit,
23 is a motion detection section output signal, 24 is a code table address counter, 25 is an index, 26
is the mean value separation normalized output vector code table memory, 27 is the code table output vector, 2
8 is a distortion calculation circuit, 29 is a minimum distortion detection circuit, 30 is a minimum distortion detection strobe signal, 31 is a transmission latch,
32 is a reception latch, 33 is an amplitude reproduction circuit, 34 is an average value reproduction circuit, 35 is a reception buffer, 36 is a block/raster scan converter, 37 is a reproduced image signal sequence, 38 is a TSVQ encoder, 39 is a TSVQ code output, 40 is the TSVQ decoder, 41 is the
TSVQ decoding output, 42 is a block of reproduced image signal sequence, 43 is a block of predicted signal sequence, 44
is a transmission buffer, 45 is a feedback control signal, 46 is an encoder output, 47 is a limiter, 48
is a zero vector detection signal, 49 is an encoding control unit, 5
0 is the first stage TSVQ encoder, 51 is the first stage output vector index, 52 is the second stage TSVQ encoder, 53 is the second stage output vector index, 54 is the third stage TSVQ encoder, 55 is the third
56 is a second stage output vector code table memory, 57 is a parallel distortion calculation circuit, 58 is a distortion comparison circuit, 59 is a distortion comparison result signal, 60 is an index register, 61 is an index latch, 62 is the output vector index, 63 is the output vector code table memory,
64 is a reception buffer, and 65 is a reproduced image signal sequence. It should be noted that the same or corresponding parts in the figures are indicated by the same reference numerals.

Claims (1)

[Claims] 1 A frame memory capable of storing at least one frame of past image signals; a block-formed previous image signal sequence read out from the frame memory one frame period before is used as a prediction signal, and the current image signal sequence is divided into K pieces. (K is a subtractor that calculates the block of the prediction error signal by calculating the difference between the block of the image signal series that has been grouped into blocks and the block of the prediction signal, and the block of the prediction error signal of the above subtractor is input. As a vector,
If the distortion between the input vector and the zero vector is less than a predetermined threshold, the input vector is regarded as one that can be approximated by a zero vector, and a limiter outputs a zero vector detection signal;
The dimensional signal space R ^k is divided into two stepwise in a tree configuration, and at the nth stage (n is a positive integer), 2 ⁿ
an output vector code table memory that stores the representative points of each division of the signal space R ^k as a set of output vectors, and a distortion between the two output vectors prepared by dividing each stage into two and the input vector. a parallel distortion calculation circuit that calculates the distortion, a distortion comparison circuit that compares the distortion between the two output vectors and the input vector, and determines which one gives the smaller distortion; An index register that stores an index corresponding to the address for reading out the output vector at each stage and updates the index each time the distortion comparison result of each stage is given.The index register is loaded at each stage and controls the number of stages in the final stage. a second code table memory having the same contents as the output vector code table memory; Upon receiving the variable length coded encoder output, the zero vector detection signal and the index are decoded and the second
A decoder that reads an output vector from the code table memory of the encoder, and adds the block of the reproduced prediction error signal obtained as the output vector decoded by the decoder and the block of the predicted signal. The frame memory further comprises an adder for calculating a reproduced image signal delayed by one frame period and used as a past image signal, and a transmission buffer for controlling the number of stages in the final stage by feedback control. A successive approximation vector quantizer featuring: